0014-KVM-SVM-obey-guest-PAT.patch 2.0 KB

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  1. From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
  2. From: Paolo Bonzini <[email protected]>
  3. Date: Thu, 26 Oct 2017 09:13:27 +0200
  4. Subject: [PATCH] KVM: SVM: obey guest PAT
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. For many years some users of assigned devices have reported worse
  9. performance on AMD processors with NPT than on AMD without NPT,
  10. Intel or bare metal.
  11. The reason turned out to be that SVM is discarding the guest PAT
  12. setting and uses the default (PA0=PA4=WB, PA1=PA5=WT, PA2=PA6=UC-,
  13. PA3=UC). The guest might be using a different setting, and
  14. especially might want write combining but isn't getting it
  15. (instead getting slow UC or UC- accesses).
  16. Thanks a lot to [email protected] for noticing the relation
  17. to the g_pat setting. The patch has been tested also by a bunch
  18. of people on VFIO users forums.
  19. Fixes: 709ddebf81cb40e3c36c6109a7892e8b93a09464
  20. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=196409
  21. Cc: [email protected]
  22. Signed-off-by: Paolo Bonzini <[email protected]>
  23. Reviewed-by: David Hildenbrand <[email protected]>
  24. Tested-by: Nick Sarnie <[email protected]>
  25. Signed-off-by: Radim Krčmář <[email protected]>
  26. (cherry picked from commit 15038e14724799b8c205beb5f20f9e54896013c3)
  27. Signed-off-by: Fabian Grünbichler <[email protected]>
  28. ---
  29. arch/x86/kvm/svm.c | 7 +++++++
  30. 1 file changed, 7 insertions(+)
  31. diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
  32. index a8c911fcd73f..e9d0f80fd83a 100644
  33. --- a/arch/x86/kvm/svm.c
  34. +++ b/arch/x86/kvm/svm.c
  35. @@ -3650,6 +3650,13 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
  36. u32 ecx = msr->index;
  37. u64 data = msr->data;
  38. switch (ecx) {
  39. + case MSR_IA32_CR_PAT:
  40. + if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))
  41. + return 1;
  42. + vcpu->arch.pat = data;
  43. + svm->vmcb->save.g_pat = data;
  44. + mark_dirty(svm->vmcb, VMCB_NPT);
  45. + break;
  46. case MSR_IA32_TSC:
  47. kvm_write_tsc(vcpu, msr);
  48. break;
  49. --
  50. 2.14.2