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@@ -0,0 +1,434 @@
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+// Copyright 2016 The Go Authors. All rights reserved.
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+// Use of this source code is governed by a BSD-style
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+// license that can be found in the LICENSE file.
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+
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+package bpf
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+
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+import "fmt"
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+
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+// An Instruction is one instruction executed by the BPF virtual
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+// machine.
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+type Instruction interface {
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+ // Assemble assembles the Instruction into a RawInstruction.
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+ Assemble() (RawInstruction, error)
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+}
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+
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+// A RawInstruction is a raw BPF virtual machine instruction.
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+type RawInstruction struct {
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+ // Operation to execute.
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+ Op uint16
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+ // For conditional jump instructions, the number of instructions
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+ // to skip if the condition is true/false.
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+ Jt uint8
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+ Jf uint8
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+ // Constant parameter. The meaning depends on the Op.
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+ K uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (ri RawInstruction) Assemble() (RawInstruction, error) { return ri, nil }
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+
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+// Disassemble parses ri into an Instruction and returns it. If ri is
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+// not recognized by this package, ri itself is returned.
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+func (ri RawInstruction) Disassemble() Instruction {
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+ switch ri.Op & opMaskCls {
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+ case opClsLoadA, opClsLoadX:
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+ reg := Register(ri.Op & opMaskLoadDest)
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+ sz := 0
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+ switch ri.Op & opMaskLoadWidth {
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+ case opLoadWidth4:
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+ sz = 4
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+ case opLoadWidth2:
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+ sz = 2
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+ case opLoadWidth1:
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+ sz = 1
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+ default:
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+ return ri
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+ }
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+ switch ri.Op & opMaskLoadMode {
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+ case opAddrModeImmediate:
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+ if sz != 4 {
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+ return ri
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+ }
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+ return LoadConstant{Dst: reg, Val: ri.K}
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+ case opAddrModeScratch:
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+ if sz != 4 || ri.K > 15 {
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+ return ri
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+ }
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+ return LoadScratch{Dst: reg, N: int(ri.K)}
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+ case opAddrModeAbsolute:
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+ return LoadAbsolute{Size: sz, Off: ri.K}
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+ case opAddrModeIndirect:
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+ return LoadIndirect{Size: sz, Off: ri.K}
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+ case opAddrModePacketLen:
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+ if sz != 4 {
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+ return ri
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+ }
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+ return LoadExtension{Num: ExtLen}
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+ case opAddrModeMemShift:
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+ return LoadMemShift{Off: ri.K}
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+ default:
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+ return ri
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+ }
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+
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+ case opClsStoreA:
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+ if ri.Op != opClsStoreA || ri.K > 15 {
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+ return ri
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+ }
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+ return StoreScratch{Src: RegA, N: int(ri.K)}
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+
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+ case opClsStoreX:
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+ if ri.Op != opClsStoreX || ri.K > 15 {
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+ return ri
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+ }
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+ return StoreScratch{Src: RegX, N: int(ri.K)}
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+
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+ case opClsALU:
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+ switch op := ALUOp(ri.Op & opMaskOperator); op {
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+ case ALUOpAdd, ALUOpSub, ALUOpMul, ALUOpDiv, ALUOpOr, ALUOpAnd, ALUOpShiftLeft, ALUOpShiftRight, ALUOpMod, ALUOpXor:
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+ if ri.Op&opMaskOperandSrc != 0 {
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+ return ALUOpX{Op: op}
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+ }
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+ return ALUOpConstant{Op: op, Val: ri.K}
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+ case aluOpNeg:
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+ return NegateA{}
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+ default:
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+ return ri
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+ }
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+
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+ case opClsJump:
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+ if ri.Op&opMaskJumpConst != opClsJump {
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+ return ri
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+ }
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+ switch ri.Op & opMaskJumpCond {
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+ case opJumpAlways:
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+ return Jump{Skip: ri.K}
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+ case opJumpEqual:
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+ return JumpIf{
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+ Cond: JumpEqual,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ case opJumpGT:
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+ return JumpIf{
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+ Cond: JumpGreaterThan,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ case opJumpGE:
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+ return JumpIf{
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+ Cond: JumpGreaterOrEqual,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ case opJumpSet:
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+ return JumpIf{
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+ Cond: JumpBitsSet,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ default:
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+ return ri
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+ }
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+
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+ case opClsReturn:
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+ switch ri.Op {
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+ case opClsReturn | opRetSrcA:
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+ return RetA{}
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+ case opClsReturn | opRetSrcConstant:
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+ return RetConstant{Val: ri.K}
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+ default:
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+ return ri
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+ }
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+
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+ case opClsMisc:
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+ switch ri.Op {
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+ case opClsMisc | opMiscTAX:
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+ return TAX{}
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+ case opClsMisc | opMiscTXA:
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+ return TXA{}
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+ default:
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+ return ri
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+ }
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+
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+ default:
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+ panic("unreachable") // switch is exhaustive on the bit pattern
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+ }
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+}
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+
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+// LoadConstant loads Val into register Dst.
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+type LoadConstant struct {
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+ Dst Register
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+ Val uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadConstant) Assemble() (RawInstruction, error) {
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+ return assembleLoad(a.Dst, 4, opAddrModeImmediate, a.Val)
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+}
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+
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+// LoadScratch loads scratch[N] into register Dst.
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+type LoadScratch struct {
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+ Dst Register
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+ N int // 0-15
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadScratch) Assemble() (RawInstruction, error) {
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+ if a.N < 0 || a.N > 15 {
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+ return RawInstruction{}, fmt.Errorf("invalid scratch slot %d", a.N)
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+ }
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+ return assembleLoad(a.Dst, 4, opAddrModeScratch, uint32(a.N))
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+}
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+
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+// LoadAbsolute loads packet[Off:Off+Size] as an integer value into
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+// register A.
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+type LoadAbsolute struct {
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+ Off uint32
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+ Size int // 1, 2 or 4
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadAbsolute) Assemble() (RawInstruction, error) {
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+ return assembleLoad(RegA, a.Size, opAddrModeAbsolute, a.Off)
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+}
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+
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+// LoadIndirect loads packet[X+Off:X+Off+Size] as an integer value
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+// into register A.
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+type LoadIndirect struct {
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+ Off uint32
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+ Size int // 1, 2 or 4
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadIndirect) Assemble() (RawInstruction, error) {
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+ return assembleLoad(RegA, a.Size, opAddrModeIndirect, a.Off)
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+}
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+
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+// LoadMemShift multiplies the first 4 bits of the byte at packet[Off]
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+// by 4 and stores the result in register X.
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+//
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+// This instruction is mainly useful to load into X the length of an
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+// IPv4 packet header in a single instruction, rather than have to do
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+// the arithmetic on the header's first byte by hand.
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+type LoadMemShift struct {
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+ Off uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadMemShift) Assemble() (RawInstruction, error) {
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+ return assembleLoad(RegX, 1, opAddrModeMemShift, a.Off)
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+}
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+
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+// LoadExtension invokes a linux-specific extension and stores the
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+// result in register A.
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+type LoadExtension struct {
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+ Num Extension
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadExtension) Assemble() (RawInstruction, error) {
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+ if a.Num == ExtLen {
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+ return assembleLoad(RegA, 4, opAddrModePacketLen, 0)
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+ }
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+ return assembleLoad(RegA, 4, opAddrModeAbsolute, uint32(-0x1000+a.Num))
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+}
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+
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+// StoreScratch stores register Src into scratch[N].
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+type StoreScratch struct {
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+ Src Register
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+ N int // 0-15
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a StoreScratch) Assemble() (RawInstruction, error) {
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+ if a.N < 0 || a.N > 15 {
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+ return RawInstruction{}, fmt.Errorf("invalid scratch slot %d", a.N)
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+ }
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+ var op uint16
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+ switch a.Src {
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+ case RegA:
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+ op = opClsStoreA
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+ case RegX:
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+ op = opClsStoreX
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+ default:
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+ return RawInstruction{}, fmt.Errorf("invalid source register %v", a.Src)
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+ }
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+
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+ return RawInstruction{
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+ Op: op,
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+ K: uint32(a.N),
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+ }, nil
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+}
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+
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+// ALUOpConstant executes A = A <Op> Val.
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+type ALUOpConstant struct {
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+ Op ALUOp
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+ Val uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a ALUOpConstant) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsALU | opALUSrcConstant | uint16(a.Op),
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+ K: a.Val,
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+ }, nil
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+}
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+
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+// ALUOpX executes A = A <Op> X
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+type ALUOpX struct {
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+ Op ALUOp
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a ALUOpX) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsALU | opALUSrcX | uint16(a.Op),
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+ }, nil
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+}
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+
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+// NegateA executes A = -A.
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+type NegateA struct{}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a NegateA) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsALU | uint16(aluOpNeg),
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+ }, nil
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+}
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+
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+// Jump skips the following Skip instructions in the program.
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+type Jump struct {
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+ Skip uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a Jump) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsJump | opJumpAlways,
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+ K: a.Skip,
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+ }, nil
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+}
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+
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+// JumpIf skips the following Skip instructions in the program if A
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+// <Cond> Val is true.
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+type JumpIf struct {
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+ Cond JumpTest
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+ Val uint32
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+ SkipTrue uint8
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+ SkipFalse uint8
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a JumpIf) Assemble() (RawInstruction, error) {
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+ var (
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+ cond uint16
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+ flip bool
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+ )
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+ switch a.Cond {
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+ case JumpEqual:
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+ cond = opJumpEqual
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+ case JumpNotEqual:
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+ cond, flip = opJumpEqual, true
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+ case JumpGreaterThan:
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+ cond = opJumpGT
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+ case JumpLessThan:
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+ cond, flip = opJumpGE, true
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+ case JumpGreaterOrEqual:
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+ cond = opJumpGE
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+ case JumpLessOrEqual:
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+ cond, flip = opJumpGT, true
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+ case JumpBitsSet:
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+ cond = opJumpSet
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+ case JumpBitsNotSet:
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+ cond, flip = opJumpSet, true
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+ default:
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+ return RawInstruction{}, fmt.Errorf("unknown JumpTest %v", a.Cond)
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+ }
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+ jt, jf := a.SkipTrue, a.SkipFalse
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+ if flip {
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+ jt, jf = jf, jt
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+ }
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+ return RawInstruction{
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+ Op: opClsJump | cond,
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+ Jt: jt,
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+ Jf: jf,
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+ K: a.Val,
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+ }, nil
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+}
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+
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+// RetA exits the BPF program, returning the value of register A.
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+type RetA struct{}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a RetA) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsReturn | opRetSrcA,
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+ }, nil
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+}
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+
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+// RetConstant exits the BPF program, returning a constant value.
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+type RetConstant struct {
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+ Val uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a RetConstant) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsReturn | opRetSrcConstant,
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+ K: a.Val,
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+ }, nil
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+}
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+
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+// TXA copies the value of register X to register A.
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+type TXA struct{}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a TXA) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsMisc | opMiscTXA,
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+ }, nil
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+}
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+
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+// TAX copies the value of register A to register X.
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+type TAX struct{}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a TAX) Assemble() (RawInstruction, error) {
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+ return RawInstruction{
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+ Op: opClsMisc | opMiscTAX,
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+ }, nil
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+}
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+
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+func assembleLoad(dst Register, loadSize int, mode uint16, k uint32) (RawInstruction, error) {
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+ var (
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+ cls uint16
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+ sz uint16
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+ )
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+ switch dst {
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+ case RegA:
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+ cls = opClsLoadA
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+ case RegX:
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+ cls = opClsLoadX
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+ default:
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+ return RawInstruction{}, fmt.Errorf("invalid target register %v", dst)
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+ }
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+ switch loadSize {
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+ case 1:
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+ sz = opLoadWidth1
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+ case 2:
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+ sz = opLoadWidth2
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+ case 4:
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+ sz = opLoadWidth4
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+ default:
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+ return RawInstruction{}, fmt.Errorf("invalid load byte length %d", sz)
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+ }
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+ return RawInstruction{
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+ Op: cls | sz | mode,
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+ K: k,
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+ }, nil
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+}
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