hinlink.revert.patch 49 KB

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  1. From e0ab5b6aa808202939dae170f75ed3d532b8ab38 Mon Sep 17 00:00:00 2001
  2. From: Tianling Shen <[email protected]>
  3. Date: Wed, 20 Sep 2023 11:07:49 +0800
  4. Subject: [PATCH] rockchip: remove Hinlink support
  5. Just ask the vendor for firmware.
  6. Signed-off-by: Tianling Shen <[email protected]>
  7. ---
  8. package/boot/uboot-rockchip/Makefile | 24 -
  9. .../patches/900-arm-add-dts-files.patch | 5 +-
  10. .../arch/arm/dts/rk3568-opc-h66k-u-boot.dtsi | 21 -
  11. .../src/arch/arm/dts/rk3568-opc-h66k.dts | 17 -
  12. .../src/arch/arm/dts/rk3568-opc-h66k.dtsi | 619 -----------------
  13. .../arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi | 3 -
  14. .../src/arch/arm/dts/rk3568-opc-h68k.dts | 78 ---
  15. .../arch/arm/dts/rk3568-opc-h69k-u-boot.dtsi | 3 -
  16. .../src/arch/arm/dts/rk3568-opc-h69k.dts | 74 ---
  17. .../src/configs/opc-h66k-rk3568_defconfig | 85 ---
  18. .../src/configs/opc-h68k-rk3568_defconfig | 85 ---
  19. .../src/configs/opc-h69k-rk3568_defconfig | 85 ---
  20. .../armv8/base-files/etc/board.d/01_leds | 12 -
  21. .../armv8/base-files/etc/board.d/02_network | 10 +-
  22. .../etc/hotplug.d/net/40-net-smp-affinity | 7 +-
  23. .../boot/dts/rockchip/rk3568-opc-h66k.dts | 17 -
  24. .../boot/dts/rockchip/rk3568-opc-h66k.dtsi | 623 ------------------
  25. .../boot/dts/rockchip/rk3568-opc-h68k.dts | 80 ---
  26. .../boot/dts/rockchip/rk3568-opc-h69k.dts | 75 ---
  27. target/linux/rockchip/image/armv8.mk | 30 -
  28. .../900-arm64-boot-add-dts-files.patch | 5 +-
  29. 21 files changed, 6 insertions(+), 1952 deletions(-)
  30. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k-u-boot.dtsi
  31. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dts
  32. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dtsi
  33. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi
  34. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k.dts
  35. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k-u-boot.dtsi
  36. delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k.dts
  37. delete mode 100644 package/boot/uboot-rockchip/src/configs/opc-h66k-rk3568_defconfig
  38. delete mode 100644 package/boot/uboot-rockchip/src/configs/opc-h68k-rk3568_defconfig
  39. delete mode 100644 package/boot/uboot-rockchip/src/configs/opc-h69k-rk3568_defconfig
  40. delete mode 100644 target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts
  41. delete mode 100644 target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dtsi
  42. delete mode 100644 target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
  43. delete mode 100644 target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts
  44. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k-u-boot.dtsi
  45. deleted file mode 100644
  46. index f4769d12bd1..00000000000
  47. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k-u-boot.dtsi
  48. +++ /dev/null
  49. @@ -1,21 +0,0 @@
  50. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  51. -
  52. -#include "rk356x-u-boot.dtsi"
  53. -
  54. -/ {
  55. - chosen {
  56. - stdout-path = &uart2;
  57. - u-boot,spl-boot-order = "same-as-spl", &sdhci;
  58. - };
  59. -};
  60. -
  61. -&sdhci {
  62. - cap-mmc-highspeed;
  63. - mmc-hs200-1_8v;
  64. -};
  65. -
  66. -&uart2 {
  67. - clock-frequency = <24000000>;
  68. - bootph-all;
  69. - status = "okay";
  70. -};
  71. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dts
  72. deleted file mode 100644
  73. index c86119a23b9..00000000000
  74. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dts
  75. +++ /dev/null
  76. @@ -1,17 +0,0 @@
  77. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  78. -/*
  79. - * Copyright (c) 2022 AmadeusGhost <[email protected]>
  80. - */
  81. -
  82. -/dts-v1/;
  83. -
  84. -#include "rk3568-opc-h66k.dtsi"
  85. -
  86. -/ {
  87. - model = "Hinlink OPC-H66K";
  88. - compatible = "hinlink,opc-h66k", "rockchip,rk3568";
  89. -};
  90. -
  91. -&vcc3v3_pcie {
  92. - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
  93. -};
  94. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dtsi
  95. deleted file mode 100644
  96. index c194d51bbf9..00000000000
  97. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h66k.dtsi
  98. +++ /dev/null
  99. @@ -1,619 +0,0 @@
  100. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  101. -/*
  102. - * Copyright (c) 2022 AmadeusGhost <[email protected]>
  103. - */
  104. -
  105. -#include <dt-bindings/gpio/gpio.h>
  106. -#include <dt-bindings/input/input.h>
  107. -#include <dt-bindings/pinctrl/rockchip.h>
  108. -#include <dt-bindings/soc/rockchip,vop2.h>
  109. -#include "rk3568.dtsi"
  110. -
  111. -/ {
  112. - aliases {
  113. - mmc0 = &sdhci;
  114. - mmc1 = &sdmmc0;
  115. -
  116. - led-boot = &power_led;
  117. - led-failsafe = &power_led;
  118. - led-running = &power_led;
  119. - led-upgrade = &power_led;
  120. - };
  121. -
  122. - chosen {
  123. - stdout-path = "serial2:1500000n8";
  124. - };
  125. -
  126. - hdmi-con {
  127. - compatible = "hdmi-connector";
  128. - type = "a";
  129. -
  130. - port {
  131. - hdmi_con_in: endpoint {
  132. - remote-endpoint = <&hdmi_out_con>;
  133. - };
  134. - };
  135. - };
  136. -
  137. - gpio-keys {
  138. - compatible = "gpio-keys";
  139. - pinctrl-0 = <&reset_button_pin>;
  140. - pinctrl-names = "default";
  141. -
  142. - reset {
  143. - label = "reset";
  144. - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
  145. - linux,code = <KEY_RESTART>;
  146. - debounce-interval = <50>;
  147. - };
  148. - };
  149. -
  150. - gpio-leds {
  151. - compatible = "gpio-leds";
  152. - pinctrl-names = "default";
  153. - pinctrl-0 = <&led_lan_pin>, <&led_power_pin>, <&led_wan_pin>;
  154. -
  155. - led-lan {
  156. - label = "amber:lan";
  157. - gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
  158. - };
  159. -
  160. - power_led: led-power {
  161. - label = "green:power";
  162. - gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
  163. - };
  164. -
  165. - led-wan {
  166. - label = "blue:wan";
  167. - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
  168. - };
  169. - };
  170. -
  171. - pwm-fan {
  172. - compatible = "pwm-fan";
  173. - cooling-levels = <0 100 150 200 255>;
  174. - #cooling-cells = <2>;
  175. - pwms = <&pwm0 0 50000 0>;
  176. - };
  177. -
  178. - vcc12v_dcin: vcc12v-dcin-regulator {
  179. - compatible = "regulator-fixed";
  180. - regulator-always-on;
  181. - regulator-boot-on;
  182. - regulator-min-microvolt = <12000000>;
  183. - regulator-max-microvolt = <12000000>;
  184. - regulator-name = "vcc12v_dcin";
  185. - };
  186. -
  187. - vcc3v3_sys: vcc3v3-sys-regulator {
  188. - compatible = "regulator-fixed";
  189. - regulator-always-on;
  190. - regulator-boot-on;
  191. - regulator-min-microvolt = <3300000>;
  192. - regulator-max-microvolt = <3300000>;
  193. - regulator-name = "vcc3v3_sys";
  194. - vin-supply = <&vcc12v_dcin>;
  195. - };
  196. -
  197. - vcc5v0_sys: vcc5v0-sys-regulator {
  198. - compatible = "regulator-fixed";
  199. - regulator-always-on;
  200. - regulator-boot-on;
  201. - regulator-min-microvolt = <5000000>;
  202. - regulator-max-microvolt = <5000000>;
  203. - regulator-name = "vcc5v0_sys";
  204. - vin-supply = <&vcc12v_dcin>;
  205. - };
  206. -
  207. - vcc5v0_usb: vcc5v0-usb-regulator {
  208. - compatible = "regulator-fixed";
  209. - regulator-always-on;
  210. - regulator-boot-on;
  211. - regulator-min-microvolt = <5000000>;
  212. - regulator-max-microvolt = <5000000>;
  213. - regulator-name = "vcc5v0_usb";
  214. - vin-supply = <&vcc12v_dcin>;
  215. - };
  216. -
  217. - vcc5v0_usb_host: vcc5v0-usb-host-regulator {
  218. - compatible = "regulator-fixed";
  219. - enable-active-high;
  220. - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
  221. - pinctrl-names = "default";
  222. - pinctrl-0 = <&vcc5v0_usb_host_en>;
  223. - regulator-min-microvolt = <5000000>;
  224. - regulator-max-microvolt = <5000000>;
  225. - regulator-name = "vcc5v0_usb_host";
  226. - vin-supply = <&vcc5v0_usb>;
  227. - };
  228. -
  229. - vcc3v3_pcie: vcc3v3-pcie-regulator {
  230. - compatible = "regulator-fixed";
  231. - enable-active-high;
  232. - regulator-min-microvolt = <3300000>;
  233. - regulator-max-microvolt = <3300000>;
  234. - regulator-name = "vcc3v3_pcie";
  235. - startup-delay-us = <5000>;
  236. - vin-supply = <&vcc5v0_sys>;
  237. - };
  238. -};
  239. -
  240. -&combphy0 {
  241. - status = "okay";
  242. -};
  243. -
  244. -&combphy1 {
  245. - status = "okay";
  246. -};
  247. -
  248. -&combphy2 {
  249. - status = "okay";
  250. -};
  251. -
  252. -&cpu0 {
  253. - cpu-supply = <&vdd_cpu>;
  254. -};
  255. -
  256. -&cpu1 {
  257. - cpu-supply = <&vdd_cpu>;
  258. -};
  259. -
  260. -&cpu2 {
  261. - cpu-supply = <&vdd_cpu>;
  262. -};
  263. -
  264. -&cpu3 {
  265. - cpu-supply = <&vdd_cpu>;
  266. -};
  267. -
  268. -&gpu {
  269. - mali-supply = <&vdd_gpu>;
  270. - status = "okay";
  271. -};
  272. -
  273. -&hdmi {
  274. - avdd-0v9-supply = <&vdda0v9_image>;
  275. - avdd-1v8-supply = <&vcca1v8_image>;
  276. - status = "okay";
  277. -};
  278. -
  279. -&hdmi_in {
  280. - hdmi_in_vp0: endpoint {
  281. - remote-endpoint = <&vp0_out_hdmi>;
  282. - };
  283. -};
  284. -
  285. -&hdmi_out {
  286. - hdmi_out_con: endpoint {
  287. - remote-endpoint = <&hdmi_con_in>;
  288. - };
  289. -};
  290. -
  291. -&hdmi_sound {
  292. - status = "okay";
  293. -};
  294. -
  295. -&i2c0 {
  296. - status = "okay";
  297. -
  298. - vdd_cpu: regulator@1c {
  299. - compatible = "tcs,tcs4525";
  300. - reg = <0x1c>;
  301. - fcs,suspend-voltage-selector = <1>;
  302. - regulator-name = "vdd_cpu";
  303. - regulator-always-on;
  304. - regulator-boot-on;
  305. - regulator-min-microvolt = <712500>;
  306. - regulator-max-microvolt = <1390000>;
  307. - regulator-ramp-delay = <2300>;
  308. - vin-supply = <&vcc5v0_sys>;
  309. -
  310. - regulator-state-mem {
  311. - regulator-off-in-suspend;
  312. - };
  313. - };
  314. -
  315. - rk809: pmic@20 {
  316. - compatible = "rockchip,rk809";
  317. - reg = <0x20>;
  318. - interrupt-parent = <&gpio0>;
  319. - interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
  320. - assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
  321. - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
  322. - #clock-cells = <1>;
  323. - clock-names = "mclk";
  324. - clocks = <&cru I2S1_MCLKOUT_TX>;
  325. - pinctrl-names = "default";
  326. - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
  327. - rockchip,system-power-controller;
  328. - #sound-dai-cells = <0>;
  329. - wakeup-source;
  330. -
  331. - vcc1-supply = <&vcc3v3_sys>;
  332. - vcc2-supply = <&vcc3v3_sys>;
  333. - vcc3-supply = <&vcc3v3_sys>;
  334. - vcc4-supply = <&vcc3v3_sys>;
  335. - vcc5-supply = <&vcc3v3_sys>;
  336. - vcc6-supply = <&vcc3v3_sys>;
  337. - vcc7-supply = <&vcc3v3_sys>;
  338. - vcc8-supply = <&vcc3v3_sys>;
  339. - vcc9-supply = <&vcc3v3_sys>;
  340. -
  341. - regulators {
  342. - vdd_logic: DCDC_REG1 {
  343. - regulator-always-on;
  344. - regulator-boot-on;
  345. - regulator-init-microvolt = <900000>;
  346. - regulator-initial-mode = <0x2>;
  347. - regulator-min-microvolt = <500000>;
  348. - regulator-max-microvolt = <1350000>;
  349. - regulator-name = "vdd_logic";
  350. - regulator-ramp-delay = <6001>;
  351. -
  352. - regulator-state-mem {
  353. - regulator-off-in-suspend;
  354. - };
  355. - };
  356. -
  357. - vdd_gpu: DCDC_REG2 {
  358. - regulator-always-on;
  359. - regulator-init-microvolt = <900000>;
  360. - regulator-initial-mode = <0x2>;
  361. - regulator-min-microvolt = <500000>;
  362. - regulator-max-microvolt = <1350000>;
  363. - regulator-name = "vdd_gpu";
  364. - regulator-ramp-delay = <6001>;
  365. -
  366. - regulator-state-mem {
  367. - regulator-off-in-suspend;
  368. - };
  369. - };
  370. -
  371. - vcc_ddr: DCDC_REG3 {
  372. - regulator-always-on;
  373. - regulator-boot-on;
  374. - regulator-initial-mode = <0x2>;
  375. - regulator-name = "vcc_ddr";
  376. -
  377. - regulator-state-mem {
  378. - regulator-on-in-suspend;
  379. - };
  380. - };
  381. -
  382. - vdd_npu: DCDC_REG4 {
  383. - regulator-init-microvolt = <900000>;
  384. - regulator-initial-mode = <0x2>;
  385. - regulator-min-microvolt = <500000>;
  386. - regulator-max-microvolt = <1350000>;
  387. - regulator-name = "vdd_npu";
  388. - regulator-ramp-delay = <6001>;
  389. -
  390. - regulator-state-mem {
  391. - regulator-off-in-suspend;
  392. - };
  393. - };
  394. -
  395. - vcc_1v8: DCDC_REG5 {
  396. - regulator-always-on;
  397. - regulator-boot-on;
  398. - regulator-min-microvolt = <1800000>;
  399. - regulator-max-microvolt = <1800000>;
  400. - regulator-name = "vcc_1v8";
  401. -
  402. - regulator-state-mem {
  403. - regulator-off-in-suspend;
  404. - };
  405. - };
  406. -
  407. - vdda0v9_image: LDO_REG1 {
  408. - regulator-name = "vdda0v9_image";
  409. - regulator-min-microvolt = <900000>;
  410. - regulator-max-microvolt = <900000>;
  411. -
  412. - regulator-state-mem {
  413. - regulator-off-in-suspend;
  414. - };
  415. - };
  416. -
  417. - vdda_0v9: LDO_REG2 {
  418. - regulator-always-on;
  419. - regulator-boot-on;
  420. - regulator-min-microvolt = <900000>;
  421. - regulator-max-microvolt = <900000>;
  422. - regulator-name = "vdda_0v9";
  423. -
  424. - regulator-state-mem {
  425. - regulator-off-in-suspend;
  426. - };
  427. - };
  428. -
  429. - vdda0v9_pmu: LDO_REG3 {
  430. - regulator-always-on;
  431. - regulator-boot-on;
  432. - regulator-min-microvolt = <900000>;
  433. - regulator-max-microvolt = <900000>;
  434. - regulator-name = "vdda0v9_pmu";
  435. -
  436. - regulator-state-mem {
  437. - regulator-on-in-suspend;
  438. - regulator-suspend-microvolt = <900000>;
  439. - };
  440. - };
  441. -
  442. - vccio_acodec: LDO_REG4 {
  443. - regulator-min-microvolt = <3300000>;
  444. - regulator-max-microvolt = <3300000>;
  445. - regulator-name = "vccio_acodec";
  446. -
  447. - regulator-state-mem {
  448. - regulator-off-in-suspend;
  449. - };
  450. - };
  451. -
  452. - vccio_sd: LDO_REG5 {
  453. - regulator-min-microvolt = <1800000>;
  454. - regulator-max-microvolt = <3300000>;
  455. - regulator-name = "vccio_sd";
  456. -
  457. - regulator-state-mem {
  458. - regulator-off-in-suspend;
  459. - };
  460. - };
  461. -
  462. - vcc3v3_pmu: LDO_REG6 {
  463. - regulator-always-on;
  464. - regulator-boot-on;
  465. - regulator-min-microvolt = <3300000>;
  466. - regulator-max-microvolt = <3300000>;
  467. - regulator-name = "vcc3v3_pmu";
  468. -
  469. - regulator-state-mem {
  470. - regulator-on-in-suspend;
  471. - regulator-suspend-microvolt = <3300000>;
  472. - };
  473. - };
  474. -
  475. - vcca_1v8: LDO_REG7 {
  476. - regulator-always-on;
  477. - regulator-boot-on;
  478. - regulator-min-microvolt = <1800000>;
  479. - regulator-max-microvolt = <1800000>;
  480. - regulator-name = "vcca_1v8";
  481. -
  482. - regulator-state-mem {
  483. - regulator-off-in-suspend;
  484. - };
  485. - };
  486. -
  487. - vcca1v8_pmu: LDO_REG8 {
  488. - regulator-always-on;
  489. - regulator-boot-on;
  490. - regulator-min-microvolt = <1800000>;
  491. - regulator-max-microvolt = <1800000>;
  492. - regulator-name = "vcca1v8_pmu";
  493. -
  494. - regulator-state-mem {
  495. - regulator-on-in-suspend;
  496. - regulator-suspend-microvolt = <1800000>;
  497. - };
  498. - };
  499. -
  500. - vcca1v8_image: LDO_REG9 {
  501. - regulator-min-microvolt = <1800000>;
  502. - regulator-max-microvolt = <1800000>;
  503. - regulator-name = "vcca1v8_image";
  504. -
  505. - regulator-state-mem {
  506. - regulator-off-in-suspend;
  507. - };
  508. - };
  509. -
  510. - vcc_3v3: SWITCH_REG1 {
  511. - regulator-name = "vcc_3v3";
  512. - regulator-always-on;
  513. - regulator-boot-on;
  514. -
  515. - regulator-state-mem {
  516. - regulator-off-in-suspend;
  517. - };
  518. - };
  519. -
  520. - vcc3v3_sd: SWITCH_REG2 {
  521. - regulator-name = "vcc3v3_sd";
  522. -
  523. - regulator-state-mem {
  524. - regulator-off-in-suspend;
  525. - };
  526. - };
  527. - };
  528. - };
  529. -};
  530. -
  531. -&i2c5 {
  532. - status = "okay";
  533. -};
  534. -
  535. -&i2s0_8ch {
  536. - status = "okay";
  537. -};
  538. -
  539. -&pcie2x1 {
  540. - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
  541. - vpcie3v3-supply = <&vcc3v3_pcie>;
  542. - status = "okay";
  543. -};
  544. -
  545. -&pcie30phy {
  546. - data-lanes = <1 2>;
  547. - status = "okay";
  548. -};
  549. -
  550. -&pcie3x1 {
  551. - num-lanes = <1>;
  552. - reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
  553. - vpcie3v3-supply = <&vcc3v3_pcie>;
  554. - status = "okay";
  555. -};
  556. -
  557. -&pcie3x2 {
  558. - num-lanes = <1>;
  559. - reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>;
  560. - vpcie3v3-supply = <&vcc3v3_pcie>;
  561. - status = "okay";
  562. -};
  563. -
  564. -&pinctrl {
  565. - leds {
  566. - led_lan_pin: led-lan-pin {
  567. - rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
  568. - };
  569. -
  570. - led_power_pin: led-power-pin {
  571. - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
  572. - };
  573. -
  574. - led_wan_pin: led-wan-pin {
  575. - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
  576. - };
  577. - };
  578. -
  579. - pmic {
  580. - pmic_int: pmic-int {
  581. - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
  582. - };
  583. - };
  584. -
  585. - rockchip-key {
  586. - reset_button_pin: reset-button-pin {
  587. - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
  588. - };
  589. - };
  590. -
  591. - usb {
  592. - vcc5v0_usb_host_en: vcc5v0-usb-host-en {
  593. - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
  594. - };
  595. - };
  596. -};
  597. -
  598. -&pmu_io_domains {
  599. - pmuio1-supply = <&vcc3v3_pmu>;
  600. - pmuio2-supply = <&vcc3v3_pmu>;
  601. - vccio1-supply = <&vccio_acodec>;
  602. - vccio2-supply = <&vcc_1v8>;
  603. - vccio3-supply = <&vccio_sd>;
  604. - vccio4-supply = <&vcc_1v8>;
  605. - vccio5-supply = <&vcc_3v3>;
  606. - vccio6-supply = <&vcc_1v8>;
  607. - vccio7-supply = <&vcc_3v3>;
  608. - status = "okay";
  609. -};
  610. -
  611. -&pwm0 {
  612. - status = "okay";
  613. -};
  614. -
  615. -&saradc {
  616. - vref-supply = <&vcca_1v8>;
  617. - status = "okay";
  618. -};
  619. -
  620. -&sata0 {
  621. - status = "okay";
  622. -};
  623. -
  624. -&sdhci {
  625. - bus-width = <8>;
  626. - cap-mmc-highspeed;
  627. - max-frequency = <200000000>;
  628. - mmc-hs200-1_8v;
  629. - no-sdio;
  630. - no-sd;
  631. - non-removable;
  632. - pinctrl-names = "default";
  633. - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
  634. - status = "okay";
  635. -};
  636. -
  637. -&sdmmc0 {
  638. - bus-width = <4>;
  639. - cap-sd-highspeed;
  640. - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
  641. - disable-wp;
  642. - pinctrl-names = "default";
  643. - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
  644. - sd-uhs-sdr50;
  645. - vmmc-supply = <&vcc3v3_sd>;
  646. - vqmmc-supply = <&vccio_sd>;
  647. - status = "okay";
  648. -};
  649. -
  650. -&tsadc {
  651. - rockchip,hw-tshut-mode = <1>;
  652. - rockchip,hw-tshut-polarity = <0>;
  653. - status = "okay";
  654. -};
  655. -
  656. -&uart2 {
  657. - status = "okay";
  658. -};
  659. -
  660. -&usb_host0_ehci {
  661. - status = "okay";
  662. -};
  663. -
  664. -&usb_host0_ohci {
  665. - status = "okay";
  666. -};
  667. -
  668. -&usb_host1_ehci {
  669. - status = "okay";
  670. -};
  671. -
  672. -&usb_host1_ohci {
  673. - status = "okay";
  674. -};
  675. -
  676. -&usb_host1_xhci {
  677. - status = "okay";
  678. -};
  679. -
  680. -&usb2phy0 {
  681. - status = "okay";
  682. -};
  683. -
  684. -&usb2phy0_host {
  685. - phy-supply = <&vcc5v0_usb_host>;
  686. - status = "okay";
  687. -};
  688. -
  689. -&usb2phy1 {
  690. - status = "okay";
  691. -};
  692. -
  693. -&usb2phy1_host {
  694. - phy-supply = <&vcc5v0_usb_host>;
  695. - status = "okay";
  696. -};
  697. -
  698. -&usb2phy1_otg {
  699. - phy-supply = <&vcc5v0_usb_host>;
  700. - status = "okay";
  701. -};
  702. -
  703. -&vop {
  704. - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
  705. - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
  706. - status = "okay";
  707. -};
  708. -
  709. -&vop_mmu {
  710. - status = "okay";
  711. -};
  712. -
  713. -&vp0 {
  714. - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
  715. - reg = <ROCKCHIP_VOP2_EP_HDMI0>;
  716. - remote-endpoint = <&hdmi_in_vp0>;
  717. - };
  718. -};
  719. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi
  720. deleted file mode 100644
  721. index d11f9160d1f..00000000000
  722. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k-u-boot.dtsi
  723. +++ /dev/null
  724. @@ -1,3 +0,0 @@
  725. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  726. -
  727. -#include "rk3568-opc-h66k-u-boot.dtsi"
  728. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k.dts
  729. deleted file mode 100644
  730. index 3e6c801e877..00000000000
  731. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h68k.dts
  732. +++ /dev/null
  733. @@ -1,78 +0,0 @@
  734. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  735. -/*
  736. - * Copyright (c) 2022 AmadeusGhost <[email protected]>
  737. - */
  738. -
  739. -/dts-v1/;
  740. -
  741. -#include "rk3568-opc-h66k.dtsi"
  742. -
  743. -/ {
  744. - model = "Hinlink OPC-H68K";
  745. - compatible = "hinlink,opc-h68k", "rockchip,rk3568";
  746. -
  747. - aliases {
  748. - ethernet0 = &gmac0;
  749. - ethernet1 = &gmac1;
  750. - };
  751. -};
  752. -
  753. -&gmac0 {
  754. - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
  755. - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
  756. - assigned-clock-rates = <0>, <125000000>;
  757. - clock_in_out = "output";
  758. - phy-mode = "rgmii-id";
  759. - pinctrl-names = "default";
  760. - pinctrl-0 = <&gmac0_miim
  761. - &gmac0_tx_bus2
  762. - &gmac0_rx_bus2
  763. - &gmac0_rgmii_clk
  764. - &gmac0_rgmii_bus>;
  765. - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
  766. - snps,reset-active-low;
  767. - snps,reset-delays-us = <0 20000 100000>;
  768. - tx_delay = <0x3c>;
  769. - rx_delay = <0x2f>;
  770. - phy-handle = <&rgmii_phy0>;
  771. - status = "okay";
  772. -};
  773. -
  774. -&gmac1 {
  775. - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
  776. - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
  777. - assigned-clock-rates = <0>, <125000000>;
  778. - clock_in_out = "output";
  779. - phy-mode = "rgmii-id";
  780. - pinctrl-names = "default";
  781. - pinctrl-0 = <&gmac1m1_miim
  782. - &gmac1m1_tx_bus2
  783. - &gmac1m1_rx_bus2
  784. - &gmac1m1_rgmii_clk
  785. - &gmac1m1_rgmii_bus>;
  786. - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
  787. - snps,reset-active-low;
  788. - snps,reset-delays-us = <0 20000 100000>;
  789. - tx_delay = <0x4f>;
  790. - rx_delay = <0x26>;
  791. - phy-handle = <&rgmii_phy1>;
  792. - status = "okay";
  793. -};
  794. -
  795. -&mdio0 {
  796. - rgmii_phy0: ethernet-phy@0 {
  797. - compatible = "ethernet-phy-ieee802.3-c22";
  798. - reg = <0x0>;
  799. - };
  800. -};
  801. -
  802. -&mdio1 {
  803. - rgmii_phy1: ethernet-phy@0 {
  804. - compatible = "ethernet-phy-ieee802.3-c22";
  805. - reg = <0x0>;
  806. - };
  807. -};
  808. -
  809. -&vcc3v3_pcie {
  810. - gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
  811. -};
  812. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k-u-boot.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k-u-boot.dtsi
  813. deleted file mode 100644
  814. index d11f9160d1f..00000000000
  815. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k-u-boot.dtsi
  816. +++ /dev/null
  817. @@ -1,3 +0,0 @@
  818. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  819. -
  820. -#include "rk3568-opc-h66k-u-boot.dtsi"
  821. diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k.dts
  822. deleted file mode 100644
  823. index 5e183931599..00000000000
  824. --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-opc-h69k.dts
  825. +++ /dev/null
  826. @@ -1,74 +0,0 @@
  827. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  828. -/*
  829. - * Copyright (c) 2023 AmadeusGhost <[email protected]>
  830. - */
  831. -
  832. -/dts-v1/;
  833. -
  834. -#include "rk3568-opc-h66k.dtsi"
  835. -
  836. -/ {
  837. - model = "HINLINK OPC-H69K Board";
  838. - compatible = "hinlink,opc-h69k", "rockchip,rk3568";
  839. -
  840. - aliases {
  841. - ethernet0 = &gmac1;
  842. - };
  843. -
  844. - vcc5v0_ahci: vcc5v0-ahci-regulator {
  845. - compatible = "regulator-fixed";
  846. - enable-active-high;
  847. - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
  848. - pinctrl-names = "default";
  849. - pinctrl-0 = <&sata_pwr_en>;
  850. - regulator-always-on;
  851. - regulator-min-microvolt = <5000000>;
  852. - regulator-max-microvolt = <5000000>;
  853. - regulator-name = "vcc5v0_ahci";
  854. - vin-supply = <&vcc5v0_sys>;
  855. - };
  856. -};
  857. -
  858. -&gmac1 {
  859. - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
  860. - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
  861. - assigned-clock-rates = <0>, <125000000>;
  862. - clock_in_out = "output";
  863. - phy-mode = "rgmii-id";
  864. - pinctrl-names = "default";
  865. - pinctrl-0 = <&gmac1m1_miim
  866. - &gmac1m1_tx_bus2
  867. - &gmac1m1_rx_bus2
  868. - &gmac1m1_rgmii_clk
  869. - &gmac1m1_rgmii_bus>;
  870. - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
  871. - snps,reset-active-low;
  872. - snps,reset-delays-us = <0 20000 100000>;
  873. - tx_delay = <0x4f>;
  874. - rx_delay = <0x26>;
  875. - phy-handle = <&rgmii_phy1>;
  876. - status = "okay";
  877. -};
  878. -
  879. -&mdio1 {
  880. - rgmii_phy1: ethernet-phy@0 {
  881. - compatible = "ethernet-phy-ieee802.3-c22";
  882. - reg = <0x0>;
  883. - };
  884. -};
  885. -
  886. -&pinctrl {
  887. - sata {
  888. - sata_pwr_en: sata-pwr-en {
  889. - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
  890. - };
  891. - };
  892. -};
  893. -
  894. -&sata0 {
  895. - target-supply = <&vcc5v0_ahci>;
  896. -};
  897. -
  898. -&vcc3v3_pcie {
  899. - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
  900. -};
  901. diff --git a/package/boot/uboot-rockchip/src/configs/opc-h66k-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/opc-h66k-rk3568_defconfig
  902. deleted file mode 100644
  903. index c98b528f0e9..00000000000
  904. --- a/package/boot/uboot-rockchip/src/configs/opc-h66k-rk3568_defconfig
  905. +++ /dev/null
  906. @@ -1,85 +0,0 @@
  907. -CONFIG_ARM=y
  908. -CONFIG_SKIP_LOWLEVEL_INIT=y
  909. -CONFIG_COUNTER_FREQUENCY=24000000
  910. -CONFIG_ARCH_ROCKCHIP=y
  911. -CONFIG_TEXT_BASE=0x00a00000
  912. -CONFIG_SPL_LIBCOMMON_SUPPORT=y
  913. -CONFIG_SPL_LIBGENERIC_SUPPORT=y
  914. -CONFIG_NR_DRAM_BANKS=2
  915. -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
  916. -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
  917. -CONFIG_DEFAULT_DEVICE_TREE="rk3568-opc-h66k"
  918. -CONFIG_ROCKCHIP_RK3568=y
  919. -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
  920. -CONFIG_SPL_SERIAL=y
  921. -CONFIG_SPL_STACK_R_ADDR=0x600000
  922. -CONFIG_TARGET_EVB_RK3568=y
  923. -CONFIG_SPL_STACK=0x400000
  924. -CONFIG_DEBUG_UART_BASE=0xFE660000
  925. -CONFIG_DEBUG_UART_CLOCK=24000000
  926. -CONFIG_SYS_LOAD_ADDR=0xc00800
  927. -CONFIG_DEBUG_UART=y
  928. -CONFIG_FIT=y
  929. -CONFIG_FIT_VERBOSE=y
  930. -CONFIG_SPL_LOAD_FIT=y
  931. -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-opc-h66k.dtb"
  932. -# CONFIG_DISPLAY_CPUINFO is not set
  933. -CONFIG_DISPLAY_BOARDINFO_LATE=y
  934. -CONFIG_SPL_MAX_SIZE=0x40000
  935. -CONFIG_SPL_PAD_TO=0x7f8000
  936. -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
  937. -CONFIG_SPL_BSS_START_ADDR=0x4000000
  938. -CONFIG_SPL_BSS_MAX_SIZE=0x4000
  939. -# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
  940. -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
  941. -CONFIG_SPL_STACK_R=y
  942. -CONFIG_SPL_ATF=y
  943. -CONFIG_CMD_GPIO=y
  944. -CONFIG_CMD_GPT=y
  945. -CONFIG_CMD_I2C=y
  946. -CONFIG_CMD_MMC=y
  947. -CONFIG_CMD_USB=y
  948. -CONFIG_CMD_PMIC=y
  949. -CONFIG_CMD_REGULATOR=y
  950. -# CONFIG_SPL_DOS_PARTITION is not set
  951. -CONFIG_SPL_OF_CONTROL=y
  952. -CONFIG_OF_LIVE=y
  953. -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  954. -CONFIG_SPL_DM_WARN=y
  955. -CONFIG_SPL_REGMAP=y
  956. -CONFIG_SPL_SYSCON=y
  957. -CONFIG_SPL_CLK=y
  958. -CONFIG_ROCKCHIP_GPIO=y
  959. -CONFIG_SYS_I2C_ROCKCHIP=y
  960. -CONFIG_MISC=y
  961. -CONFIG_SUPPORT_EMMC_RPMB=y
  962. -CONFIG_MMC_DW=y
  963. -CONFIG_MMC_DW_ROCKCHIP=y
  964. -CONFIG_MMC_SDHCI=y
  965. -CONFIG_MMC_SDHCI_SDMA=y
  966. -CONFIG_MMC_SDHCI_ROCKCHIP=y
  967. -CONFIG_ETH_DESIGNWARE=y
  968. -CONFIG_GMAC_ROCKCHIP=y
  969. -CONFIG_PHY_ROCKCHIP_INNO_USB2=y
  970. -CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
  971. -CONFIG_POWER_DOMAIN=y
  972. -CONFIG_DM_PMIC=y
  973. -CONFIG_PMIC_RK8XX=y
  974. -CONFIG_SPL_DM_REGULATOR_FIXED=y
  975. -CONFIG_REGULATOR_RK8XX=y
  976. -CONFIG_PWM_ROCKCHIP=y
  977. -CONFIG_SPL_RAM=y
  978. -CONFIG_BAUDRATE=1500000
  979. -CONFIG_DEBUG_UART_SHIFT=2
  980. -CONFIG_SYS_NS16550_MEM32=y
  981. -CONFIG_SYSRESET=y
  982. -CONFIG_SYSRESET_PSCI=y
  983. -CONFIG_USB=y
  984. -CONFIG_USB_XHCI_HCD=y
  985. -CONFIG_USB_XHCI_DWC3=y
  986. -CONFIG_USB_EHCI_HCD=y
  987. -CONFIG_USB_EHCI_GENERIC=y
  988. -CONFIG_USB_OHCI_HCD=y
  989. -CONFIG_USB_OHCI_GENERIC=y
  990. -CONFIG_USB_DWC3=y
  991. -CONFIG_ERRNO_STR=y
  992. diff --git a/package/boot/uboot-rockchip/src/configs/opc-h68k-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/opc-h68k-rk3568_defconfig
  993. deleted file mode 100644
  994. index c2a8435f4bc..00000000000
  995. --- a/package/boot/uboot-rockchip/src/configs/opc-h68k-rk3568_defconfig
  996. +++ /dev/null
  997. @@ -1,85 +0,0 @@
  998. -CONFIG_ARM=y
  999. -CONFIG_SKIP_LOWLEVEL_INIT=y
  1000. -CONFIG_COUNTER_FREQUENCY=24000000
  1001. -CONFIG_ARCH_ROCKCHIP=y
  1002. -CONFIG_TEXT_BASE=0x00a00000
  1003. -CONFIG_SPL_LIBCOMMON_SUPPORT=y
  1004. -CONFIG_SPL_LIBGENERIC_SUPPORT=y
  1005. -CONFIG_NR_DRAM_BANKS=2
  1006. -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
  1007. -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
  1008. -CONFIG_DEFAULT_DEVICE_TREE="rk3568-opc-h68k"
  1009. -CONFIG_ROCKCHIP_RK3568=y
  1010. -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
  1011. -CONFIG_SPL_SERIAL=y
  1012. -CONFIG_SPL_STACK_R_ADDR=0x600000
  1013. -CONFIG_TARGET_EVB_RK3568=y
  1014. -CONFIG_SPL_STACK=0x400000
  1015. -CONFIG_DEBUG_UART_BASE=0xFE660000
  1016. -CONFIG_DEBUG_UART_CLOCK=24000000
  1017. -CONFIG_SYS_LOAD_ADDR=0xc00800
  1018. -CONFIG_DEBUG_UART=y
  1019. -CONFIG_FIT=y
  1020. -CONFIG_FIT_VERBOSE=y
  1021. -CONFIG_SPL_LOAD_FIT=y
  1022. -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-opc-h68k.dtb"
  1023. -# CONFIG_DISPLAY_CPUINFO is not set
  1024. -CONFIG_DISPLAY_BOARDINFO_LATE=y
  1025. -CONFIG_SPL_MAX_SIZE=0x40000
  1026. -CONFIG_SPL_PAD_TO=0x7f8000
  1027. -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
  1028. -CONFIG_SPL_BSS_START_ADDR=0x4000000
  1029. -CONFIG_SPL_BSS_MAX_SIZE=0x4000
  1030. -# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
  1031. -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
  1032. -CONFIG_SPL_STACK_R=y
  1033. -CONFIG_SPL_ATF=y
  1034. -CONFIG_CMD_GPIO=y
  1035. -CONFIG_CMD_GPT=y
  1036. -CONFIG_CMD_I2C=y
  1037. -CONFIG_CMD_MMC=y
  1038. -CONFIG_CMD_USB=y
  1039. -CONFIG_CMD_PMIC=y
  1040. -CONFIG_CMD_REGULATOR=y
  1041. -# CONFIG_SPL_DOS_PARTITION is not set
  1042. -CONFIG_SPL_OF_CONTROL=y
  1043. -CONFIG_OF_LIVE=y
  1044. -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  1045. -CONFIG_SPL_DM_WARN=y
  1046. -CONFIG_SPL_REGMAP=y
  1047. -CONFIG_SPL_SYSCON=y
  1048. -CONFIG_SPL_CLK=y
  1049. -CONFIG_ROCKCHIP_GPIO=y
  1050. -CONFIG_SYS_I2C_ROCKCHIP=y
  1051. -CONFIG_MISC=y
  1052. -CONFIG_SUPPORT_EMMC_RPMB=y
  1053. -CONFIG_MMC_DW=y
  1054. -CONFIG_MMC_DW_ROCKCHIP=y
  1055. -CONFIG_MMC_SDHCI=y
  1056. -CONFIG_MMC_SDHCI_SDMA=y
  1057. -CONFIG_MMC_SDHCI_ROCKCHIP=y
  1058. -CONFIG_ETH_DESIGNWARE=y
  1059. -CONFIG_GMAC_ROCKCHIP=y
  1060. -CONFIG_PHY_ROCKCHIP_INNO_USB2=y
  1061. -CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
  1062. -CONFIG_POWER_DOMAIN=y
  1063. -CONFIG_DM_PMIC=y
  1064. -CONFIG_PMIC_RK8XX=y
  1065. -CONFIG_SPL_DM_REGULATOR_FIXED=y
  1066. -CONFIG_REGULATOR_RK8XX=y
  1067. -CONFIG_PWM_ROCKCHIP=y
  1068. -CONFIG_SPL_RAM=y
  1069. -CONFIG_BAUDRATE=1500000
  1070. -CONFIG_DEBUG_UART_SHIFT=2
  1071. -CONFIG_SYS_NS16550_MEM32=y
  1072. -CONFIG_SYSRESET=y
  1073. -CONFIG_SYSRESET_PSCI=y
  1074. -CONFIG_USB=y
  1075. -CONFIG_USB_XHCI_HCD=y
  1076. -CONFIG_USB_XHCI_DWC3=y
  1077. -CONFIG_USB_EHCI_HCD=y
  1078. -CONFIG_USB_EHCI_GENERIC=y
  1079. -CONFIG_USB_OHCI_HCD=y
  1080. -CONFIG_USB_OHCI_GENERIC=y
  1081. -CONFIG_USB_DWC3=y
  1082. -CONFIG_ERRNO_STR=y
  1083. diff --git a/package/boot/uboot-rockchip/src/configs/opc-h69k-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/opc-h69k-rk3568_defconfig
  1084. deleted file mode 100644
  1085. index 7045f4dd343..00000000000
  1086. --- a/package/boot/uboot-rockchip/src/configs/opc-h69k-rk3568_defconfig
  1087. +++ /dev/null
  1088. @@ -1,85 +0,0 @@
  1089. -CONFIG_ARM=y
  1090. -CONFIG_SKIP_LOWLEVEL_INIT=y
  1091. -CONFIG_COUNTER_FREQUENCY=24000000
  1092. -CONFIG_ARCH_ROCKCHIP=y
  1093. -CONFIG_TEXT_BASE=0x00a00000
  1094. -CONFIG_SPL_LIBCOMMON_SUPPORT=y
  1095. -CONFIG_SPL_LIBGENERIC_SUPPORT=y
  1096. -CONFIG_NR_DRAM_BANKS=2
  1097. -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
  1098. -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
  1099. -CONFIG_DEFAULT_DEVICE_TREE="rk3568-opc-h69k"
  1100. -CONFIG_ROCKCHIP_RK3568=y
  1101. -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
  1102. -CONFIG_SPL_SERIAL=y
  1103. -CONFIG_SPL_STACK_R_ADDR=0x600000
  1104. -CONFIG_TARGET_EVB_RK3568=y
  1105. -CONFIG_SPL_STACK=0x400000
  1106. -CONFIG_DEBUG_UART_BASE=0xFE660000
  1107. -CONFIG_DEBUG_UART_CLOCK=24000000
  1108. -CONFIG_SYS_LOAD_ADDR=0xc00800
  1109. -CONFIG_DEBUG_UART=y
  1110. -CONFIG_FIT=y
  1111. -CONFIG_FIT_VERBOSE=y
  1112. -CONFIG_SPL_LOAD_FIT=y
  1113. -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-opc-h69k.dtb"
  1114. -# CONFIG_DISPLAY_CPUINFO is not set
  1115. -CONFIG_DISPLAY_BOARDINFO_LATE=y
  1116. -CONFIG_SPL_MAX_SIZE=0x40000
  1117. -CONFIG_SPL_PAD_TO=0x7f8000
  1118. -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
  1119. -CONFIG_SPL_BSS_START_ADDR=0x4000000
  1120. -CONFIG_SPL_BSS_MAX_SIZE=0x4000
  1121. -# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
  1122. -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
  1123. -CONFIG_SPL_STACK_R=y
  1124. -CONFIG_SPL_ATF=y
  1125. -CONFIG_CMD_GPIO=y
  1126. -CONFIG_CMD_GPT=y
  1127. -CONFIG_CMD_I2C=y
  1128. -CONFIG_CMD_MMC=y
  1129. -CONFIG_CMD_USB=y
  1130. -CONFIG_CMD_PMIC=y
  1131. -CONFIG_CMD_REGULATOR=y
  1132. -# CONFIG_SPL_DOS_PARTITION is not set
  1133. -CONFIG_SPL_OF_CONTROL=y
  1134. -CONFIG_OF_LIVE=y
  1135. -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  1136. -CONFIG_SPL_DM_WARN=y
  1137. -CONFIG_SPL_REGMAP=y
  1138. -CONFIG_SPL_SYSCON=y
  1139. -CONFIG_SPL_CLK=y
  1140. -CONFIG_ROCKCHIP_GPIO=y
  1141. -CONFIG_SYS_I2C_ROCKCHIP=y
  1142. -CONFIG_MISC=y
  1143. -CONFIG_SUPPORT_EMMC_RPMB=y
  1144. -CONFIG_MMC_DW=y
  1145. -CONFIG_MMC_DW_ROCKCHIP=y
  1146. -CONFIG_MMC_SDHCI=y
  1147. -CONFIG_MMC_SDHCI_SDMA=y
  1148. -CONFIG_MMC_SDHCI_ROCKCHIP=y
  1149. -CONFIG_ETH_DESIGNWARE=y
  1150. -CONFIG_GMAC_ROCKCHIP=y
  1151. -CONFIG_PHY_ROCKCHIP_INNO_USB2=y
  1152. -CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
  1153. -CONFIG_POWER_DOMAIN=y
  1154. -CONFIG_DM_PMIC=y
  1155. -CONFIG_PMIC_RK8XX=y
  1156. -CONFIG_SPL_DM_REGULATOR_FIXED=y
  1157. -CONFIG_REGULATOR_RK8XX=y
  1158. -CONFIG_PWM_ROCKCHIP=y
  1159. -CONFIG_SPL_RAM=y
  1160. -CONFIG_BAUDRATE=1500000
  1161. -CONFIG_DEBUG_UART_SHIFT=2
  1162. -CONFIG_SYS_NS16550_MEM32=y
  1163. -CONFIG_SYSRESET=y
  1164. -CONFIG_SYSRESET_PSCI=y
  1165. -CONFIG_USB=y
  1166. -CONFIG_USB_XHCI_HCD=y
  1167. -CONFIG_USB_XHCI_DWC3=y
  1168. -CONFIG_USB_EHCI_HCD=y
  1169. -CONFIG_USB_EHCI_GENERIC=y
  1170. -CONFIG_USB_OHCI_HCD=y
  1171. -CONFIG_USB_OHCI_GENERIC=y
  1172. -CONFIG_USB_DWC3=y
  1173. -CONFIG_ERRNO_STR=y
  1174. diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
  1175. index 0a631349591..6b6109bb928 100644
  1176. --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
  1177. +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
  1178. @@ -37,18 +37,6 @@ friendlyarm,nanopi-r6s)
  1179. ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1"
  1180. ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth0"
  1181. ;;
  1182. -hinlink,opc-h66k)
  1183. - ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth0"
  1184. - ucidef_set_led_netdev "lan" "LAN" "amber:lan" "eth1"
  1185. - ;;
  1186. -hinlink,opc-h68k)
  1187. - ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth3"
  1188. - ucidef_set_led_netdev "lan" "LAN" "amber:lan" "br-lan"
  1189. - ;;
  1190. -hinlink,opc-h69k)
  1191. - ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth2"
  1192. - ucidef_set_led_netdev "lan" "LAN" "amber:lan" "br-lan"
  1193. - ;;
  1194. esac
  1195. board_config_flush
  1196. diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts
  1197. deleted file mode 100644
  1198. index c86119a23b9..00000000000
  1199. --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts
  1200. +++ /dev/null
  1201. @@ -1,17 +0,0 @@
  1202. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1203. -/*
  1204. - * Copyright (c) 2022 AmadeusGhost <[email protected]>
  1205. - */
  1206. -
  1207. -/dts-v1/;
  1208. -
  1209. -#include "rk3568-opc-h66k.dtsi"
  1210. -
  1211. -/ {
  1212. - model = "Hinlink OPC-H66K";
  1213. - compatible = "hinlink,opc-h66k", "rockchip,rk3568";
  1214. -};
  1215. -
  1216. -&vcc3v3_pcie {
  1217. - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
  1218. -};
  1219. diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dtsi b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dtsi
  1220. deleted file mode 100644
  1221. index 4e4d76b71e4..00000000000
  1222. --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dtsi
  1223. +++ /dev/null
  1224. @@ -1,623 +0,0 @@
  1225. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1226. -/*
  1227. - * Copyright (c) 2022 AmadeusGhost <[email protected]>
  1228. - */
  1229. -
  1230. -#include <dt-bindings/gpio/gpio.h>
  1231. -#include <dt-bindings/input/input.h>
  1232. -#include <dt-bindings/pinctrl/rockchip.h>
  1233. -#include <dt-bindings/soc/rockchip,vop2.h>
  1234. -#include "rk3568.dtsi"
  1235. -
  1236. -/ {
  1237. - aliases {
  1238. - mmc0 = &sdhci;
  1239. - mmc1 = &sdmmc0;
  1240. -
  1241. - led-boot = &power_led;
  1242. - led-failsafe = &power_led;
  1243. - led-running = &power_led;
  1244. - led-upgrade = &power_led;
  1245. - };
  1246. -
  1247. - chosen {
  1248. - stdout-path = "serial2:1500000n8";
  1249. - };
  1250. -
  1251. - hdmi-con {
  1252. - compatible = "hdmi-connector";
  1253. - type = "a";
  1254. -
  1255. - port {
  1256. - hdmi_con_in: endpoint {
  1257. - remote-endpoint = <&hdmi_out_con>;
  1258. - };
  1259. - };
  1260. - };
  1261. -
  1262. - gpio-keys {
  1263. - compatible = "gpio-keys";
  1264. - pinctrl-0 = <&reset_button_pin>;
  1265. - pinctrl-names = "default";
  1266. -
  1267. - reset {
  1268. - label = "reset";
  1269. - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
  1270. - linux,code = <KEY_RESTART>;
  1271. - debounce-interval = <50>;
  1272. - };
  1273. - };
  1274. -
  1275. - gpio-leds {
  1276. - compatible = "gpio-leds";
  1277. - pinctrl-names = "default";
  1278. - pinctrl-0 = <&led_lan_pin>, <&led_power_pin>, <&led_wan_pin>;
  1279. -
  1280. - led-lan {
  1281. - label = "amber:lan";
  1282. - gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
  1283. - };
  1284. -
  1285. - power_led: led-power {
  1286. - label = "green:power";
  1287. - gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
  1288. - };
  1289. -
  1290. - led-wan {
  1291. - label = "blue:wan";
  1292. - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
  1293. - };
  1294. - };
  1295. -
  1296. - pwm-fan {
  1297. - compatible = "pwm-fan";
  1298. - cooling-levels = <0 100 150 200 255>;
  1299. - #cooling-cells = <2>;
  1300. - pwms = <&pwm0 0 50000 0>;
  1301. - };
  1302. -
  1303. - vcc12v_dcin: vcc12v-dcin-regulator {
  1304. - compatible = "regulator-fixed";
  1305. - regulator-always-on;
  1306. - regulator-boot-on;
  1307. - regulator-min-microvolt = <12000000>;
  1308. - regulator-max-microvolt = <12000000>;
  1309. - regulator-name = "vcc12v_dcin";
  1310. - };
  1311. -
  1312. - vcc3v3_sys: vcc3v3-sys-regulator {
  1313. - compatible = "regulator-fixed";
  1314. - regulator-always-on;
  1315. - regulator-boot-on;
  1316. - regulator-min-microvolt = <3300000>;
  1317. - regulator-max-microvolt = <3300000>;
  1318. - regulator-name = "vcc3v3_sys";
  1319. - vin-supply = <&vcc12v_dcin>;
  1320. - };
  1321. -
  1322. - vcc5v0_sys: vcc5v0-sys-regulator {
  1323. - compatible = "regulator-fixed";
  1324. - regulator-always-on;
  1325. - regulator-boot-on;
  1326. - regulator-min-microvolt = <5000000>;
  1327. - regulator-max-microvolt = <5000000>;
  1328. - regulator-name = "vcc5v0_sys";
  1329. - vin-supply = <&vcc12v_dcin>;
  1330. - };
  1331. -
  1332. - vcc5v0_usb: vcc5v0-usb-regulator {
  1333. - compatible = "regulator-fixed";
  1334. - regulator-always-on;
  1335. - regulator-boot-on;
  1336. - regulator-min-microvolt = <5000000>;
  1337. - regulator-max-microvolt = <5000000>;
  1338. - regulator-name = "vcc5v0_usb";
  1339. - vin-supply = <&vcc12v_dcin>;
  1340. - };
  1341. -
  1342. - vcc5v0_usb_host: vcc5v0-usb-host-regulator {
  1343. - compatible = "regulator-fixed";
  1344. - enable-active-high;
  1345. - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
  1346. - pinctrl-names = "default";
  1347. - pinctrl-0 = <&vcc5v0_usb_host_en>;
  1348. - regulator-min-microvolt = <5000000>;
  1349. - regulator-max-microvolt = <5000000>;
  1350. - regulator-name = "vcc5v0_usb_host";
  1351. - vin-supply = <&vcc5v0_usb>;
  1352. - };
  1353. -
  1354. - vcc3v3_pcie: vcc3v3-pcie-regulator {
  1355. - compatible = "regulator-fixed";
  1356. - enable-active-high;
  1357. - regulator-min-microvolt = <3300000>;
  1358. - regulator-max-microvolt = <3300000>;
  1359. - regulator-name = "vcc3v3_pcie";
  1360. - startup-delay-us = <5000>;
  1361. - vin-supply = <&vcc5v0_sys>;
  1362. - };
  1363. -};
  1364. -
  1365. -&combphy0 {
  1366. - status = "okay";
  1367. -};
  1368. -
  1369. -&combphy1 {
  1370. - status = "okay";
  1371. -};
  1372. -
  1373. -&combphy2 {
  1374. - status = "okay";
  1375. -};
  1376. -
  1377. -&cpu0 {
  1378. - cpu-supply = <&vdd_cpu>;
  1379. -};
  1380. -
  1381. -&cpu1 {
  1382. - cpu-supply = <&vdd_cpu>;
  1383. -};
  1384. -
  1385. -&cpu2 {
  1386. - cpu-supply = <&vdd_cpu>;
  1387. -};
  1388. -
  1389. -&cpu3 {
  1390. - cpu-supply = <&vdd_cpu>;
  1391. -};
  1392. -
  1393. -&gpu {
  1394. - mali-supply = <&vdd_gpu>;
  1395. - status = "okay";
  1396. -};
  1397. -
  1398. -&hdmi {
  1399. - avdd-0v9-supply = <&vdda0v9_image>;
  1400. - avdd-1v8-supply = <&vcca1v8_image>;
  1401. - status = "okay";
  1402. -};
  1403. -
  1404. -&hdmi_in {
  1405. - hdmi_in_vp0: endpoint {
  1406. - remote-endpoint = <&vp0_out_hdmi>;
  1407. - };
  1408. -};
  1409. -
  1410. -&hdmi_out {
  1411. - hdmi_out_con: endpoint {
  1412. - remote-endpoint = <&hdmi_con_in>;
  1413. - };
  1414. -};
  1415. -
  1416. -&hdmi_sound {
  1417. - status = "okay";
  1418. -};
  1419. -
  1420. -&i2c0 {
  1421. - status = "okay";
  1422. -
  1423. - vdd_cpu: regulator@1c {
  1424. - compatible = "tcs,tcs4525";
  1425. - reg = <0x1c>;
  1426. - fcs,suspend-voltage-selector = <1>;
  1427. - regulator-name = "vdd_cpu";
  1428. - regulator-always-on;
  1429. - regulator-boot-on;
  1430. - regulator-min-microvolt = <712500>;
  1431. - regulator-max-microvolt = <1390000>;
  1432. - regulator-ramp-delay = <2300>;
  1433. - vin-supply = <&vcc5v0_sys>;
  1434. -
  1435. - regulator-state-mem {
  1436. - regulator-off-in-suspend;
  1437. - };
  1438. - };
  1439. -
  1440. - rk809: pmic@20 {
  1441. - compatible = "rockchip,rk809";
  1442. - reg = <0x20>;
  1443. - interrupt-parent = <&gpio0>;
  1444. - interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
  1445. - assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
  1446. - assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
  1447. - #clock-cells = <1>;
  1448. - clock-names = "mclk";
  1449. - clocks = <&cru I2S1_MCLKOUT_TX>;
  1450. - pinctrl-names = "default";
  1451. - pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
  1452. - rockchip,system-power-controller;
  1453. - #sound-dai-cells = <0>;
  1454. - wakeup-source;
  1455. -
  1456. - vcc1-supply = <&vcc3v3_sys>;
  1457. - vcc2-supply = <&vcc3v3_sys>;
  1458. - vcc3-supply = <&vcc3v3_sys>;
  1459. - vcc4-supply = <&vcc3v3_sys>;
  1460. - vcc5-supply = <&vcc3v3_sys>;
  1461. - vcc6-supply = <&vcc3v3_sys>;
  1462. - vcc7-supply = <&vcc3v3_sys>;
  1463. - vcc8-supply = <&vcc3v3_sys>;
  1464. - vcc9-supply = <&vcc3v3_sys>;
  1465. -
  1466. - regulators {
  1467. - vdd_logic: DCDC_REG1 {
  1468. - regulator-always-on;
  1469. - regulator-boot-on;
  1470. - regulator-init-microvolt = <900000>;
  1471. - regulator-initial-mode = <0x2>;
  1472. - regulator-min-microvolt = <500000>;
  1473. - regulator-max-microvolt = <1350000>;
  1474. - regulator-name = "vdd_logic";
  1475. - regulator-ramp-delay = <6001>;
  1476. -
  1477. - regulator-state-mem {
  1478. - regulator-off-in-suspend;
  1479. - };
  1480. - };
  1481. -
  1482. - vdd_gpu: DCDC_REG2 {
  1483. - regulator-always-on;
  1484. - regulator-init-microvolt = <900000>;
  1485. - regulator-initial-mode = <0x2>;
  1486. - regulator-min-microvolt = <500000>;
  1487. - regulator-max-microvolt = <1350000>;
  1488. - regulator-name = "vdd_gpu";
  1489. - regulator-ramp-delay = <6001>;
  1490. -
  1491. - regulator-state-mem {
  1492. - regulator-off-in-suspend;
  1493. - };
  1494. - };
  1495. -
  1496. - vcc_ddr: DCDC_REG3 {
  1497. - regulator-always-on;
  1498. - regulator-boot-on;
  1499. - regulator-initial-mode = <0x2>;
  1500. - regulator-name = "vcc_ddr";
  1501. -
  1502. - regulator-state-mem {
  1503. - regulator-on-in-suspend;
  1504. - };
  1505. - };
  1506. -
  1507. - vdd_npu: DCDC_REG4 {
  1508. - regulator-init-microvolt = <900000>;
  1509. - regulator-initial-mode = <0x2>;
  1510. - regulator-min-microvolt = <500000>;
  1511. - regulator-max-microvolt = <1350000>;
  1512. - regulator-name = "vdd_npu";
  1513. - regulator-ramp-delay = <6001>;
  1514. -
  1515. - regulator-state-mem {
  1516. - regulator-off-in-suspend;
  1517. - };
  1518. - };
  1519. -
  1520. - vcc_1v8: DCDC_REG5 {
  1521. - regulator-always-on;
  1522. - regulator-boot-on;
  1523. - regulator-min-microvolt = <1800000>;
  1524. - regulator-max-microvolt = <1800000>;
  1525. - regulator-name = "vcc_1v8";
  1526. -
  1527. - regulator-state-mem {
  1528. - regulator-off-in-suspend;
  1529. - };
  1530. - };
  1531. -
  1532. - vdda0v9_image: LDO_REG1 {
  1533. - regulator-name = "vdda0v9_image";
  1534. - regulator-min-microvolt = <900000>;
  1535. - regulator-max-microvolt = <900000>;
  1536. -
  1537. - regulator-state-mem {
  1538. - regulator-off-in-suspend;
  1539. - };
  1540. - };
  1541. -
  1542. - vdda_0v9: LDO_REG2 {
  1543. - regulator-always-on;
  1544. - regulator-boot-on;
  1545. - regulator-min-microvolt = <900000>;
  1546. - regulator-max-microvolt = <900000>;
  1547. - regulator-name = "vdda_0v9";
  1548. -
  1549. - regulator-state-mem {
  1550. - regulator-off-in-suspend;
  1551. - };
  1552. - };
  1553. -
  1554. - vdda0v9_pmu: LDO_REG3 {
  1555. - regulator-always-on;
  1556. - regulator-boot-on;
  1557. - regulator-min-microvolt = <900000>;
  1558. - regulator-max-microvolt = <900000>;
  1559. - regulator-name = "vdda0v9_pmu";
  1560. -
  1561. - regulator-state-mem {
  1562. - regulator-on-in-suspend;
  1563. - regulator-suspend-microvolt = <900000>;
  1564. - };
  1565. - };
  1566. -
  1567. - vccio_acodec: LDO_REG4 {
  1568. - regulator-min-microvolt = <3300000>;
  1569. - regulator-max-microvolt = <3300000>;
  1570. - regulator-name = "vccio_acodec";
  1571. -
  1572. - regulator-state-mem {
  1573. - regulator-off-in-suspend;
  1574. - };
  1575. - };
  1576. -
  1577. - vccio_sd: LDO_REG5 {
  1578. - regulator-min-microvolt = <1800000>;
  1579. - regulator-max-microvolt = <3300000>;
  1580. - regulator-name = "vccio_sd";
  1581. -
  1582. - regulator-state-mem {
  1583. - regulator-off-in-suspend;
  1584. - };
  1585. - };
  1586. -
  1587. - vcc3v3_pmu: LDO_REG6 {
  1588. - regulator-always-on;
  1589. - regulator-boot-on;
  1590. - regulator-min-microvolt = <3300000>;
  1591. - regulator-max-microvolt = <3300000>;
  1592. - regulator-name = "vcc3v3_pmu";
  1593. -
  1594. - regulator-state-mem {
  1595. - regulator-on-in-suspend;
  1596. - regulator-suspend-microvolt = <3300000>;
  1597. - };
  1598. - };
  1599. -
  1600. - vcca_1v8: LDO_REG7 {
  1601. - regulator-always-on;
  1602. - regulator-boot-on;
  1603. - regulator-min-microvolt = <1800000>;
  1604. - regulator-max-microvolt = <1800000>;
  1605. - regulator-name = "vcca_1v8";
  1606. -
  1607. - regulator-state-mem {
  1608. - regulator-off-in-suspend;
  1609. - };
  1610. - };
  1611. -
  1612. - vcca1v8_pmu: LDO_REG8 {
  1613. - regulator-always-on;
  1614. - regulator-boot-on;
  1615. - regulator-min-microvolt = <1800000>;
  1616. - regulator-max-microvolt = <1800000>;
  1617. - regulator-name = "vcca1v8_pmu";
  1618. -
  1619. - regulator-state-mem {
  1620. - regulator-on-in-suspend;
  1621. - regulator-suspend-microvolt = <1800000>;
  1622. - };
  1623. - };
  1624. -
  1625. - vcca1v8_image: LDO_REG9 {
  1626. - regulator-min-microvolt = <1800000>;
  1627. - regulator-max-microvolt = <1800000>;
  1628. - regulator-name = "vcca1v8_image";
  1629. -
  1630. - regulator-state-mem {
  1631. - regulator-off-in-suspend;
  1632. - };
  1633. - };
  1634. -
  1635. - vcc_3v3: SWITCH_REG1 {
  1636. - regulator-name = "vcc_3v3";
  1637. - regulator-always-on;
  1638. - regulator-boot-on;
  1639. -
  1640. - regulator-state-mem {
  1641. - regulator-off-in-suspend;
  1642. - };
  1643. - };
  1644. -
  1645. - vcc3v3_sd: SWITCH_REG2 {
  1646. - regulator-name = "vcc3v3_sd";
  1647. -
  1648. - regulator-state-mem {
  1649. - regulator-off-in-suspend;
  1650. - };
  1651. - };
  1652. - };
  1653. - };
  1654. -};
  1655. -
  1656. -&i2c5 {
  1657. - status = "okay";
  1658. -};
  1659. -
  1660. -&i2s0_8ch {
  1661. - status = "okay";
  1662. -};
  1663. -
  1664. -&pcie2x1 {
  1665. - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
  1666. - vpcie3v3-supply = <&vcc3v3_pcie>;
  1667. - status = "okay";
  1668. -};
  1669. -
  1670. -&pcie30phy {
  1671. - data-lanes = <1 2>;
  1672. - status = "okay";
  1673. -};
  1674. -
  1675. -&pcie3x1 {
  1676. - num-lanes = <1>;
  1677. - reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
  1678. - vpcie3v3-supply = <&vcc3v3_pcie>;
  1679. - status = "okay";
  1680. -};
  1681. -
  1682. -&pcie3x2 {
  1683. - num-lanes = <1>;
  1684. - reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>;
  1685. - vpcie3v3-supply = <&vcc3v3_pcie>;
  1686. - status = "okay";
  1687. -};
  1688. -
  1689. -&pinctrl {
  1690. - leds {
  1691. - led_lan_pin: led-lan-pin {
  1692. - rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
  1693. - };
  1694. -
  1695. - led_power_pin: led-power-pin {
  1696. - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
  1697. - };
  1698. -
  1699. - led_wan_pin: led-wan-pin {
  1700. - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
  1701. - };
  1702. - };
  1703. -
  1704. - pmic {
  1705. - pmic_int: pmic-int {
  1706. - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
  1707. - };
  1708. - };
  1709. -
  1710. - rockchip-key {
  1711. - reset_button_pin: reset-button-pin {
  1712. - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
  1713. - };
  1714. - };
  1715. -
  1716. - usb {
  1717. - vcc5v0_usb_host_en: vcc5v0-usb-host-en {
  1718. - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
  1719. - };
  1720. - };
  1721. -};
  1722. -
  1723. -&pmu_io_domains {
  1724. - pmuio1-supply = <&vcc3v3_pmu>;
  1725. - pmuio2-supply = <&vcc3v3_pmu>;
  1726. - vccio1-supply = <&vccio_acodec>;
  1727. - vccio2-supply = <&vcc_1v8>;
  1728. - vccio3-supply = <&vccio_sd>;
  1729. - vccio4-supply = <&vcc_1v8>;
  1730. - vccio5-supply = <&vcc_3v3>;
  1731. - vccio6-supply = <&vcc_1v8>;
  1732. - vccio7-supply = <&vcc_3v3>;
  1733. - status = "okay";
  1734. -};
  1735. -
  1736. -&pwm0 {
  1737. - status = "okay";
  1738. -};
  1739. -
  1740. -&rng {
  1741. - status = "okay";
  1742. -};
  1743. -
  1744. -&saradc {
  1745. - vref-supply = <&vcca_1v8>;
  1746. - status = "okay";
  1747. -};
  1748. -
  1749. -&sata0 {
  1750. - status = "okay";
  1751. -};
  1752. -
  1753. -&sdhci {
  1754. - bus-width = <8>;
  1755. - cap-mmc-highspeed;
  1756. - max-frequency = <200000000>;
  1757. - mmc-hs200-1_8v;
  1758. - no-sdio;
  1759. - no-sd;
  1760. - non-removable;
  1761. - pinctrl-names = "default";
  1762. - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
  1763. - status = "okay";
  1764. -};
  1765. -
  1766. -&sdmmc0 {
  1767. - bus-width = <4>;
  1768. - cap-sd-highspeed;
  1769. - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
  1770. - disable-wp;
  1771. - pinctrl-names = "default";
  1772. - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
  1773. - sd-uhs-sdr50;
  1774. - vmmc-supply = <&vcc3v3_sd>;
  1775. - vqmmc-supply = <&vccio_sd>;
  1776. - status = "okay";
  1777. -};
  1778. -
  1779. -&tsadc {
  1780. - rockchip,hw-tshut-mode = <1>;
  1781. - rockchip,hw-tshut-polarity = <0>;
  1782. - status = "okay";
  1783. -};
  1784. -
  1785. -&uart2 {
  1786. - status = "okay";
  1787. -};
  1788. -
  1789. -&usb_host0_ehci {
  1790. - status = "okay";
  1791. -};
  1792. -
  1793. -&usb_host0_ohci {
  1794. - status = "okay";
  1795. -};
  1796. -
  1797. -&usb_host1_ehci {
  1798. - status = "okay";
  1799. -};
  1800. -
  1801. -&usb_host1_ohci {
  1802. - status = "okay";
  1803. -};
  1804. -
  1805. -&usb_host1_xhci {
  1806. - status = "okay";
  1807. -};
  1808. -
  1809. -&usb2phy0 {
  1810. - status = "okay";
  1811. -};
  1812. -
  1813. -&usb2phy0_host {
  1814. - phy-supply = <&vcc5v0_usb_host>;
  1815. - status = "okay";
  1816. -};
  1817. -
  1818. -&usb2phy1 {
  1819. - status = "okay";
  1820. -};
  1821. -
  1822. -&usb2phy1_host {
  1823. - phy-supply = <&vcc5v0_usb_host>;
  1824. - status = "okay";
  1825. -};
  1826. -
  1827. -&usb2phy1_otg {
  1828. - phy-supply = <&vcc5v0_usb_host>;
  1829. - status = "okay";
  1830. -};
  1831. -
  1832. -&vop {
  1833. - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
  1834. - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
  1835. - status = "okay";
  1836. -};
  1837. -
  1838. -&vop_mmu {
  1839. - status = "okay";
  1840. -};
  1841. -
  1842. -&vp0 {
  1843. - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
  1844. - reg = <ROCKCHIP_VOP2_EP_HDMI0>;
  1845. - remote-endpoint = <&hdmi_in_vp0>;
  1846. - };
  1847. -};
  1848. diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
  1849. deleted file mode 100644
  1850. index 648fe1f4bf0..00000000000
  1851. --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
  1852. +++ /dev/null
  1853. @@ -1,80 +0,0 @@
  1854. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1855. -/*
  1856. - * Copyright (c) 2022 AmadeusGhost <[email protected]>
  1857. - */
  1858. -
  1859. -/dts-v1/;
  1860. -
  1861. -#include "rk3568-opc-h66k.dtsi"
  1862. -
  1863. -/ {
  1864. - model = "Hinlink OPC-H68K";
  1865. - compatible = "hinlink,opc-h68k", "rockchip,rk3568";
  1866. -
  1867. - aliases {
  1868. - ethernet0 = &gmac0;
  1869. - ethernet1 = &gmac1;
  1870. - };
  1871. -};
  1872. -
  1873. -&gmac0 {
  1874. - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
  1875. - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
  1876. - assigned-clock-rates = <0>, <125000000>;
  1877. - clock_in_out = "output";
  1878. - phy-mode = "rgmii-id";
  1879. - pinctrl-names = "default";
  1880. - pinctrl-0 = <&gmac0_miim
  1881. - &gmac0_tx_bus2
  1882. - &gmac0_rx_bus2
  1883. - &gmac0_rgmii_clk
  1884. - &gmac0_rgmii_bus>;
  1885. - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
  1886. - snps,reset-active-low;
  1887. - snps,reset-delays-us = <0 20000 100000>;
  1888. - tx_delay = <0x3c>;
  1889. - rx_delay = <0x2f>;
  1890. - phy-handle = <&rgmii_phy0>;
  1891. - status = "okay";
  1892. -};
  1893. -
  1894. -&gmac1 {
  1895. - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
  1896. - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
  1897. - assigned-clock-rates = <0>, <125000000>;
  1898. - clock_in_out = "output";
  1899. - phy-mode = "rgmii-id";
  1900. - pinctrl-names = "default";
  1901. - pinctrl-0 = <&gmac1m1_miim
  1902. - &gmac1m1_tx_bus2
  1903. - &gmac1m1_rx_bus2
  1904. - &gmac1m1_rgmii_clk
  1905. - &gmac1m1_rgmii_bus>;
  1906. - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
  1907. - snps,reset-active-low;
  1908. - snps,reset-delays-us = <0 20000 100000>;
  1909. - tx_delay = <0x4f>;
  1910. - rx_delay = <0x26>;
  1911. - phy-handle = <&rgmii_phy1>;
  1912. - status = "okay";
  1913. -};
  1914. -
  1915. -&mdio0 {
  1916. - rgmii_phy0: ethernet-phy@0 {
  1917. - compatible = "ethernet-phy-ieee802.3-c22";
  1918. - reg = <0>;
  1919. - realtek,led-data = <0x6d60>;
  1920. - };
  1921. -};
  1922. -
  1923. -&mdio1 {
  1924. - rgmii_phy1: ethernet-phy@0 {
  1925. - compatible = "ethernet-phy-ieee802.3-c22";
  1926. - reg = <0>;
  1927. - realtek,led-data = <0x6d60>;
  1928. - };
  1929. -};
  1930. -
  1931. -&vcc3v3_pcie {
  1932. - gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
  1933. -};
  1934. diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts
  1935. deleted file mode 100644
  1936. index 2dad7f7b559..00000000000
  1937. --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts
  1938. +++ /dev/null
  1939. @@ -1,75 +0,0 @@
  1940. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1941. -/*
  1942. - * Copyright (c) 2023 AmadeusGhost <[email protected]>
  1943. - */
  1944. -
  1945. -/dts-v1/;
  1946. -
  1947. -#include "rk3568-opc-h66k.dtsi"
  1948. -
  1949. -/ {
  1950. - model = "HINLINK OPC-H69K Board";
  1951. - compatible = "hinlink,opc-h69k", "rockchip,rk3568";
  1952. -
  1953. - aliases {
  1954. - ethernet0 = &gmac1;
  1955. - };
  1956. -
  1957. - vcc5v0_ahci: vcc5v0-ahci-regulator {
  1958. - compatible = "regulator-fixed";
  1959. - enable-active-high;
  1960. - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
  1961. - pinctrl-names = "default";
  1962. - pinctrl-0 = <&sata_pwr_en>;
  1963. - regulator-always-on;
  1964. - regulator-min-microvolt = <5000000>;
  1965. - regulator-max-microvolt = <5000000>;
  1966. - regulator-name = "vcc5v0_ahci";
  1967. - vin-supply = <&vcc5v0_sys>;
  1968. - };
  1969. -};
  1970. -
  1971. -&gmac1 {
  1972. - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
  1973. - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
  1974. - assigned-clock-rates = <0>, <125000000>;
  1975. - clock_in_out = "output";
  1976. - phy-mode = "rgmii-id";
  1977. - pinctrl-names = "default";
  1978. - pinctrl-0 = <&gmac1m1_miim
  1979. - &gmac1m1_tx_bus2
  1980. - &gmac1m1_rx_bus2
  1981. - &gmac1m1_rgmii_clk
  1982. - &gmac1m1_rgmii_bus>;
  1983. - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
  1984. - snps,reset-active-low;
  1985. - snps,reset-delays-us = <0 20000 100000>;
  1986. - tx_delay = <0x4f>;
  1987. - rx_delay = <0x26>;
  1988. - phy-handle = <&rgmii_phy1>;
  1989. - status = "okay";
  1990. -};
  1991. -
  1992. -&mdio1 {
  1993. - rgmii_phy1: ethernet-phy@0 {
  1994. - compatible = "ethernet-phy-ieee802.3-c22";
  1995. - reg = <0>;
  1996. - realtek,led-data = <0x6d60>;
  1997. - };
  1998. -};
  1999. -
  2000. -&pinctrl {
  2001. - sata {
  2002. - sata_pwr_en: sata-pwr-en {
  2003. - rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
  2004. - };
  2005. - };
  2006. -};
  2007. -
  2008. -&sata0 {
  2009. - target-supply = <&vcc5v0_ahci>;
  2010. -};
  2011. -
  2012. -&vcc3v3_pcie {
  2013. - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
  2014. -};
  2015. diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
  2016. index a54dd3beef0..f7f9a6d136f 100644
  2017. --- a/target/linux/rockchip/image/armv8.mk
  2018. +++ b/target/linux/rockchip/image/armv8.mk
  2019. @@ -153,36 +153,6 @@ define Device/friendlyarm_nanopi-r6s
  2020. endef
  2021. TARGET_DEVICES += friendlyarm_nanopi-r6s
  2022. -define Device/hinlink_opc-h66k
  2023. - DEVICE_VENDOR := Hinlink
  2024. - DEVICE_MODEL := OPC-H66K
  2025. - SOC := rk3568
  2026. - BOOT_FLOW := pine64-img
  2027. - DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-hwmon-pwmfan kmod-mt7921e \
  2028. - kmod-r8125 wpad-basic-openssl
  2029. -endef
  2030. -TARGET_DEVICES += hinlink_opc-h66k
  2031. -
  2032. -define Device/hinlink_opc-h68k
  2033. - DEVICE_VENDOR := Hinlink
  2034. - DEVICE_MODEL := OPC-H68K
  2035. - SOC := rk3568
  2036. - BOOT_FLOW := pine64-img
  2037. - DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-hwmon-pwmfan kmod-mt7921e \
  2038. - kmod-r8125 wpad-basic-openssl
  2039. -endef
  2040. -TARGET_DEVICES += hinlink_opc-h68k
  2041. -
  2042. -define Device/hinlink_opc-h69k
  2043. - DEVICE_VENDOR := Hinlink
  2044. - DEVICE_MODEL := OPC-H69K
  2045. - SOC := rk3568
  2046. - BOOT_FLOW := pine64-img
  2047. - DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-hwmon-pwmfan kmod-mt7916-firmware \
  2048. - kmod-mt7921e kmod-r8125 kmod-usb-serial-option uqmi wpad-basic-openssl
  2049. -endef
  2050. -TARGET_DEVICES += hinlink_opc-h69k
  2051. -
  2052. define Device/huake_guangmiao-g4c
  2053. DEVICE_VENDOR := Huake-Cloud
  2054. DEVICE_MODEL := GuangMiao G4C