mt7981b-nokia-ea0326gmp.dts 4.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. #include "mt7981.dtsi"
  7. / {
  8. model = "Nokia EA0326GMP";
  9. compatible = "nokia,ea0326gmp", "mediatek,mt7981";
  10. aliases {
  11. led-boot = &power_led;
  12. led-running = &power_led;
  13. led-failsafe = &power_led;
  14. led-upgrade = &power_led;
  15. label-mac-device = &gmac1;
  16. serial0 = &uart0;
  17. };
  18. chosen {
  19. rootdisk = <&ubi_rootdisk>;
  20. stdout-path = "serial0:115200n8";
  21. };
  22. memory@40000000 {
  23. reg = <0 0x40000000 0 0x10000000>;
  24. };
  25. gpio-keys {
  26. compatible = "gpio-keys";
  27. button-reset {
  28. label = "reset";
  29. linux,code = <KEY_RESTART>;
  30. gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  31. };
  32. button-wps {
  33. label = "wps";
  34. linux,code = <KEY_WPS_BUTTON>;
  35. gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  36. };
  37. };
  38. gpio-leds {
  39. compatible = "gpio-leds";
  40. power_led: led-0 {
  41. color = <LED_COLOR_ID_RED>;
  42. function = LED_FUNCTION_POWER;
  43. gpios = <&pio 4 GPIO_ACTIVE_LOW>;
  44. };
  45. led-1 {
  46. color = <LED_COLOR_ID_GREEN>;
  47. function = LED_FUNCTION_WAN;
  48. gpios = <&pio 5 GPIO_ACTIVE_LOW>;
  49. };
  50. led-2 {
  51. color = <LED_COLOR_ID_RED>;
  52. function = LED_FUNCTION_WAN;
  53. gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  54. };
  55. led-3 {
  56. color = <LED_COLOR_ID_GREEN>;
  57. function = LED_FUNCTION_LAN;
  58. gpios = <&pio 7 GPIO_ACTIVE_LOW>;
  59. };
  60. led-4 {
  61. color = <LED_COLOR_ID_GREEN>;
  62. function = LED_FUNCTION_WLAN;
  63. gpios = <&pio 8 GPIO_ACTIVE_LOW>;
  64. };
  65. led-5 {
  66. color = <LED_COLOR_ID_GREEN>;
  67. function = LED_FUNCTION_WPS;
  68. gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  69. };
  70. };
  71. };
  72. &eth {
  73. pinctrl-names = "default";
  74. pinctrl-0 = <&mdio_pins>;
  75. status = "okay";
  76. gmac0: mac@0 {
  77. compatible = "mediatek,eth-mac";
  78. reg = <0>;
  79. phy-mode = "2500base-x";
  80. nvmem-cells = <&macaddr_factory_28 0>;
  81. nvmem-cell-names = "mac-address";
  82. fixed-link {
  83. speed = <2500>;
  84. full-duplex;
  85. pause;
  86. };
  87. };
  88. gmac1: mac@1 {
  89. compatible = "mediatek,eth-mac";
  90. reg = <1>;
  91. phy-mode = "gmii";
  92. phy-handle = <&int_gbe_phy>;
  93. nvmem-cells = <&macaddr_factory_28 3>;
  94. nvmem-cell-names = "mac-address";
  95. };
  96. };
  97. &mdio_bus {
  98. switch: switch@1f {
  99. compatible = "mediatek,mt7531";
  100. reg = <31>;
  101. reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
  102. interrupt-controller;
  103. #interrupt-cells = <1>;
  104. interrupt-parent = <&pio>;
  105. interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
  106. };
  107. };
  108. &pio {
  109. spi0_flash_pins: spi0-pins {
  110. mux {
  111. function = "spi";
  112. groups = "spi0", "spi0_wp_hold";
  113. };
  114. conf-pu {
  115. pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
  116. drive-strength = <8>;
  117. mediatek,pull-up-adv = <0>; /* bias-disable */
  118. };
  119. conf-pd {
  120. pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
  121. drive-strength = <8>;
  122. mediatek,pull-up-adv = <0>; /* bias-disable */
  123. };
  124. };
  125. };
  126. &spi0 {
  127. pinctrl-names = "default";
  128. pinctrl-0 = <&spi0_flash_pins>;
  129. status = "okay";
  130. spi_nand: flash@0 {
  131. #address-cells = <1>;
  132. #size-cells = <1>;
  133. compatible = "spi-nand";
  134. reg = <0>;
  135. spi-max-frequency = <52000000>;
  136. spi-tx-bus-width = <4>;
  137. spi-rx-bus-width = <4>;
  138. mediatek,nmbm;
  139. mediatek,bmt-max-ratio = <1>;
  140. mediatek,bmt-max-reserved-blocks = <64>;
  141. partitions {
  142. compatible = "fixed-partitions";
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. partition@0 {
  146. label = "bl2";
  147. reg = <0x00000 0x0100000>;
  148. read-only;
  149. };
  150. partition@100000 {
  151. label = "u-boot-env";
  152. reg = <0x100000 0x80000>;
  153. };
  154. partition@180000 {
  155. label = "factory";
  156. reg = <0x180000 0x200000>;
  157. read-only;
  158. nvmem-layout {
  159. compatible = "fixed-layout";
  160. #address-cells = <1>;
  161. #size-cells = <1>;
  162. eeprom_factory_0: eeprom@0 {
  163. reg = <0x0 0x1000>;
  164. };
  165. macaddr_factory_28: macaddr@28 {
  166. compatible = "mac-base";
  167. reg = <0x28 0x6>;
  168. #nvmem-cell-cells = <1>;
  169. };
  170. };
  171. };
  172. partition@380000 {
  173. label = "fip";
  174. reg = <0x380000 0x200000>;
  175. read-only;
  176. };
  177. partition@580000 {
  178. label = "config";
  179. reg = <0x580000 0x200000>;
  180. read-only;
  181. };
  182. partition@780000 {
  183. label = "config2";
  184. reg = <0x780000 0x200000>;
  185. read-only;
  186. };
  187. partition@980000 {
  188. label = "ubi";
  189. reg = <0x980000 0x6e00000>;
  190. volumes {
  191. ubi_rootdisk: ubi-volume-fit {
  192. volname = "fit";
  193. };
  194. };
  195. };
  196. };
  197. };
  198. };
  199. &switch {
  200. ports {
  201. #address-cells = <1>;
  202. #size-cells = <0>;
  203. port@1 {
  204. reg = <1>;
  205. label = "lan1";
  206. };
  207. port@2 {
  208. reg = <2>;
  209. label = "lan2";
  210. };
  211. port@3 {
  212. reg = <3>;
  213. label = "lan3";
  214. };
  215. port@6 {
  216. reg = <6>;
  217. ethernet = <&gmac0>;
  218. phy-mode = "2500base-x";
  219. fixed-link {
  220. speed = <2500>;
  221. full-duplex;
  222. pause;
  223. };
  224. };
  225. };
  226. };
  227. &uart0 {
  228. status = "okay";
  229. };
  230. &watchdog {
  231. status = "okay";
  232. };
  233. &wifi {
  234. nvmem-cells = <&eeprom_factory_0>;
  235. nvmem-cell-names = "eeprom";
  236. status = "okay";
  237. };