15-cmcc-a10.patch 6.9 KB

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  1. From 64a881cfb100a28ba20ffe4066a1758cee07dc91 Mon Sep 17 00:00:00 2001
  2. From: Chen Minqiang <[email protected]>
  3. Date: Sat, 16 Dec 2023 07:25:04 +0800
  4. Subject: [PATCH] mediatek: add CMCC A10 uboot layout
  5. ---
  6. .../dts/mt7981b-cmcc-a10.dts | 241 ++++++++++++++++++
  7. .../filogic/base-files/etc/board.d/02_network | 1 +
  8. .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 1 +
  9. target/linux/mediatek/image/filogic.mk | 22 ++
  10. 4 files changed, 265 insertions(+)
  11. create mode 100644 target/linux/mediatek/dts/mt7981b-cmcc-a10.dts
  12. diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-a10.dts b/target/linux/mediatek/dts/mt7981b-cmcc-a10.dts
  13. new file mode 100644
  14. index 0000000000000..cc5b93cba35dc
  15. --- /dev/null
  16. +++ b/target/linux/mediatek/dts/mt7981b-cmcc-a10.dts
  17. @@ -0,0 +1,241 @@
  18. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  19. +
  20. +/dts-v1/;
  21. +#include <dt-bindings/gpio/gpio.h>
  22. +#include <dt-bindings/input/input.h>
  23. +
  24. +#include "mt7981.dtsi"
  25. +
  26. +/ {
  27. + model = "CMCC A10 (uboot layout)";
  28. + compatible = "cmcc,a10", "mediatek,mt7981";
  29. +
  30. + aliases {
  31. + led-boot = &boot_led;
  32. + led-failsafe = &boot_led;
  33. + led-running = &running_led;
  34. + led-upgrade = &running_led;
  35. + serial0 = &uart0;
  36. + };
  37. +
  38. + chosen {
  39. + stdout-path = "serial0:115200n8";
  40. + };
  41. +
  42. + memory {
  43. + reg = <0 0x40000000 0 0x10000000>;
  44. + };
  45. +
  46. + gpio-keys {
  47. + compatible = "gpio-keys";
  48. +
  49. + button-reset {
  50. + label = "reset";
  51. + linux,code = <KEY_RESTART>;
  52. + gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  53. + };
  54. +
  55. + button-wps {
  56. + label = "wps";
  57. + linux,code = <KEY_WPS_BUTTON>;
  58. + gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  59. + };
  60. + };
  61. +
  62. + gpio-leds {
  63. + compatible = "gpio-leds";
  64. +
  65. + led-0 {
  66. + label = "blue:status";
  67. + gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  68. + };
  69. +
  70. + running_led: led-1 {
  71. + label = "green:status";
  72. + gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  73. + };
  74. +
  75. + boot_led: led-2 {
  76. + label = "red:status";
  77. + gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  78. + };
  79. + };
  80. +};
  81. +
  82. +&eth {
  83. + status = "okay";
  84. +
  85. + gmac0: mac@0 {
  86. + compatible = "mediatek,eth-mac";
  87. + reg = <0>;
  88. + phy-mode = "2500base-x";
  89. +
  90. + nvmem-cells = <&macaddr_factory_2a 0>;
  91. + nvmem-cell-names = "mac-address";
  92. +
  93. + fixed-link {
  94. + speed = <2500>;
  95. + full-duplex;
  96. + pause;
  97. + };
  98. + };
  99. +};
  100. +
  101. +&mdio_bus {
  102. + switch: switch@1f {
  103. + compatible = "mediatek,mt7531";
  104. + reg = <31>;
  105. + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
  106. + interrupt-controller;
  107. + #interrupt-cells = <1>;
  108. + interrupt-parent = <&pio>;
  109. + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
  110. + };
  111. +};
  112. +
  113. +&spi0 {
  114. + pinctrl-names = "default";
  115. + pinctrl-0 = <&spi0_flash_pins>;
  116. + status = "okay";
  117. +
  118. + spi_nand: flash@0 {
  119. + #address-cells = <1>;
  120. + #size-cells = <1>;
  121. + compatible = "spi-nand";
  122. + reg = <0>;
  123. +
  124. + spi-max-frequency = <52000000>;
  125. + spi-tx-bus-width = <4>;
  126. + spi-rx-bus-width = <4>;
  127. + mediatek,nmbm;
  128. + mediatek,bmt-max-ratio = <1>;
  129. + mediatek,bmt-max-reserved-blocks = <64>;
  130. +
  131. + partitions {
  132. + compatible = "fixed-partitions";
  133. + #address-cells = <1>;
  134. + #size-cells = <1>;
  135. +
  136. + partition@0 {
  137. + label = "BL2";
  138. + reg = <0x00000 0x100000>;
  139. + read-only;
  140. + };
  141. +
  142. + partition@100000 {
  143. + label = "u-boot-env";
  144. + reg = <0x100000 0x80000>;
  145. + };
  146. +
  147. + factory: partition@180000 {
  148. + label = "Factory";
  149. + reg = <0x180000 0x200000>;
  150. +
  151. + nvmem-layout {
  152. + compatible = "fixed-layout";
  153. + #address-cells = <1>;
  154. + #size-cells = <1>;
  155. +
  156. + macaddr_factory_24: macaddr@24 {
  157. + compatible = "mac-base";
  158. + reg = <0x24 0x6>;
  159. + #nvmem-cell-cells = <1>;
  160. + };
  161. +
  162. + macaddr_factory_2a: macaddr@2a {
  163. + compatible = "mac-base";
  164. + reg = <0x2a 0x6>;
  165. + #nvmem-cell-cells = <1>;
  166. + };
  167. + };
  168. + };
  169. +
  170. + partition@380000 {
  171. + label = "FIP";
  172. + reg = <0x380000 0x200000>;
  173. + };
  174. +
  175. + partition@580000 {
  176. + label = "ubi";
  177. + reg = <0x580000 0x7000000>;
  178. + };
  179. + };
  180. + };
  181. +};
  182. +
  183. +&switch {
  184. + ports {
  185. + #address-cells = <1>;
  186. + #size-cells = <0>;
  187. +
  188. + port@0 {
  189. + reg = <0>;
  190. + label = "lan1";
  191. + };
  192. +
  193. + port@2 {
  194. + reg = <2>;
  195. + label = "lan2";
  196. + };
  197. +
  198. + port@3 {
  199. + reg = <3>;
  200. + label = "lan3";
  201. + };
  202. +
  203. + port@4 {
  204. + reg = <4>;
  205. + label = "wan";
  206. +
  207. + nvmem-cells = <&macaddr_factory_24 0>;
  208. + nvmem-cell-names = "mac-address";
  209. + };
  210. +
  211. + port@6 {
  212. + reg = <6>;
  213. + ethernet = <&gmac0>;
  214. + phy-mode = "2500base-x";
  215. +
  216. + fixed-link {
  217. + speed = <2500>;
  218. + full-duplex;
  219. + pause;
  220. + };
  221. + };
  222. + };
  223. +};
  224. +
  225. +&pio {
  226. + spi0_flash_pins: spi0-pins {
  227. + mux {
  228. + function = "spi";
  229. + groups = "spi0", "spi0_wp_hold";
  230. + };
  231. +
  232. + conf-pu {
  233. + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
  234. + drive-strength = <MTK_DRIVE_8mA>;
  235. + bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
  236. + };
  237. +
  238. + conf-pd {
  239. + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
  240. + drive-strength = <MTK_DRIVE_8mA>;
  241. + bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
  242. + };
  243. + };
  244. +};
  245. +
  246. +&uart0 {
  247. + status = "okay";
  248. +};
  249. +
  250. +&watchdog {
  251. + status = "okay";
  252. +};
  253. +
  254. +&wifi {
  255. + status = "okay";
  256. +
  257. + mediatek,mtd-eeprom = <&factory 0x0>;
  258. +};
  259. diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  260. index 53e7b024e40fb..61637e09c7f0e 100644
  261. --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  262. +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  263. @@ -17,6 +17,7 @@ mediatek_setup_interfaces()
  264. ;;
  265. asus,rt-ax59u|\
  266. cetron,ct3003|\
  267. + cmcc,a10|\
  268. confiabits,mt7981|\
  269. cudy,wr3000-v1|\
  270. tenbay,wr3000k|\
  271. --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  272. +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  273. @@ -65,6 +65,9 @@ case "$board" in
  274. esac
  275. [ "$PHYNBR" = "1" ] && echo "$addr" > /sys${DEVPATH}/macaddress
  276. ;;
  277. + cmcc,a10)
  278. + [ "$PHYNBR" = "1" ] && mtd_get_mac_binary Factory 0xa > /sys${DEVPATH}/macaddress
  279. + ;;
  280. comfast,cf-e393ax)
  281. addr=$(mtd_get_mac_binary "Factory" 0x8000)
  282. [ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
  283. diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
  284. index 6976a399e86dc..83428f0d981e7 100644
  285. --- a/target/linux/mediatek/image/filogic.mk
  286. +++ b/target/linux/mediatek/image/filogic.mk
  287. @@ -349,6 +349,27 @@ define Device/cetron_ct3003
  288. endef
  289. TARGET_DEVICES += cetron_ct3003
  290. +define Device/cmcc_a10
  291. + DEVICE_VENDOR := CMCC
  292. + DEVICE_MODEL := A10
  293. + DEVICE_DTS := mt7981b-cmcc-a10
  294. + DEVICE_DTS_DIR := ../dts
  295. + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
  296. + UBINIZE_OPTS := -E 5
  297. + BLOCKSIZE := 128k
  298. + PAGESIZE := 2048
  299. + IMAGE_SIZE := 114688k
  300. + KERNEL_IN_UBI := 1
  301. + IMAGES += factory.bin
  302. + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
  303. + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
  304. + KERNEL = kernel-bin | lzma | \
  305. + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
  306. + KERNEL_INITRAMFS = kernel-bin | lzma | \
  307. + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
  308. +endef
  309. +TARGET_DEVICES += cmcc_a10
  310. +
  311. define Device/cmcc_rax3000m
  312. DEVICE_VENDOR := CMCC
  313. DEVICE_MODEL := RAX3000M