10-re-cp-03.patch 13 KB

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  1. From c0c3234e17207a9287a08757fc1752490144a1cd Mon Sep 17 00:00:00 2001
  2. From: Tianling Shen <[email protected]>
  3. Date: Wed, 1 Nov 2023 14:46:15 +0800
  4. Subject: [PATCH] mediatek: add support for JDCloud RE-CP-03
  5. Hardware specification:
  6. SoC: MediaTek MT7986A 4x A53
  7. Flash: 128GB eMMC
  8. RAM: 1GB DDR4
  9. Ethernet: 4x 1GbE, 1x 2.5GbE (RTL8221B)
  10. Switch: MediaTek MT7531AE
  11. WiFi: MediaTek MT7976C
  12. Button: Reset, Joylink
  13. Power: DC 12V 2A
  14. Flash instructions:
  15. 1. Download and flash the vendor migration firmware via webUI:
  16. https://firmware.download.immortalwrt.eu.org/cnsztl/mediatek/filogic/openwrt-mediatek-mt7986-jdcloud_re-cp-03-vendor-migration.bin
  17. (Default address is 192.168.68.1, user root, no password)
  18. 2. After device has booted up, write new GPT table:
  19. dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-gpt.bin of=/dev/mmcblk0 bs=512 seek=0 count=34 conv=fsync
  20. 3. Erase and write new BL2:
  21. echo 0 > /sys/block/mmcblk0boot0/force_ro
  22. dd if=/dev/zero of=/dev/mmcblk0boot0 bs=512 count=8192 conv=fsync
  23. dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-preloader.bin of=/dev/mmcblk0boot0 bs=512 conv=fsync
  24. 4. Erase and write new FIP:
  25. dd if=/dev/zero of=/dev/mmcblk0 bs=512 seek=13312 count=8192 conv=fsync
  26. dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-bl31-uboot.fip of=/dev/mmcblk0 bs=512 seek=13312 conv=fsync
  27. 5. Set static IP on your PC:
  28. IP 192.168.1.254/24, GW 192.168.1.1
  29. 6. Serve OpenWrt initramfs image using TFTP server.
  30. 7. Cut off the power and re-engage, wait for TFTP recovery to complete.
  31. 8. After OpenWrt has booted, perform sysupgrade.
  32. 9. Additionally, if you want to have eMMC recovery boot feature:
  33. (Don't worry! You will always have TFTP recovery boot feature.)
  34. dd if=openwrt-mediatek-filogic-jdcloud_re-cp-03-initramfs-recovery.itb of=/dev/mmcblk0p4 bs=512 conv=fsync
  35. Signed-off-by: Tianling Shen <[email protected]>
  36. ---
  37. .../uboot-envtools/files/mediatek_filogic | 5 +
  38. .../mediatek/dts/mt7986a-jdcloud-re-cp-03.dts | 294 ++++++++++++++++++
  39. .../filogic/base-files/etc/board.d/02_network | 6 +
  40. .../etc/hotplug.d/firmware/11-mt76-caldata | 3 +-
  41. .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 3 +
  42. .../base-files/lib/upgrade/platform.sh | 5 +
  43. target/linux/mediatek/image/filogic.mk | 26 ++
  44. 7 files changed, 341 insertions(+), 1 deletion(-)
  45. create mode 100644 target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
  46. diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic
  47. index 1e7b42b634189..cae761b4f9f1f 100644
  48. --- a/package/boot/uboot-envtools/files/mediatek_filogic
  49. +++ b/package/boot/uboot-envtools/files/mediatek_filogic
  50. @@ -87,6 +87,11 @@ glinet,gl-mt6000)
  51. glinet,gl-mt3000)
  52. ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000"
  53. ;;
  54. +jdcloud,re-cp-03)
  55. + local envdev=$(find_mmc_part "ubootenv" "mmcblk0")
  56. + ubootenv_add_uci_config "$envdev" "0x0" "0x40000" "0x40000" "1"
  57. + ubootenv_add_uci_config "$envdev" "0x40000" "0x40000" "0x40000" "1"
  58. + ;;
  59. mercusys,mr90x-v1|\
  60. routerich,ax3000)
  61. local envdev=/dev/mtd$(find_mtd_index "u-boot-env")
  62. diff --git a/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts b/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
  63. new file mode 100644
  64. index 0000000000000..b62c2f421516a
  65. --- /dev/null
  66. +++ b/target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts
  67. @@ -0,0 +1,294 @@
  68. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  69. +/*
  70. + * Copyright (C) 2023 Tianling Shen <[email protected]>
  71. + */
  72. +
  73. +/dts-v1/;
  74. +#include <dt-bindings/gpio/gpio.h>
  75. +#include <dt-bindings/input/input.h>
  76. +#include <dt-bindings/leds/common.h>
  77. +
  78. +#include "mt7986a.dtsi"
  79. +
  80. +/ {
  81. + model = "JDCloud RE-CP-03";
  82. + compatible = "jdcloud,re-cp-03", "mediatek,mt7986a";
  83. +
  84. + aliases {
  85. + led-boot = &red_led;
  86. + led-failsafe = &red_led;
  87. + led-running = &green_led;
  88. + led-upgrade = &green_led;
  89. + serial0 = &uart0;
  90. + };
  91. +
  92. + chosen {
  93. + stdout-path = "serial0:115200n8";
  94. + };
  95. +
  96. + memory@40000000 {
  97. + reg = <0 0x40000000 0 0x40000000>;
  98. + };
  99. +
  100. + gpio-keys {
  101. + compatible = "gpio-keys";
  102. +
  103. + button-joylink {
  104. + label = "joylink";
  105. + linux,code = <BTN_0>;
  106. + gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  107. + };
  108. +
  109. + button-reset {
  110. + label = "reset";
  111. + linux,code = <KEY_RESTART>;
  112. + gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  113. + };
  114. + };
  115. +
  116. + gpio-leds {
  117. + compatible = "gpio-leds";
  118. +
  119. + led-0 {
  120. + color = <LED_COLOR_ID_BLUE>;
  121. + function = LED_FUNCTION_STATUS;
  122. + gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  123. + };
  124. +
  125. + red_led: led-1 {
  126. + color = <LED_COLOR_ID_RED>;
  127. + function = LED_FUNCTION_STATUS;
  128. + gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
  129. + };
  130. +
  131. + green_led: led-2 {
  132. + color = <LED_COLOR_ID_GREEN>;
  133. + function = LED_FUNCTION_STATUS;
  134. + gpios = <&pio 12 GPIO_ACTIVE_LOW>;
  135. + };
  136. + };
  137. +
  138. + reg_1p8v: regulator-1p8v {
  139. + compatible = "regulator-fixed";
  140. + regulator-name = "fixed-1.8V";
  141. + regulator-min-microvolt = <1800000>;
  142. + regulator-max-microvolt = <1800000>;
  143. + regulator-boot-on;
  144. + regulator-always-on;
  145. + };
  146. +
  147. + reg_3p3v: regulator-3p3v {
  148. + compatible = "regulator-fixed";
  149. + regulator-name = "fixed-3.3V";
  150. + regulator-min-microvolt = <3300000>;
  151. + regulator-max-microvolt = <3300000>;
  152. + regulator-boot-on;
  153. + regulator-always-on;
  154. + };
  155. +};
  156. +
  157. +&crypto {
  158. + status = "okay";
  159. +};
  160. +
  161. +&eth {
  162. + status = "okay";
  163. +
  164. + gmac0: mac@0 {
  165. + compatible = "mediatek,eth-mac";
  166. + reg = <0>;
  167. + phy-mode = "2500base-x";
  168. +
  169. + fixed-link {
  170. + speed = <2500>;
  171. + full-duplex;
  172. + pause;
  173. + };
  174. + };
  175. +
  176. + gmac1: mac@1 {
  177. + compatible = "mediatek,eth-mac";
  178. + reg = <1>;
  179. + phy-mode = "2500base-x";
  180. + phy-handle = <&phy6>;
  181. + };
  182. +
  183. + mdio: mdio-bus {
  184. + #address-cells = <1>;
  185. + #size-cells = <0>;
  186. + };
  187. +};
  188. +
  189. +&mdio {
  190. + phy6: phy@6 {
  191. + compatible = "ethernet-phy-ieee802.3-c45";
  192. + reg = <6>;
  193. +
  194. + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  195. + reset-assert-us = <10000>;
  196. + reset-deassert-us = <50000>;
  197. + realtek,aldps-enable;
  198. + };
  199. +
  200. + switch: switch@1f {
  201. + compatible = "mediatek,mt7531";
  202. + reg = <31>;
  203. + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  204. + interrupt-controller;
  205. + #interrupt-cells = <1>;
  206. + interrupt-parent = <&pio>;
  207. + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
  208. + };
  209. +};
  210. +
  211. +&mmc0 {
  212. + bus-width = <8>;
  213. + cap-mmc-highspeed;
  214. + hs400-ds-delay = <0x14014>;
  215. + max-frequency = <200000000>;
  216. + mmc-hs200-1_8v;
  217. + mmc-hs400-1_8v;
  218. + no-sd;
  219. + no-sdio;
  220. + non-removable;
  221. + pinctrl-names = "default", "state_uhs";
  222. + pinctrl-0 = <&mmc0_pins_default>;
  223. + pinctrl-1 = <&mmc0_pins_uhs>;
  224. + vmmc-supply = <&reg_3p3v>;
  225. + vqmmc-supply = <&reg_1p8v>;
  226. + status = "okay";
  227. +};
  228. +
  229. +&pio {
  230. + mmc0_pins_default: mmc0-pins-default {
  231. + mux {
  232. + function = "emmc";
  233. + groups = "emmc_51";
  234. + };
  235. + conf-cmd-dat {
  236. + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
  237. + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  238. + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  239. + input-enable;
  240. + drive-strength = <4>;
  241. + mediatek,pull-up-adv = <1>;
  242. + };
  243. + conf-clk {
  244. + pins = "EMMC_CK";
  245. + drive-strength = <6>;
  246. + mediatek,pull-down-adv = <2>;
  247. + };
  248. + conf-ds {
  249. + pins = "EMMC_DSL";
  250. + mediatek,pull-down-adv = <2>;
  251. + };
  252. + conf-rst {
  253. + pins = "EMMC_RSTB";
  254. + drive-strength = <4>;
  255. + mediatek,pull-up-adv = <1>;
  256. + };
  257. + };
  258. +
  259. + mmc0_pins_uhs: mmc0-uhs-pins {
  260. + mux {
  261. + function = "emmc";
  262. + groups = "emmc_51";
  263. + };
  264. + conf-cmd-dat {
  265. + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
  266. + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  267. + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  268. + input-enable;
  269. + drive-strength = <4>;
  270. + mediatek,pull-up-adv = <1>;
  271. + };
  272. + conf-clk {
  273. + pins = "EMMC_CK";
  274. + drive-strength = <6>;
  275. + mediatek,pull-down-adv = <2>;
  276. + };
  277. + conf-ds {
  278. + pins = "EMMC_DSL";
  279. + mediatek,pull-down-adv = <2>;
  280. + };
  281. + conf-rst {
  282. + pins = "EMMC_RSTB";
  283. + drive-strength = <4>;
  284. + mediatek,pull-up-adv = <1>;
  285. + };
  286. + };
  287. +
  288. + wf_2g_5g_pins: wf-2g-5g-pins {
  289. + mux {
  290. + function = "wifi";
  291. + groups = "wf_2g", "wf_5g";
  292. + };
  293. + conf {
  294. + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
  295. + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
  296. + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
  297. + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
  298. + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
  299. + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
  300. + "WF1_TOP_CLK", "WF1_TOP_DATA";
  301. + drive-strength = <4>;
  302. + };
  303. + };
  304. +};
  305. +
  306. +&switch {
  307. + ports {
  308. + #address-cells = <1>;
  309. + #size-cells = <0>;
  310. +
  311. + port@1 {
  312. + reg = <1>;
  313. + label = "lan1";
  314. + };
  315. +
  316. + port@2 {
  317. + reg = <2>;
  318. + label = "lan2";
  319. + };
  320. +
  321. + port@3 {
  322. + reg = <3>;
  323. + label = "lan3";
  324. + };
  325. +
  326. + port@4 {
  327. + reg = <4>;
  328. + label = "lan4";
  329. + };
  330. +
  331. + port@6 {
  332. + reg = <6>;
  333. + ethernet = <&gmac0>;
  334. + phy-mode = "2500base-x";
  335. +
  336. + fixed-link {
  337. + speed = <2500>;
  338. + full-duplex;
  339. + pause;
  340. + };
  341. + };
  342. + };
  343. +};
  344. +
  345. +&trng {
  346. + status = "okay";
  347. +};
  348. +
  349. +&uart0 {
  350. + status = "okay";
  351. +};
  352. +
  353. +&watchdog {
  354. + status = "okay";
  355. +};
  356. +
  357. +&wifi {
  358. + pinctrl-names = "default";
  359. + pinctrl-0 = <&wf_2g_5g_pins>;
  360. + status = "okay";
  361. +};
  362. diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  363. index b86c376d74176..47e7be971e7bb 100644
  364. --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  365. +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  366. @@ -24,6 +24,7 @@ mediatek_setup_interfaces()
  367. ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
  368. ;;
  369. asus,tuf-ax4200|\
  370. + jdcloud,re-cp-03|\
  371. mediatek,mt7981-rfb|\
  372. zbtlink,zbt-z8102ax)
  373. ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
  374. @@ -135,6 +136,11 @@ mediatek_setup_macs()
  375. lan_mac=$(macaddr_add "$wan_mac" 1)
  376. label_mac=$wan_mac
  377. ;;
  378. + jdcloud,re-cp-03)
  379. + wan_mac=$(mmc_get_mac_binary factory 0x2a)
  380. + lan_mac=$(mmc_get_mac_binary factory 0x24)
  381. + label_mac=$lan_mac
  382. + ;;
  383. mercusys,mr90x-v1)
  384. label_mac=$(get_mac_binary "/tmp/tp_data/default-mac" 0)
  385. lan_mac=$label_mac
  386. diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
  387. index cbbf1871a5d69..22ab26608f8ab 100644
  388. --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
  389. +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
  390. @@ -55,7 +55,8 @@ case "$FIRMWARE" in
  391. ;;
  392. "mediatek/mt7986_eeprom_mt7976_dual.bin")
  393. case "$board" in
  394. - glinet,gl-mt6000)
  395. + glinet,gl-mt6000|\
  396. + jdcloud,re-cp-03)
  397. caldata_extract_mmc "factory" 0x0 0x1000
  398. ;;
  399. esac
  400. diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  401. index d9e0335b67f3b..937d39066c0fd 100644
  402. --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  403. +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  404. @@ -80,6 +80,9 @@ case "$board" in
  405. # addresses on multiple VIFs with the other radio. Use label mac to set LA bit.
  406. [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(get_mac_label) > /sys${DEVPATH}/macaddress
  407. ;;
  408. + jdcloud,re-cp-03)
  409. + [ "$PHYNBR" = "1" ] && mmc_get_mac_binary factory 0xa > /sys${DEVPATH}/macaddress
  410. + ;;
  411. mercusys,mr90x-v1)
  412. addr=$(get_mac_binary "/tmp/tp_data/default-mac" 0)
  413. [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress
  414. diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
  415. index 517f4520e143c..97c09f35a8302 100755
  416. --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
  417. +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
  418. @@ -134,6 +134,10 @@ platform_do_upgrade() {
  419. CI_KERNPART="fit"
  420. nand_do_upgrade "$1"
  421. ;;
  422. + jdcloud,re-cp-03)
  423. + CI_KERNPART="production"
  424. + emmc_do_upgrade "$1"
  425. + ;;
  426. mercusys,mr90x-v1)
  427. CI_UBIPART="ubi0"
  428. nand_do_upgrade "$1"
  429. @@ -200,6 +204,7 @@ platform_copy_config() {
  430. acer,predator-w6|\
  431. glinet,gl-mt2500|\
  432. glinet,gl-mt6000|\
  433. + jdcloud,re-cp-03|\
  434. ubnt,unifi-6-plus)
  435. emmc_copy_config
  436. ;;
  437. diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
  438. index d0c9907635fb3..8a8879ca32b0d 100644
  439. --- a/target/linux/mediatek/image/filogic.mk
  440. +++ b/target/linux/mediatek/image/filogic.mk
  441. @@ -450,6 +450,17 @@ define Device/jcg_q30-pro
  442. endef
  443. TARGET_DEVICES += jcg_q30-pro
  444. +define Device/jdcloud_re-cp-03
  445. + DEVICE_VENDOR := JDCloud
  446. + DEVICE_MODEL := AX6000 Baili(RE-CP-03)
  447. + DEVICE_DTS := mt7986a-jdcloud-re-cp-03
  448. + DEVICE_DTS_DIR := ../dts
  449. + DEVICE_PACKAGES := kmod-mt7986-firmware mt7986-wo-firmware \
  450. + e2fsprogs f2fsck mkf2fs losetup kmod-mmc kmod-nls-cp437 kmod-nls-iso8859-1 blkid blockdev
  451. + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
  452. +endef
  453. +TARGET_DEVICES += jdcloud_re-cp-03
  454. +
  455. define Device/mediatek_mt7981-rfb
  456. DEVICE_VENDOR := MediaTek
  457. DEVICE_MODEL := MT7981 rfb