13-rg-x60-pro.patch 10 KB

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  1. From 0cf380b2ca1002f4a73d3626322ee5a7a5cf7628 Mon Sep 17 00:00:00 2001
  2. From: Ashley Lee <[email protected]>
  3. Date: Sat, 30 Dec 2023 22:54:54 +0800
  4. Subject: [PATCH] mediatek: add support for Ruijie RG-X60 Pro
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. This pull request ports Ruijie RG-X60 Pro router support to the main branch.
  9. Parameters:
  10. - SoC : MediaTek MT7986A Quad-core ARM Cortex-A53 2.0GHz
  11. - RAM : DDR3 512MiB (W634GU6QB)
  12. - Flash : SPI-NAND 128 MiB (W25N01GVZEIG)
  13. - WLAN : MediaTek MT7986A integration dual-band WiFi 6
  14. - 2.4 GHz : b/g/n/ax, MIMO 4x4
  15. - 5 GHz : a/n/ac/ax, MIMO 4x4
  16. - Ethernet : 10/100/1000 Mbps x4 (MediaTek MT7531AE)
  17. 2500Mbps x 1 (Realtek RTL8221B-VB-CG)
  18. - UART : through-hole on PCB
  19. - [J500] GND, TX, RX, 3.3V (115200n1)
  20. - Buttons : Mesh, Reset
  21. - LEDs : 1x Power (Blue)
  22. 1x Turbo (Purple)
  23. - Power : 12 VDC, 3 A
  24. How to Installation:
  25. 1. Remove the case and connect the TTL cable to the corresponding position.
  26. 2. Power on the device and quickly press "down" on the keyboard, then
  27. U-Boot will stay in the menu.
  28. 3. Select "1. Upgrade Firmware", select "0. TFTP Client(Default)".
  29. 4. Input the IP address, input the Openwrt image file name to be
  30. flashed, start the TFTP server, and press "Enter".
  31. 5. Wait for the flashing to complete.
  32. How return to stock:
  33. 1. Remove the case and connect the TTL cable to the corresponding
  34. position.
  35. 2. Power on the device and quickly press "down" on the keyboard, then
  36. U-Boot will stay in the menu.
  37. 3. Select "1. Upgrade Firmware", select "0. TFTP Client(Default)".
  38. 4. Input the IP address, input the Stock “E-WEBOS” image file name to
  39. be flashed, start the TFTP server, and press "Enter".
  40. 5. Wait for the flashing to complete.
  41. About recovery:
  42. Connect uart, use u-boot menu to flash stock firmware image or boot
  43. OpenWrt initramfs image.
  44. About MAC Address:
  45. +---------+-------------------+-----------+
  46. | | MAC | Algorithm |
  47. +---------+-------------------+-----------+
  48. | WAN | 10:82:3D:XX:XX:9E | label |
  49. | LAN | 10:82:3D:XX:XX:9F | label+1 |
  50. | WLAN 2g | 10:82:3D:XX:XX:A0 | label+2 |
  51. | WLAN 5g | 10:82:3D:XX:XX:A1 | label+3 |
  52. +---------+-------------------+-----------+
  53. Signed-off-by: Ashley Lee <[email protected]>
  54. ---
  55. .../dts/mt7986a-ruijie-rg-x60-pro.dts | 280 ++++++++++++++++++
  56. .../filogic/base-files/etc/board.d/02_network | 6 +
  57. .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 +
  58. target/linux/mediatek/image/filogic.mk | 10 +
  59. 4 files changed, 301 insertions(+)
  60. create mode 100644 target/linux/mediatek/dts/mt7986a-ruijie-rg-x60-pro.dts
  61. diff --git a/target/linux/mediatek/dts/mt7986a-ruijie-rg-x60-pro.dts b/target/linux/mediatek/dts/mt7986a-ruijie-rg-x60-pro.dts
  62. new file mode 100644
  63. index 0000000000000..80b614ac2282d
  64. --- /dev/null
  65. +++ b/target/linux/mediatek/dts/mt7986a-ruijie-rg-x60-pro.dts
  66. @@ -0,0 +1,268 @@
  67. +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
  68. +
  69. +/dts-v1/;
  70. +#include <dt-bindings/gpio/gpio.h>
  71. +#include <dt-bindings/input/input.h>
  72. +#include <dt-bindings/leds/common.h>
  73. +
  74. +#include "mt7986a.dtsi"
  75. +
  76. +/ {
  77. + model = "Ruijie RG-X60 Pro";
  78. + compatible = "ruijie,rg-x60-pro", "mediatek,mt7986a";
  79. +
  80. + aliases {
  81. + serial0 = &uart0;
  82. + led-boot = &led_system;
  83. + led-failsafe = &led_alarm;
  84. + led-running = &led_system;
  85. + led-upgrade = &led_alarm;
  86. + };
  87. +
  88. + chosen {
  89. + bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x11002000";
  90. + };
  91. +
  92. + memory {
  93. + reg = <0 0x40000000 0 0x20000000>;
  94. + };
  95. +
  96. + gpio-keys {
  97. + compatible = "gpio-keys";
  98. +
  99. + reset {
  100. + label = "reset";
  101. + gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  102. + linux,code = <KEY_RESTART>;
  103. + };
  104. +
  105. + mesh {
  106. + label = "mesh";
  107. + gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  108. + linux,code = <BTN_MISC>;
  109. + };
  110. + };
  111. +
  112. + leds {
  113. + compatible = "gpio-leds";
  114. +
  115. + led_alarm: status_purple {
  116. + label = "purple:status";
  117. + gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  118. + };
  119. +
  120. + led_system: status_white {
  121. + label = "white:status";
  122. + gpios = <&pio 22 GPIO_ACTIVE_LOW>;
  123. + };
  124. + };
  125. +};
  126. +
  127. +&eth {
  128. + status = "okay";
  129. +
  130. + gmac0: mac@0 {
  131. + compatible = "mediatek,eth-mac";
  132. + reg = <0>;
  133. + phy-mode = "2500base-x";
  134. +
  135. + fixed-link {
  136. + speed = <2500>;
  137. + full-duplex;
  138. + pause;
  139. + };
  140. + };
  141. +
  142. + gmac1: mac@1 {
  143. + compatible = "mediatek,eth-mac";
  144. + reg = <1>;
  145. + phy-handle = <&phy7>;
  146. + phy-mode = "2500base-x";
  147. + };
  148. +
  149. + mdio: mdio-bus {
  150. + #address-cells = <1>;
  151. + #size-cells = <0>;
  152. + };
  153. +};
  154. +
  155. +&mdio {
  156. + switch: switch@1f {
  157. + compatible = "mediatek,mt7531";
  158. + reg = <31>;
  159. + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  160. + interrupt-controller;
  161. + #interrupt-cells = <1>;
  162. + interrupt-parent = <&pio>;
  163. + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
  164. + };
  165. +
  166. + phy7: phy@7 {
  167. + compatible = "ethernet-phy-ieee802.3-c45";
  168. + reg = <7>;
  169. + reset-assert-us = <100000>;
  170. + reset-deassert-us = <100000>;
  171. + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  172. + realtek,aldps-enable;
  173. + };
  174. +};
  175. +
  176. +&pio {
  177. + spi_flash_pins: spi-flash-pins-33-to-38 {
  178. + mux {
  179. + function = "spi";
  180. + groups = "spi0", "spi0_wp_hold";
  181. + };
  182. + conf-pu {
  183. + pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
  184. + drive-strength = <8>;
  185. + mediatek,pull-up-adv = <0>; /* bias-disable */
  186. + };
  187. + conf-pd {
  188. + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
  189. + drive-strength = <8>;
  190. + mediatek,pull-down-adv = <0>; /* bias-disable */
  191. + };
  192. + };
  193. +
  194. + wf_2g_5g_pins: wf_2g_5g-pins {
  195. + mux {
  196. + function = "wifi";
  197. + groups = "wf_2g", "wf_5g";
  198. + };
  199. + conf {
  200. + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
  201. + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
  202. + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
  203. + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
  204. + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
  205. + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
  206. + "WF1_TOP_CLK", "WF1_TOP_DATA";
  207. + drive-strength = <4>;
  208. + };
  209. + };
  210. +};
  211. +
  212. +&spi0 {
  213. + pinctrl-names = "default";
  214. + pinctrl-0 = <&spi_flash_pins>;
  215. + status = "okay";
  216. +
  217. + flash@0 {
  218. + compatible = "spi-nand";
  219. + #address-cells = <1>;
  220. + #size-cells = <1>;
  221. + reg = <0>;
  222. +
  223. + spi-max-frequency = <20000000>;
  224. + spi-tx-bus-width = <4>;
  225. + spi-rx-bus-width = <4>;
  226. +
  227. + mediatek,nmbm;
  228. + mediatek,bmt-max-ratio = <1>;
  229. + mediatek,bmt-max-reserved-blocks = <64>;
  230. +
  231. + partitions {
  232. + compatible = "fixed-partitions";
  233. + #address-cells = <1>;
  234. + #size-cells = <1>;
  235. +
  236. + partition@0 {
  237. + label = "BL2";
  238. + reg = <0x000000 0x100000>;
  239. + read-only;
  240. + };
  241. +
  242. + partition@100000 {
  243. + label = "u-boot-env";
  244. + reg = <0x100000 0x80000>;
  245. + read-only;
  246. + };
  247. +
  248. + factory: partition@180000 {
  249. + label = "Factory";
  250. + reg = <0x180000 0x200000>;
  251. + read-only;
  252. + };
  253. +
  254. + partition@380000 {
  255. + label = "FIP";
  256. + reg = <0x380000 0x200000>;
  257. + read-only;
  258. + };
  259. +
  260. + partition@580000 {
  261. + label = "product_info";
  262. + reg = <0x580000 0x80000>;
  263. + read-only;
  264. + };
  265. +
  266. + partition@600000 {
  267. + label = "kdump";
  268. + reg = <0x600000 0x80000>;
  269. + read-only;
  270. + };
  271. +
  272. + partition@680000 {
  273. + label = "ubi";
  274. + reg = <0x680000 0x3f00000>;
  275. + };
  276. + };
  277. + };
  278. +};
  279. +
  280. +&switch {
  281. + ports {
  282. + #address-cells = <1>;
  283. + #size-cells = <0>;
  284. +
  285. + port@0 {
  286. + reg = <0>;
  287. + label = "lan1";
  288. + };
  289. +
  290. + port@1 {
  291. + reg = <1>;
  292. + label = "lan2";
  293. + };
  294. +
  295. + port@2 {
  296. + reg = <2>;
  297. + label = "lan3";
  298. + };
  299. +
  300. + port@3 {
  301. + reg = <3>;
  302. + label = "lan4";
  303. + };
  304. +
  305. + port@6 {
  306. + reg = <6>;
  307. + label = "cpu";
  308. + ethernet = <&gmac0>;
  309. + phy-mode = "2500base-x";
  310. +
  311. + fixed-link {
  312. + speed = <2500>;
  313. + full-duplex;
  314. + pause;
  315. + };
  316. + };
  317. + };
  318. +};
  319. +
  320. +&wifi {
  321. + status = "okay";
  322. + pinctrl-names = "default";
  323. + pinctrl-0 = <&wf_2g_5g_pins>;
  324. +
  325. + mediatek,mtd-eeprom = <&factory 0x0>;
  326. +};
  327. +
  328. +&uart0 {
  329. + status = "okay";
  330. +};
  331. +
  332. +&watchdog {
  333. + status = "okay";
  334. +};
  335. diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  336. index b86c376d74176..28e5f26958567 100644
  337. --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  338. +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
  339. @@ -26,6 +26,7 @@
  340. asus,tuf-ax4200|\
  341. jdcloud,re-cp-03|\
  342. mediatek,mt7981-rfb|\
  343. + ruijie,rg-x60-pro|\
  344. zbtlink,zbt-z8102ax)
  345. ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
  346. ;;
  347. @@ -150,6 +151,11 @@
  348. wan_mac=$(macaddr_add "$lan_mac" 1)
  349. label_mac=$wan_mac
  350. ;;
  351. + ruijie,rg-x60-pro)
  352. + label_mac=$(mtd_get_mac_ascii product_info ethaddr)
  353. + wan_mac=$label_mac
  354. + lan_mac=$(macaddr_add "$label_mac" 1)
  355. + ;;
  356. xiaomi,mi-router-ax3000t|\
  357. xiaomi,mi-router-wr30u-112m-nmbm|\
  358. xiaomi,mi-router-wr30u-stock|\
  359. diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  360. index d9e0335b67f3b..0e6c3c1dbcb56 100644
  361. --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  362. +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
  363. @@ -104,6 +104,11 @@
  364. [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
  365. [ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
  366. ;;
  367. + ruijie,rg-x60-pro)
  368. + addr=$(mtd_get_mac_ascii product_info ethaddr)
  369. + [ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
  370. + [ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
  371. + ;;
  372. tplink,tl-xdr4288|\
  373. tplink,tl-xdr6086|\
  374. tplink,tl-xdr6088)
  375. diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
  376. index d0c9907635fb3..3bd6b3e1303e5 100644
  377. --- a/target/linux/mediatek/image/filogic.mk
  378. +++ b/target/linux/mediatek/image/filogic.mk
  379. @@ -674,6 +674,16 @@ define Device/routerich_ax3000
  380. endef
  381. TARGET_DEVICES += routerich_ax3000
  382. +define Device/ruijie_rg-x60-pro
  383. + DEVICE_VENDOR := Ruijie
  384. + DEVICE_MODEL := RG-X60 Pro
  385. + DEVICE_DTS := mt7986a-ruijie-rg-x60-pro
  386. + DEVICE_DTS_DIR := ../dts
  387. + DEVICE_PACKAGES := kmod-mt7986-firmware mt7986-wo-firmware
  388. + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
  389. +endef
  390. +TARGET_DEVICES += ruijie_rg-x60-pro
  391. +
  392. define Device/tplink_tl-xdr-common
  393. DEVICE_VENDOR := TP-Link
  394. DEVICE_DTS_DIR := ../dts