k2p_32m.patch 7.6 KB

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  1. diff --git a/target/linux/ramips/dts/mt7621_phicomm_k2p-32m.dts b/target/linux/ramips/dts/mt7621_phicomm_k2p-32m.dts
  2. new file mode 100644
  3. index 000000000000..e828b069afb4
  4. --- /dev/null
  5. +++ b/target/linux/ramips/dts/mt7621_phicomm_k2p-32m.dts
  6. @@ -0,0 +1,14 @@
  7. +#include "mt7621_phicomm_k2p.dtsi"
  8. +
  9. +/ {
  10. + compatible = "phicomm,k2p-32m", "mediatek,mt7621-soc";
  11. + model = "Phicomm K2P (32M)";
  12. +};
  13. +
  14. +&firmware {
  15. + reg = <0xa0000 0x1f60000>;
  16. +};
  17. +
  18. +&flash {
  19. + broken-flash-reset;
  20. +};
  21. diff --git a/target/linux/ramips/dts/mt7621_phicomm_k2p.dts b/target/linux/ramips/dts/mt7621_phicomm_k2p.dts
  22. index fa02521ba6c1..1a973a2a82ce 100644
  23. --- a/target/linux/ramips/dts/mt7621_phicomm_k2p.dts
  24. +++ b/target/linux/ramips/dts/mt7621_phicomm_k2p.dts
  25. @@ -1,169 +1,10 @@
  26. -#include "mt7621.dtsi"
  27. -
  28. -#include <dt-bindings/gpio/gpio.h>
  29. -#include <dt-bindings/input/input.h>
  30. +#include "mt7621_phicomm_k2p.dtsi"
  31. / {
  32. compatible = "phicomm,k2p", "mediatek,mt7621-soc";
  33. model = "Phicomm K2P";
  34. -
  35. - aliases {
  36. - led-boot = &led_blue;
  37. - led-failsafe = &led_blue;
  38. - led-running = &led_blue;
  39. - led-upgrade = &led_blue;
  40. - };
  41. -
  42. - leds {
  43. - compatible = "gpio-leds";
  44. -
  45. - stat_r {
  46. - label = "red:status";
  47. - gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
  48. - };
  49. -
  50. - stat_y {
  51. - label = "yellow:status";
  52. - gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  53. - };
  54. -
  55. - led_blue: stat_b {
  56. - label = "blue:status";
  57. - gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  58. - };
  59. - };
  60. -
  61. - keys {
  62. - compatible = "gpio-keys";
  63. -
  64. - reset {
  65. - label = "reset";
  66. - gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  67. - linux,code = <KEY_RESTART>;
  68. - };
  69. - };
  70. -};
  71. -
  72. -&spi0 {
  73. - status = "okay";
  74. -
  75. - flash@0 {
  76. - compatible = "jedec,spi-nor";
  77. - reg = <0>;
  78. - spi-max-frequency = <50000000>;
  79. -
  80. - partitions {
  81. - compatible = "fixed-partitions";
  82. - #address-cells = <1>;
  83. - #size-cells = <1>;
  84. -
  85. - partition@0 {
  86. - label = "u-boot";
  87. - reg = <0x0 0x30000>;
  88. - read-only;
  89. - };
  90. -
  91. - partition@30000 {
  92. - label = "u-boot-env";
  93. - reg = <0x30000 0x10000>;
  94. - read-only;
  95. - };
  96. -
  97. - factory: partition@40000 {
  98. - label = "factory";
  99. - reg = <0x40000 0x10000>;
  100. - read-only;
  101. - };
  102. -
  103. - partition@50000 {
  104. - label = "permanent_config";
  105. - reg = <0x50000 0x50000>;
  106. - read-only;
  107. - };
  108. -
  109. - partition@a0000 {
  110. - compatible = "denx,uimage";
  111. - label = "firmware";
  112. - reg = <0xa0000 0xf60000>;
  113. - };
  114. - };
  115. - };
  116. };
  117. -&pcie {
  118. - status = "okay";
  119. -};
  120. -
  121. -&pcie0 {
  122. - wifi@0,0 {
  123. - compatible = "mediatek,mt76";
  124. - reg = <0x0000 0 0 0 0>;
  125. - mediatek,mtd-eeprom = <&factory 0x0>;
  126. -
  127. - /* 5 GHz (phy1) does not take the address from calibration data,
  128. - but setting it manually here works */
  129. - nvmem-cells = <&macaddr_factory_4>;
  130. - nvmem-cell-names = "mac-address";
  131. - };
  132. -};
  133. -
  134. -&gmac0 {
  135. - nvmem-cells = <&macaddr_factory_e000>;
  136. - nvmem-cell-names = "mac-address";
  137. -};
  138. -
  139. -&switch0 {
  140. - ports {
  141. - port@0 {
  142. - status = "okay";
  143. - label = "lan1";
  144. - };
  145. -
  146. - port@1 {
  147. - status = "okay";
  148. - label = "lan2";
  149. - };
  150. -
  151. - port@2 {
  152. - status = "okay";
  153. - label = "lan3";
  154. - };
  155. -
  156. - port@3 {
  157. - status = "okay";
  158. - label = "lan4";
  159. - };
  160. -
  161. - port@4 {
  162. - status = "okay";
  163. - label = "wan";
  164. - nvmem-cells = <&macaddr_factory_e006>;
  165. - nvmem-cell-names = "mac-address";
  166. - };
  167. - };
  168. -};
  169. -
  170. -&state_default {
  171. - gpio {
  172. - groups = "i2c", "jtag";
  173. - function = "gpio";
  174. - };
  175. -};
  176. -
  177. -&factory {
  178. - compatible = "nvmem-cells";
  179. - #address-cells = <1>;
  180. - #size-cells = <1>;
  181. -
  182. - macaddr_factory_4: macaddr@4 {
  183. - reg = <0x4 0x6>;
  184. - };
  185. -
  186. - macaddr_factory_e000: macaddr@e000 {
  187. - reg = <0xe000 0x6>;
  188. - };
  189. -
  190. - macaddr_factory_e006: macaddr@e006 {
  191. - reg = <0xe006 0x6>;
  192. - };
  193. +&firmware {
  194. + reg = <0xa0000 0xf60000>;
  195. };
  196. diff --git a/target/linux/ramips/dts/mt7621_phicomm_k2p.dtsi b/target/linux/ramips/dts/mt7621_phicomm_k2p.dtsi
  197. new file mode 100644
  198. index 000000000000..90458050554c
  199. --- /dev/null
  200. +++ b/target/linux/ramips/dts/mt7621_phicomm_k2p.dtsi
  201. @@ -0,0 +1,165 @@
  202. +#include "mt7621.dtsi"
  203. +
  204. +#include <dt-bindings/gpio/gpio.h>
  205. +#include <dt-bindings/input/input.h>
  206. +
  207. +/ {
  208. + aliases {
  209. + led-boot = &led_blue;
  210. + led-failsafe = &led_blue;
  211. + led-running = &led_blue;
  212. + led-upgrade = &led_blue;
  213. + };
  214. +
  215. + leds {
  216. + compatible = "gpio-leds";
  217. +
  218. + stat_r {
  219. + label = "red:status";
  220. + gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
  221. + };
  222. +
  223. + stat_y {
  224. + label = "yellow:status";
  225. + gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  226. + };
  227. +
  228. + led_blue: stat_b {
  229. + label = "blue:status";
  230. + gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  231. + };
  232. + };
  233. +
  234. + keys {
  235. + compatible = "gpio-keys";
  236. +
  237. + reset {
  238. + label = "reset";
  239. + gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  240. + linux,code = <KEY_RESTART>;
  241. + };
  242. + };
  243. +};
  244. +
  245. +&spi0 {
  246. + status = "okay";
  247. +
  248. + flash: flash@0 {
  249. + compatible = "jedec,spi-nor";
  250. + reg = <0>;
  251. + spi-max-frequency = <50000000>;
  252. +
  253. + partitions {
  254. + compatible = "fixed-partitions";
  255. + #address-cells = <1>;
  256. + #size-cells = <1>;
  257. +
  258. + partition@0 {
  259. + label = "u-boot";
  260. + reg = <0x0 0x30000>;
  261. + read-only;
  262. + };
  263. +
  264. + partition@30000 {
  265. + label = "u-boot-env";
  266. + reg = <0x30000 0x10000>;
  267. + read-only;
  268. + };
  269. +
  270. + factory: partition@40000 {
  271. + label = "factory";
  272. + reg = <0x40000 0x10000>;
  273. + read-only;
  274. + };
  275. +
  276. + partition@50000 {
  277. + label = "permanent_config";
  278. + reg = <0x50000 0x50000>;
  279. + read-only;
  280. + };
  281. +
  282. + firmware: partition@a0000 {
  283. + compatible = "denx,uimage";
  284. + label = "firmware";
  285. + };
  286. + };
  287. + };
  288. +};
  289. +
  290. +&pcie {
  291. + status = "okay";
  292. +};
  293. +
  294. +&pcie0 {
  295. + wifi@0,0 {
  296. + compatible = "mediatek,mt76";
  297. + reg = <0x0000 0 0 0 0>;
  298. + mediatek,mtd-eeprom = <&factory 0x0>;
  299. +
  300. + /* 5 GHz (phy1) does not take the address from calibration data,
  301. + but setting it manually here works */
  302. + nvmem-cells = <&macaddr_factory_4>;
  303. + nvmem-cell-names = "mac-address";
  304. + };
  305. +};
  306. +
  307. +&gmac0 {
  308. + nvmem-cells = <&macaddr_factory_e000>;
  309. + nvmem-cell-names = "mac-address";
  310. +};
  311. +
  312. +&switch0 {
  313. + ports {
  314. + port@0 {
  315. + status = "okay";
  316. + label = "lan1";
  317. + };
  318. +
  319. + port@1 {
  320. + status = "okay";
  321. + label = "lan2";
  322. + };
  323. +
  324. + port@2 {
  325. + status = "okay";
  326. + label = "lan3";
  327. + };
  328. +
  329. + port@3 {
  330. + status = "okay";
  331. + label = "lan4";
  332. + };
  333. +
  334. + port@4 {
  335. + status = "okay";
  336. + label = "wan";
  337. + nvmem-cells = <&macaddr_factory_e006>;
  338. + nvmem-cell-names = "mac-address";
  339. + };
  340. + };
  341. +};
  342. +
  343. +&state_default {
  344. + gpio {
  345. + groups = "i2c", "jtag";
  346. + function = "gpio";
  347. + };
  348. +};
  349. +
  350. +&factory {
  351. + compatible = "nvmem-cells";
  352. + #address-cells = <1>;
  353. + #size-cells = <1>;
  354. +
  355. + macaddr_factory_4: macaddr@4 {
  356. + reg = <0x4 0x6>;
  357. + };
  358. +
  359. + macaddr_factory_e000: macaddr@e000 {
  360. + reg = <0xe000 0x6>;
  361. + };
  362. +
  363. + macaddr_factory_e006: macaddr@e006 {
  364. + reg = <0xe006 0x6>;
  365. + };
  366. +};
  367. diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
  368. index 8c3ef04e35f4..b043d14bd12f 100644
  369. --- a/target/linux/ramips/image/mt7621.mk
  370. +++ b/target/linux/ramips/image/mt7621.mk
  371. @@ -829,6 +829,16 @@ define Device/phicomm_k2p
  372. endef
  373. TARGET_DEVICES += phicomm_k2p
  374. +define Device/phicomm_k2p-32m
  375. + IMAGE_SIZE := 32128k
  376. + DEVICE_VENDOR := Phicomm
  377. + DEVICE_MODEL := K2P
  378. + DEVICE_VARIANT := 32M
  379. + SUPPORTED_DEVICES += k2p-32M
  380. + DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware
  381. +endef
  382. +TARGET_DEVICES += phicomm_k2p-32m
  383. +
  384. define Device/planex_vr500
  385. $(Device/uimage-lzma-loader)
  386. IMAGE_SIZE := 65216k
  387. --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
  388. +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
  389. @@ -28,7 +28,8 @@ case "$board" in
  390. > /sys${DEVPATH}/macaddress
  391. ;;
  392. dlink,dir-853-r1|\
  393. - phicomm,k2p)
  394. + phicomm,k2p|\
  395. + phicomm,k2p-32m)
  396. if [ "$PHYNBR" = "0" ]; then
  397. base_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x4)" -1)
  398. macaddr_setbit_la "$base_mac" > /sys${DEVPATH}/macaddress