From 9722009432a5553b11c8e0a04a275654de11dbc4 Mon Sep 17 00:00:00 2001
From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Date: Mon, 13 Jun 2016 16:33:06 +0530
Subject: [PATCH 53/93] armv8: arch-fsl-layerscape: Update name of Soc

Update the name of the Soc.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h |   14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index e4ff990..7a943be 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -8,13 +8,13 @@
 #define _FSL_LAYERSCAPE_CPU_H
 
 static struct cpu_type cpu_type_list[] = {
-	CPU_TYPE_ENTRY(LS2080, LS2080, 8),
-	CPU_TYPE_ENTRY(LS2085, LS2085, 8),
-	CPU_TYPE_ENTRY(LS2045, LS2045, 4),
-	CPU_TYPE_ENTRY(LS1043, LS1043, 4),
-	CPU_TYPE_ENTRY(LS1023, LS1023, 2),
-	CPU_TYPE_ENTRY(LS2040, LS2040, 4),
-	CPU_TYPE_ENTRY(LS1012, LS1012, 1),
+	CPU_TYPE_ENTRY(LS2080A, LS2080, 8),
+	CPU_TYPE_ENTRY(LS2085A, LS2085, 8),
+	CPU_TYPE_ENTRY(LS2045A, LS2045, 4),
+	CPU_TYPE_ENTRY(LS1043A, LS1043, 4),
+	CPU_TYPE_ENTRY(LS1023A, LS1023, 2),
+	CPU_TYPE_ENTRY(LS2040A, LS2040, 4),
+	CPU_TYPE_ENTRY(LS1012A, LS1012, 1),
 };
 
 #ifndef CONFIG_SYS_DCACHE_OFF
-- 
1.7.9.5

