From 0bfcfaafa23af0e8c9ae9df3236831fcaaa597b8 Mon Sep 17 00:00:00 2001
From: Anji J <anji.jagarlmudi@freescale.com>
Date: Mon, 4 Apr 2016 15:07:47 +0530
Subject: [PATCH 40/93] DNCPE-138 CSU config for PFE

Configure PFE for NS access.

Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
 .../include/asm/arch-fsl-layerscape/ns_access.h    |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index 2fd33e1..5250ac7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -25,6 +25,7 @@ enum csu_cslx_ind {
 	CSU_CSLX_PCIE3_IO,
 	CSU_CSLX_USB3 = 20,
 	CSU_CSLX_USB2,
+	CSU_CSLX_PFE = 23,
 	CSU_CSLX_SERDES = 32,
 	CSU_CSLX_QDMA,
 	CSU_CSLX_LPUART2,
@@ -105,6 +106,7 @@ static struct csu_ns_dev ns_dev[] = {
 	 {CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
 	 {CSU_CSLX_USB3, CSU_ALL_RW},
 	 {CSU_CSLX_USB2, CSU_ALL_RW},
+	 {CSU_CSLX_PFE, CSU_ALL_RW},
 	 {CSU_CSLX_SERDES, CSU_ALL_RW},
 	 {CSU_CSLX_QDMA, CSU_ALL_RW},
 	 {CSU_CSLX_LPUART2, CSU_ALL_RW},
-- 
1.7.9.5

