// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qcom-ipq4019.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>

/ {
	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};

	aliases {
		serial0 = &blsp1_uart1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	soc {
		tcsr@1949000 {
			compatible = "qcom,tcsr";
			reg = <0x1949000 0x100>;
			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
		};

		tcsr@194b000 {
			status = "okay";

			compatible = "qcom,tcsr";
			reg = <0x194b000 0x100>;
			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
		};

		ess_tcsr@1953000 {
			compatible = "qcom,tcsr";
			reg = <0x1953000 0x1000>;
			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
		};

		tcsr@1957000 {
			compatible = "qcom,tcsr";
			reg = <0x1957000 0x100>;
			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
		};

		keys {
			compatible = "gpio-keys";

			reset {
				label = "reset";
				gpios = <&tlmm 4 1>;
				linux,code = <KEY_RESTART>;
			};
		};
	};
};

&prng {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&crypto {
	status = "okay";
};

&tlmm {
	serial_pins: serial_pinmux {
		mux {
			pins = "gpio60", "gpio61";
			function = "blsp_uart0";
			bias-disable;
		};
	};

	spi_0_pins: spi_0_pinmux {
		pinmux {
			function = "blsp_spi0";
			pins = "gpio55", "gpio56", "gpio57";
		};
		pinmux_cs {
			function = "gpio";
			pins = "gpio54";
		};
		pinconf {
			pins = "gpio55", "gpio56", "gpio57";
			drive-strength = <12>;
			bias-disable;
		};
		pinconf_cs {
			pins = "gpio54";
			drive-strength = <2>;
			bias-disable;
			output-high;
		};
	};

	mdio_pins: mdio_pinmux {
		mux_1 {
			pins = "gpio53";
			function = "mdio";
			bias-pull-up;
		};
		mux_2 {
			pins = "gpio52";
			function = "mdc";
			bias-pull-up;
		};
	};

	i2c_0_pins: i2c_0_pinmux {
		mux {
			pins = "gpio58", "gpio59";
			function = "blsp_i2c0";
			bias-disable;
		};
	};
};

&blsp_dma {
	status = "okay";
};

&blsp1_uart1 {
	pinctrl-0 = <&serial_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&blsp1_spi1 {
	pinctrl-0 = <&spi_0_pins>;
	pinctrl-names = "default";
	cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
	num-cs = <2>;
	status = "okay";

	xt25f128b@0 {
		/*
		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
		 * partitions settings and mangles the partition config so
		 * 0:QSEE/0:QSEE_1, 0:CDT/0:CDT_1 and  0:APPSBL/0:APPSBL_1 pairs
		 * can be swaped. It isn't a problem but we never can be sure where
		 * OFW put factory images. "n25q128a11" is required for proper nor
		 * recognition in u-boot.
		 */
		compatible = "jedec,spi-nor", "n25q128a11";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:SBL1";
				reg = <0x0 0x40000>;
				read-only;
			};

			partition@40000 {
				label = "0:MIBIB";
				reg = <0x40000 0x20000>;
				read-only;
			};

			partition@60000 {
				label = "0:BOOTCONFIG";
				reg = <0x60000 0x20000>;
				read-only;
			};

			partition@80000 {
				label = "0:BOOTCONFIG1";
				reg = <0x80000 0x20000>;
				read-only;
			};

			partition@a0000 {
				label = "0:QSEE";
				reg = <0xa0000 0x60000>;
				read-only;
			};

			partition@100000 {
				label = "0:QSEE_1";
				reg = <0x100000 0x60000>;
				read-only;
			};

			partition@160000 {
				label = "0:CDT";
				reg = <0x160000 0x10000>;
				read-only;
			};

			partition@170000 {
				label = "0:CDT_1";
				reg = <0x170000 0x10000>;
				read-only;
			};

			partition@180000 {
				label = "0:DDRPARAMS";
				reg = <0x180000 0x10000>;
				read-only;
			};

			partition@190000 {
				label = "0:APPSBLENV";
				reg = <0x190000 0x10000>;
				read-only;
			};

			partition@1a0000 {
				label = "0:APPSBL";
				reg = <0x1a0000 0xa0000>;
				read-only;
			};

			partition@240000 {
				label = "0:APPSBL_1";
				reg = <0x240000 0xa0000>;
				read-only;
			};

			partition@2e0000 {
				label = "0:ART";
				reg = <0x2e0000 0x10000>;
				read-only;
			};

			config: partition@2f0000 {
				label = "0:CONFIG";
				reg = <0x2f0000 0x10000>;
				read-only;
			};

			partition@300000 {
				label = "0:CONFIG_RW";
				reg = <0x300000 0x10000>;
				read-only;
			};

			partition@310000 {
				label = "0:EVENTSLOG";
				reg = <0x310000 0x90000>;
				read-only;
			};
		};
	};

	xt26g02a@1 {
		/*
		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
		 * partitions settings and mangles the partition config so
		 * rootfs/rootfs_1 pairs can be swaped.
		 * It isn't a problem but we never can be sure where OFW put
		 * factory images. "spinand,mt29f" value is required for proper
		 * nand recognition in u-boot.
		 */
		compatible = "spi-nand", "spinand,mt29f";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <1>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "rootfs_1";
				reg = <0x00000000 0x08000000>;
			};

			partition@8000000 {
				label = "rootfs";
				reg = <0x08000000 0x08000000>;
			};
		};
	};
};

&mdio {
	status = "okay";
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
	phy-reset-gpio = <&tlmm 62 0>;
};

&usb3_ss_phy {
	status = "okay";
};

&usb3_hs_phy {
	status = "okay";
};

&usb3 {
	status = "okay";
};

&usb2_hs_phy {
	status = "okay";
};

&usb2 {
	status = "okay";
};
