// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;

#define STRINGIZE(s) #s
#define LAN_LABEL(p, s) STRINGIZE(p ## s)
#define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)

#define INTERNAL_PHY(n) \
	phy##n: ethernet-phy@##n { \
		reg = <##n>; \
		compatible = "ethernet-phy-ieee802.3-c22"; \
		phy-is-integrated; \
	};

#define EXTERNAL_PHY(n) \
	phy##n: ethernet-phy@##n { \
		reg = <##n>; \
		compatible = "ethernet-phy-ieee802.3-c22"; \
	};

#define EXTERNAL_SFP_PHY(n) \
	phy##n: ethernet-phy@##n { \
		compatible = "ethernet-phy-ieee802.3-c22"; \
		sfp; \
		media = "fibre"; \
		reg = <##n>; \
	};

#define SWITCH_PORT(n, s, m) \
	port@##n { \
		reg = <##n>; \
		label = SWITCH_PORT_LABEL(s) ; \
		phy-handle = <&phy##n>; \
		phy-mode = #m ; \
	};

#define SWITCH_SFP_PORT(n, s, m) \
	port@##n { \
		reg = <##n>; \
		label = SWITCH_PORT_LABEL(s) ; \
		phy-handle = <&phy##n>; \
		phy-mode = #m ; \
		fixed-link { \
			speed = <1000>; \
			full-duplex; \
		}; \
	};

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	compatible = "realtek,rtl838x-soc";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		frequency = <800000000>;

		cpu@0 {
			compatible = "mips,mips34Kc";
			reg = <0>;
		};
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x8000000>;
	};

	chosen {
		bootargs = "console=ttyS0,38400";
	};

	cpuintc: cpuintc {
		compatible = "mti,cpu-interrupt-controller";
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
	};

	osc: oscillator {
		compatible = "fixed-clock";
		#clock-cells = <1>;
		clock-frequency  = <175000000>;
		clock-output-names = "osc";
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x18000000 0x10000>;

		intc: rtlintc@3000 {
			compatible = "realtek,rtl-intc";
			reg = <0x3000 0x20>;
			#address-cells = <0>;
			#interrupt-cells = <1>;
			interrupt-controller;
			interrupt-map =
				<31 &cpuintc 1>, /* UART1 */
				<30 &cpuintc 2>, /* UART0 */
				<28 &cpuintc 1>, /* USB_H2 */
				<24 &cpuintc 4>, /* NIC */
				<23 &cpuintc 3>, /* SWCORE */
				<13 &cpuintc 4>, /* GPIO_ABCD */
				<11 &cpuintc 1>, /* TC4 */
				<10 &cpuintc 1>, /* TC3 */
				<9 &cpuintc 1>,  /* TC2 */
				<8 &cpuintc 1>,  /* TC1 */
				<7 &cpuintc 5>;  /* TC0 */
		};

		timer: timer@3200 {
			compatible = "realtek,rtl9300-timer";
			reg = <0x3200 0x60>;
			interrupt-parent = <&intc>;
			interrupts = <8>;
			interrupt-names = "ostimer";
			clocks = <&osc 0>;
		};

		spi0: spi@1200 {
			compatible = "realtek,rtl8380-spi";
			reg = <0x1200 0x100>;

			#address-cells = <1>;
			#size-cells = <0>;
		};

		uart0: uart@2000 {
			compatible = "ns16550a";
			reg = <0x2000 0x100>;

			clock-frequency = <175000000>;

			interrupt-parent = <&intc>;
			interrupts = <30>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;
		};

		uart1: uart@2100 {
			compatible = "ns16550a";
			reg = <0x2100 0x100>;

			clock-frequency = <175000000>;

			interrupt-parent = <&intc>;
			interrupts = <31>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;

			status = "disabled";
		};

		gpio0: gpio-controller@3500 {
			compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
			reg = <0x3500 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <32>;
			interrupt-parent = <&intc>;
			interrupts = <31>;

			/*
			 * currently, RTL930x GPIO is not supported in
			 * upstreamed driver (gpio-realtek-otto)
			 */
			status = "disabled";
		};
	};

	ethernet0: ethernet@1b00a300 {
		compatible = "realtek,rtl838x-eth";
		reg = <0x1b00a300 0x100>;
		interrupt-parent = <&intc>;
		interrupts = <24>;
		#interrupt-cells = <1>;
		phy-mode = "internal";

		fixed-link {
			speed = <1000>;
			full-duplex;
		};
	};

	switch0: switch@1b000000 {
		compatible = "realtek,rtl83xx-switch";

		interrupt-parent = <&intc>;
		interrupts = <20>;
	};
};
