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@@ -0,0 +1,59 @@
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+From c8262ebbf7ca546dd5ead3c0383a89eb401627ff Mon Sep 17 00:00:00 2001
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+From: Daniel Golle <[email protected]>
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+Date: Wed, 13 Mar 2024 17:55:02 +0000
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+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix PPE hanging issue
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+
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+A patch to resolve an issue was found in MediaTek's GPL-licensed SDK:
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+In the mtk_ppe_stop() function, the PPE scan mode is not disabled before
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+disabling the PPE. This can potentially lead to a hang during the process
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+of disabling the PPE.
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+
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+Without this patch, the PPE may experience a hang during the reboot test.
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+
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+Reference: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/b40da332dfe763932a82f9f62a4709457a15dd6c
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+
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+Suggested-by: Bc-bocun Chen <[email protected]>
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+Signed-off-by: Daniel Golle <[email protected]>
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+---
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+ drivers/net/ethernet/mediatek/mtk_ppe.c | 18 +++++++++++-------
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+ 1 file changed, 11 insertions(+), 7 deletions(-)
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+
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+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
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++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
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+@@ -1008,7 +1008,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
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+ MTK_PPE_KEEPALIVE_DISABLE) |
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+ FIELD_PREP(MTK_PPE_TB_CFG_HASH_MODE, 1) |
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+ FIELD_PREP(MTK_PPE_TB_CFG_SCAN_MODE,
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+- MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
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++ MTK_PPE_SCAN_MODE_CHECK_AGE) |
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+ FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
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+ MTK_PPE_ENTRIES_SHIFT);
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+ if (mtk_is_netsys_v2_or_greater(ppe->eth))
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+@@ -1104,17 +1104,21 @@ int mtk_ppe_stop(struct mtk_ppe *ppe)
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+
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+ mtk_ppe_cache_enable(ppe, false);
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+
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+- /* disable offload engine */
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+- ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
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+- ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
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+-
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+ /* disable aging */
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+ val = MTK_PPE_TB_CFG_AGE_NON_L4 |
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+ MTK_PPE_TB_CFG_AGE_UNBIND |
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+ MTK_PPE_TB_CFG_AGE_TCP |
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+ MTK_PPE_TB_CFG_AGE_UDP |
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+- MTK_PPE_TB_CFG_AGE_TCP_FIN;
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++ MTK_PPE_TB_CFG_AGE_TCP_FIN |
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++ MTK_PPE_TB_CFG_SCAN_MODE;
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+ ppe_clear(ppe, MTK_PPE_TB_CFG, val);
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+
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+- return mtk_ppe_wait_busy(ppe);
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++ if (mtk_ppe_wait_busy(ppe))
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++ return -ETIMEDOUT;
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++
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++ /* disable offload engine */
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++ ppe_clear(ppe, MTK_PPE_GLO_CFG, MTK_PPE_GLO_CFG_EN);
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++ ppe_w32(ppe, MTK_PPE_FLOW_CFG, 0);
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++
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++ return 0;
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+ }
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Daniel Golle