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+/*
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+ * q5xr5.dts - Device Tree file for Exegin Q5xR5 board
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+ *
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+ * Copyright (C) 2014 Owen Kirby <[email protected]>
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+ *
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+ * Licensed under GPLv2.
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+ */
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+/dts-v1/;
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+#include "at91sam9g20.dtsi"
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+
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+/ {
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+ model = "Exegin Q5x (rev5)";
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+ compatible = "exegin,q5xr5", "atmel,at91sam9g20", "atmel,at91sam9";
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+
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+ chosen {
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+ bootargs = "console=ttyS0,115200 rootfstype=squashfs,jffs2";
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+ };
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+
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+ memory {
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+ reg = <0x20000000 0x0>;
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+ };
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+
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+ clocks {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ main_clock: clock@0 {
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+ compatible = "atmel,osc", "fixed-clock";
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+ clock-frequency = <18432000>;
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+ };
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+
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+ slow_xtal {
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+ clock-frequency = <32768>;
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+ };
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+
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+ main_xtal {
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+ clock-frequency = <18432000>;
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+ };
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+ };
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+
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+ ahb {
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+ apb {
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+ pinctrl@fffff400 {
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+ board {
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+ pinctrl_pck0_as_mck: pck0_as_mck {
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+ atmel,pins = <2 1 0x2 0x0>; /* PC1 periph B */
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+ };
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+ pinctrl_spi0_npcs0: spi0_npcs0 {
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+ atmel,pins = <0 3 0x1 0x0>; /* PA3 periph A */
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+ };
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+ pinctrl_spi0_npcs1: spi0_npcs1 {
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+ atmel,pins = <2 11 0x2 0x0>; /* PC11 periph B */
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+ };
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+ pinctrl_spi1_npcs0: spi1_npcs0 {
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+ atmel,pins = <1 3 0x1 0x0>; /* PB3 periph A */
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+ };
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+ pinctrl_spi1_npcs1: spi1_npcs1 {
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+ atmel,pins = <2 5 0x2 0x0>; /* PC5 periph B */
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+ };
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+ };
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+
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+ spi0 {
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+ pinctrl_spi0: spi0-0 {
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+ atmel,pins =
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+ <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
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+ 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
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+ 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
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+ };
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+ };
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+
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+ spi1 {
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+ pinctrl_spi1: spi1-0 {
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+ atmel,pins =
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+ <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
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+ 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
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+ 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
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+ };
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+ };
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+ };
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+
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+ dbgu: serial@fffff200 {
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+ status = "okay";
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+ };
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+
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+ usart0: serial@fffb0000 {
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+ pinctrl-0 =
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+ <&pinctrl_usart0
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+ &pinctrl_usart0_rts
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+ &pinctrl_usart0_cts
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+ &pinctrl_usart0_dtr_dsr
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+ &pinctrl_usart0_dcd
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+ &pinctrl_usart0_ri>;
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+ status = "okay";
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+ };
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+
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+ macb0: ethernet@fffc4000 {
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+ phy-mode = "mii";
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+ status = "okay";
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+ };
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+
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+ usb1: gadget@fffa4000 {
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+ status = "okay";
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+ };
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+
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+ watchdog@fffffd40 {
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+ status = "okay";
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+ };
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+
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+ spi0: spi@fffc8000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "atmel,at91rm9200-spi";
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+ reg = <0xfffc8000 0x200>;
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+ interrupts = <12 4 3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_spi0>;
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+ status = "okay";
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+ cs-gpios = <&pioA 3 0>, <&pioC 11 1>, <0>, <0>;
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+
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+ m25p80@0 {
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+ compatible = "sst,sst25vf040b";
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+ spi-max-frequency = <20000000>;
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ at91boot@0 {
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+ label = "at91boot";
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+ reg = <0x0 0x4000>;
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+ };
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+ uenv@4000 {
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+ label = "uboot-env";
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+ reg = <0x4000 0x4000>;
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+ };
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+ uboot@8000 {
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+ label = "uboot";
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+ reg = <0x8000 0x3E000>;
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+ };
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+ };
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+ spidev@1 {
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+ compatible = "spidev";
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+ spi-max-frequency = <2000000>;
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+ reg = <1>;
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+ };
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+ };
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+ spi1: spi@fffcc000 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "atmel,at91rm9200-spi";
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+ reg = <0xfffcc000 0x200>;
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+ interrupts = <13 4 3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_spi1>;
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+ cs-gpios = <&pioB 3 0>, <&pioC 5 1>, <0>, <0>;
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+ status = "okay";
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+
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+ spidev@0 {
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+ compatible = "spidev";
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+ spi-max-frequency = <2000000>;
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+ reg = <0>;
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+ };
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+ spidev@1 {
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+ compatible = "spidev";
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+ spi-max-frequency = <2000000>;
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+ reg = <1>;
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+ };
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+ };
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+ };
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+
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+ usb0: ohci@00500000 {
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+ num-ports = <2>;
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+ status = "okay";
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+ };
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+ };
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+
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+ flash@10000000 {
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+ compatible = "cfi-flash";
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+ bank-width = <2>;
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+ reg = <0x10000000 0x00800000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ kernel@0 {
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+ label = "kernel";
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+ reg = <0x0 0x200000>;
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+ };
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+ rootfs@200000 {
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+ label = "rootfs";
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+ reg = <0x200000 0x600000>;
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+ };
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+ };
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+};
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