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@@ -0,0 +1,487 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+/* Copyright 2023 Nokia */
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+
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+/dts-v1/;
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+
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+#include "ipq8074.dtsi"
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+#include "ipq8074-hk-cpu.dtsi"
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+#include "ipq8074-ess.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/leds/common.h>
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+
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+/ {
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+ model = "Compex WPQ873";
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+ compatible = "compex,wpq873", "qcom,ipq8074";
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+
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+ aliases {
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+ serial0 = &blsp1_uart5;
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+ led-boot = &led_power_blue;
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+ led-failsafe = &led_power_red;
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+ led-running = &led_system_green;
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+ led-upgrade = &led_system_blue;
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+ /* Aliases as required by u-boot to patch MAC addresses */
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+ ethernet0 = &dp6;
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+ ethernet1 = &dp2;
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+ ethernet2 = &dp3;
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+ ethernet3 = &dp4;
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+ label-mac-device = &dp6;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ bootargs-append = " root=/dev/ubiblock0_1";
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+
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+ reset {
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+ label = "reset";
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+ gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_RESTART>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led_power_red: power-red {
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+ label = "red:power";
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+ gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
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+ color = <LED_COLOR_ID_RED>;
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+ };
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+
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+ led_power_blue: power-blue {
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+ label = "blue:power";
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+ gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
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+ color = <LED_COLOR_ID_BLUE>;
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+ };
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+
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+ led_system_red: system-red {
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+ label = "red:system";
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+ gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
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+ color = <LED_COLOR_ID_RED>;
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+ };
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+
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+ led_system_green: system-green {
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+ label = "green:system";
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+ gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
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+ color = <LED_COLOR_ID_GREEN>;
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+ };
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+
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+ led_system_blue: system-blue {
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+ label = "blue:system";
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+ gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
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+ color = <LED_COLOR_ID_BLUE>;
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+ };
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+ };
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+};
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+
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+&tlmm {
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+ mdio_pins: mdio-pins {
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+ mdc {
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+ pins = "gpio68";
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+ function = "mdc";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+
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+ mdio {
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+ pins = "gpio69";
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+ function = "mdio";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+ };
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+
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+ i2c_pins: i2c-pins {
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+ pins = "gpio0", "gpio2";
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+ function = "blsp5_i2c";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+};
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+
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+&blsp1_uart5 {
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+ status = "okay";
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+};
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+
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+&blsp1_i2c6 {
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+ status = "okay";
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+
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+ pinctrl-0 = <&i2c_pins>;
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+ pinctrl-names = "default";
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+};
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+
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+&prng {
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+ status = "okay";
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+};
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+
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+&cryptobam {
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+ status = "okay";
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+};
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+
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+&crypto {
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+ status = "okay";
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+};
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+
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+&qpic_bam {
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+ status = "okay";
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+};
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+
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+&blsp1_spi1 {
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+ status = "okay";
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+};
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+
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+&tlmm {
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+ mdio_pins: mdio-pins {
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+ mdc {
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+ pins = "gpio68";
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+ function = "mdc";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+
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+ mdio {
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+ pins = "gpio69";
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+ function = "mdio";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+ };
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+
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+ button_pins: button_pins {
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+ reset_button {
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+ pins = "gpio66";
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+ function = "gpio";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+ };
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+};
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+
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+&blsp1_spi1 {
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+ status = "okay";
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+
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0>;
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+ compatible = "jedec,spi-nor";
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+ spi-max-frequency = <50000000>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "0:sbl1";
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+ reg = <0x0 0x50000>;
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+ read-only;
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+ };
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+
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+ partition@50000 {
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+ label = "0:mibib";
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+ reg = <0x50000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@60000 {
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+ label = "0:bootconfig";
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+ reg = <0x60000 0x20000>;
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+ read-only;
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+ };
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+
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+ partition@80000 {
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+ label = "0:bootconfig1";
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+ reg = <0x80000 0x20000>;
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+ read-only;
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+ };
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+
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+ partition@a0000 {
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+ label = "0:qsee";
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+ reg = <0xa0000 0x180000>;
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+ read-only;
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+ };
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+
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+ partition@220000 {
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+ label = "0:qsee_1";
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+ reg = <0x220000 0x180000>;
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+ read-only;
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+ };
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+
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+ partition@3a0000 {
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+ label = "0:devcfg";
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+ reg = <0x3a0000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@3b0000 {
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+ label = "0:devcfg_1";
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+ reg = <0x3b0000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@3c0000 {
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+ label = "0:apdp";
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+ reg = <0x3c0000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@3d0000 {
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+ label = "0:apdp_1";
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+ reg = <0x3d0000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@3e0000 {
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+ label = "0:rpm";
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+ reg = <0x3e0000 0x40000>;
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+ read-only;
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+ };
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+
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+ partition@420000 {
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+ label = "0:rpm_1";
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+ reg = <0x420000 0x40000>;
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+ read-only;
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+ };
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+
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+ partition@460000 {
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+ label = "0:cdt";
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+ reg = <0x460000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@470000 {
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+ label = "0:cdt_1";
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+ reg = <0x470000 0x10000>;
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+ read-only;
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+ };
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+
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+ partition@480000 {
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+ label = "0:appsblenv";
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+ reg = <0x480000 0x10000>;
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+ };
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+
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+ partition@490000 {
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+ label = "0:appsbl";
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+ reg = <0x490000 0xa0000>;
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+ read-only;
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+ };
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+
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+ partition@550000 {
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+ label = "0:appsbl_1";
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+ reg = <0x530000 0xa0000>;
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+ read-only;
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+ };
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+
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+ partition@610000 {
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+ label = "0:art";
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+ reg = <0x5d0000 0x40000>;
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+ read-only;
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+ };
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+
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+ partition@650000 {
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+ label = "0:ethphyfw";
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+ reg = <0x610000 0x80000>;
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+ read-only;
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+ };
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+ };
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+ };
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+};
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+
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+&qpic_nand {
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+ status = "okay";
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+
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+ nand@0 {
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+ reg = <0>;
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+ nand-ecc-strength = <8>;
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+ nand-ecc-step-size = <512>;
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+ nand-bus-width = <8>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "rootfs";
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+ reg = <0x0000000 0x3400000>;
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+ };
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+
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+ partition@3400000 {
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+ label = "0:wififw";
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+ reg = <0x3400000 0x800000>;
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+ read-only;
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+ };
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+
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+ partition@3c00000 {
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+ label = "rootfs_1";
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+ reg = <0x3c00000 0x3400000>;
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+ };
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+
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+ partition@7000000 {
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+ label = "0:wififw_1";
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+ reg = <0x7000000 0x800000>;
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+ read-only;
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+ };
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+ };
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+ };
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+};
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+
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+&qusb_phy_0 {
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+ status = "okay";
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+};
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+
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+&qusb_phy_1 {
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+ status = "okay";
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+};
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+
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+&ssphy_0 {
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+ status = "okay";
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+};
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+
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+&ssphy_1 {
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+ status = "okay";
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+};
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+
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+&usb_0 {
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+ status = "okay";
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+};
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+
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+&usb_1 {
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+ status = "okay";
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+};
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+
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+
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+&mdio {
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+ status = "okay";
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+ pinctrl-0 = <&mdio_pins>;
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+ pinctrl-names = "default";
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+ reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
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+
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+ qca8075_1: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+
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+ qca8075_2: ethernet-phy@2 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <2>;
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+ };
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+
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+ qca8075_3: ethernet-phy@3 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <3>;
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+ };
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+
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+ qca8081: ethernet-phy@28 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <28>;
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+ reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
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+ };
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+
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+};
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+
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+&switch {
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+ status = "okay";
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+
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+ switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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+ switch_lan_bmp = <0x3e>; /* lan port bitmap */
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+ switch_wan_bmp = <0x40>; /* wan port bitmap */
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+ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
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+ switch_mac_mode1 = <0x0f>; /* mac mode for uniphy instance1*/
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+ switch_mac_mode2 = <0x0f>; /* mac mode for uniphy instance2*/
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+ bm_tick_mode = <0>; /* bm tick mode */
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+ tm_tick_mode = <0>; /* tm tick mode */
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+
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+ qcom,port_phyinfo {
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+ port@2 {
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+ port_id = <2>;
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+ phy_address = <1>;
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+ };
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+ port@3 {
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+ port_id = <3>;
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+ phy_address = <2>;
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+ };
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+ port@4 {
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+ port_id = <4>;
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+ phy_address = <3>;
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+ };
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+ port@5 {
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+ port_id = <6>;
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+ phy_address = <28>;
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+ port_mac_sel = "QGMAC_PORT";
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+ };
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+ };
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+};
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+
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+&edma {
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+ status = "okay";
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+};
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+
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+&dp2 {
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+ status = "okay";
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+ phy-handle = <&qca8075_1>;
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+ label = "lan1";
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+};
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+
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+&dp3 {
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+ status = "okay";
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+ phy-handle = <&qca8075_2>;
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+ label = "lan2";
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+};
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+
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+&dp4 {
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+ status = "okay";
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+ phy-handle = <&qca8075_3>;
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+ label = "lan3";
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+};
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+
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+&dp6 {
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+ status = "okay";
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+ phy-handle = <&qca8081>;
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+ label = "wan";
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+};
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+
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+&pcie_qmp0 {
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+ status = "okay";
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+};
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+
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+&pcie0 {
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+ status = "okay";
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+
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+ perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
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+
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+ bridge@0,0 {
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+ reg = <0x00020000 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ ranges;
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+ };
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+};
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+
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+&pcie_qmp1 {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&pcie1 {
|
|
|
+ status = "okay";
|
|
|
+
|
|
|
+ perst-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
|
|
|
+
|
|
|
+ bridge@1,0 {
|
|
|
+ reg = <0x00010000 0 0 0 0>;
|
|
|
+ #address-cells = <3>;
|
|
|
+ #size-cells = <2>;
|
|
|
+ ranges;
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&wifi {
|
|
|
+ status = "okay";
|
|
|
+
|
|
|
+ qcom,ath11k-calibration-variant = "Compex-WPQ873";
|
|
|
+};
|