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@@ -0,0 +1,96 @@
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+--- a/arch/mips/bcm63xx/irq.c
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++++ b/arch/mips/bcm63xx/irq.c
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+@@ -45,8 +45,8 @@ static void __internal_irq_unmask_64(uns
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+ #define is_ext_irq_cascaded 0
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+ #define ext_irq_start 0
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+ #define ext_irq_end 0
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+-#define ext_irq_count 0
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+-#define ext_irq_cfg_reg1 0
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++#define ext_irq_count 4
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++#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6345
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+ #define ext_irq_cfg_reg2 0
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+ #endif
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+ #ifdef CONFIG_BCM63XX_CPU_6348
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+@@ -122,11 +122,15 @@ static void bcm63xx_init_irq(void)
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+ irq_stat_addr += PERF_IRQSTAT_6338_REG;
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+ irq_mask_addr += PERF_IRQMASK_6338_REG;
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+ irq_bits = 32;
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++ ext_irq_count = 4;
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++ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
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+ break;
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+ case BCM6345_CPU_ID:
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+ irq_stat_addr += PERF_IRQSTAT_6345_REG;
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+ irq_mask_addr += PERF_IRQMASK_6345_REG;
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+ irq_bits = 32;
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++ ext_irq_count = 4;
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++ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
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+ break;
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+ case BCM6348_CPU_ID:
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+ irq_stat_addr += PERF_IRQSTAT_6348_REG;
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+@@ -413,7 +417,8 @@ static int bcm63xx_external_irq_set_type
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+ reg = bcm_perf_readl(regaddr);
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+ irq %= 4;
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+
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+- if (BCMCPU_IS_6348()) {
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++ switch (bcm63xx_get_cpu_id()) {
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++ case BCM6348_CPU_ID:
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+ if (levelsense)
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+ reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
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+ else
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+@@ -426,9 +431,12 @@ static int bcm63xx_external_irq_set_type
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+ reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
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+ else
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+ reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
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+- }
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++ break;
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+
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+- if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
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++ case BCM6338_CPU_ID:
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++ case BCM6345_CPU_ID:
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++ case BCM6358_CPU_ID:
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++ case BCM6368_CPU_ID:
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+ if (levelsense)
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+ reg |= EXTIRQ_CFG_LEVELSENSE(irq);
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+ else
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+@@ -441,6 +449,9 @@ static int bcm63xx_external_irq_set_type
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+ reg |= EXTIRQ_CFG_BOTHEDGE(irq);
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+ else
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+ reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
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++ break;
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++ default:
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++ BUG();
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+ }
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+
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+ bcm_perf_writel(reg, regaddr);
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+--- a/arch/mips/bcm63xx/setup.c
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++++ b/arch/mips/bcm63xx/setup.c
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+@@ -71,6 +71,9 @@ void bcm63xx_machine_reboot(void)
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+ case BCM6338_CPU_ID:
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+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
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+ break;
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++ case BCM6345_CPU_ID:
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++ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345;
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++ break;
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+ case BCM6348_CPU_ID:
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+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
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+ break;
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+@@ -80,6 +83,9 @@ void bcm63xx_machine_reboot(void)
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+ }
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+
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+ for (i = 0; i < 2; i++) {
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++ if (!perf_regs[i])
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++ break;
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++
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+ reg = bcm_perf_readl(perf_regs[i]);
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+ if (BCMCPU_IS_6348()) {
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+ reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
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+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+@@ -134,6 +134,7 @@
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+
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+ /* External Interrupt Configuration register */
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+ #define PERF_EXTIRQ_CFG_REG_6338 0x14
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++#define PERF_EXTIRQ_CFG_REG_6345 0x14
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+ #define PERF_EXTIRQ_CFG_REG_6348 0x14
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+ #define PERF_EXTIRQ_CFG_REG_6358 0x14
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+ #define PERF_EXTIRQ_CFG_REG_6368 0x18
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