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@@ -0,0 +1,111 @@
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+/*
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+ * Atheros PB92 board support
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+ *
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+ * Copyright (C) 2010 Felix Fietkau <[email protected]>
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+ * Copyright (C) 2008-2009 Gabor Juhos <[email protected]>
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+ * Copyright (C) 2008 Imre Kaloz <[email protected]>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/mtd/mtd.h>
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+#include <linux/mtd/partitions.h>
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+#include <asm/mach-ar71xx/ar71xx.h>
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+
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+#include "machtype.h"
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+#include "devices.h"
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+#include "dev-m25p80.h"
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+#include "dev-gpio-buttons.h"
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+#include "dev-pb9x-pci.h"
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+#include "dev-usb.h"
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+
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+#ifdef CONFIG_MTD_PARTITIONS
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+static struct mtd_partition pb92_partitions[] = {
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+ {
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+ .name = "u-boot",
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+ .offset = 0,
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+ .size = 0x040000,
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+ .mask_flags = MTD_WRITEABLE,
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+ } , {
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+ .name = "u-boot-env",
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+ .offset = 0x040000,
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+ .size = 0x010000,
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+ } , {
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+ .name = "rootfs",
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+ .offset = 0x050000,
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+ .size = 0x2b0000,
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+ } , {
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+ .name = "uImage",
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+ .offset = 0x300000,
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+ .size = 0x0e0000,
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+ } , {
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+ .name = "ART",
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+ .offset = 0x3e0000,
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+ .size = 0x020000,
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+ .mask_flags = MTD_WRITEABLE,
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+ }
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+};
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+#endif /* CONFIG_MTD_PARTITIONS */
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+
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+static struct flash_platform_data pb92_flash_data = {
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+#ifdef CONFIG_MTD_PARTITIONS
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+ .parts = pb92_partitions,
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+ .nr_parts = ARRAY_SIZE(pb92_partitions),
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+#endif
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+};
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+
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+
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+#define PB92_BUTTONS_POLL_INTERVAL 20
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+
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+#define PB92_GPIO_BTN_SW4 8
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+#define PB92_GPIO_BTN_SW5 3
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+
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+static struct gpio_button pb92_gpio_buttons[] __initdata = {
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+ {
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+ .desc = "sw4",
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+ .type = EV_KEY,
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+ .code = BTN_0,
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+ .threshold = 3,
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+ .gpio = PB92_GPIO_BTN_SW4,
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+ .active_low = 1,
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+ } , {
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+ .desc = "sw5",
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+ .type = EV_KEY,
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+ .code = BTN_1,
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+ .threshold = 3,
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+ .gpio = PB92_GPIO_BTN_SW5,
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+ .active_low = 1,
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+ }
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+};
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+
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+#define PB92_WAN_PHYMASK BIT(20)
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+#define PB92_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
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+#define PB92_MDIO_PHYMASK (PB92_LAN_PHYMASK | PB92_WAN_PHYMASK)
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+
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+static void __init pb92_init(void)
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+{
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+ ar71xx_add_device_m25p80(&pb92_flash_data);
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+
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+ ar71xx_add_device_mdio(~PB92_MDIO_PHYMASK);
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+
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+ ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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+ ar71xx_eth0_data.phy_mask = PB92_WAN_PHYMASK;
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+
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+ ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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+ ar71xx_eth1_data.phy_mask = PB92_LAN_PHYMASK;
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+ ar71xx_eth1_data.speed = SPEED_1000;
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+ ar71xx_eth1_data.duplex = DUPLEX_FULL;
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+
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+ ar71xx_add_device_eth(0);
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+ ar71xx_add_device_eth(1);
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+
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+ ar71xx_add_device_gpio_buttons(-1, PB92_BUTTONS_POLL_INTERVAL,
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+ ARRAY_SIZE(pb92_gpio_buttons),
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+ pb92_gpio_buttons);
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+
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+ pb9x_pci_init();
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+}
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+
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+MIPS_MACHINE(AR71XX_MACH_PB92, "PB92", "Atheros PB92", pb92_init);
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