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@@ -110,8 +110,8 @@
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if (xtal_rate == MHZ(40))
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cpu_rate = MHZ(580);
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else
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-@@ -418,7 +416,7 @@ void __init ralink_clk_init(void)
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- ralink_clk_add("10000c00.uartlite", periph_rate);
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+@@ -420,7 +418,7 @@ void __init ralink_clk_init(void)
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+ ralink_clk_add("10000e00.uart2", periph_rate);
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ralink_clk_add("10180000.wmac", xtal_rate);
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- if (IS_ENABLED(CONFIG_USB) && mt762x_soc != MT762X_SOC_MT7628AN) {
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@@ -119,7 +119,7 @@
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/*
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* When the CPU goes into sleep mode, the BUS clock will be too low for
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* USB to function properly
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-@@ -506,11 +504,11 @@ void prom_soc_init(struct ralink_soc_inf
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+@@ -508,11 +506,11 @@ void prom_soc_init(struct ralink_soc_inf
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if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) {
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if (bga) {
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@@ -133,7 +133,7 @@
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name = "MT7620N";
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soc_info->compatible = "ralink,mt7620n-soc";
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#ifdef CONFIG_PCI
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-@@ -518,7 +516,7 @@ void prom_soc_init(struct ralink_soc_inf
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+@@ -520,7 +518,7 @@ void prom_soc_init(struct ralink_soc_inf
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#endif
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}
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} else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) {
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@@ -142,7 +142,7 @@
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name = "MT7628AN";
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soc_info->compatible = "ralink,mt7628an-soc";
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} else {
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-@@ -535,7 +533,7 @@ void prom_soc_init(struct ralink_soc_inf
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+@@ -537,7 +535,7 @@ void prom_soc_init(struct ralink_soc_inf
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dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
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soc_info->mem_base = MT7620_DRAM_BASE;
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@@ -151,7 +151,7 @@
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mt7628_dram_init(soc_info);
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else
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mt7620_dram_init(soc_info);
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-@@ -548,7 +546,7 @@ void prom_soc_init(struct ralink_soc_inf
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+@@ -550,7 +548,7 @@ void prom_soc_init(struct ralink_soc_inf
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pr_info("Digital PMU set to %s control\n",
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(pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
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