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@@ -0,0 +1,45 @@
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+From 00224650dd45e166ea6eb1593f5f064583963ccf Mon Sep 17 00:00:00 2001
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+From: FUKAUMI Naoki <[email protected]>
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+Date: Sun, 23 Jun 2024 11:33:28 +0900
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+Subject: [PATCH] arm64: dts: rockchip: add (but disabled) SFC node for Radxa
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+ ROCK 5A
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+
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+This commit adds SFC node for Radxa ROCK 5A.
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+
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+since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot
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+be enabled both nodes at the same time. so status = "okay" is omitted
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+here.
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+
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+you may be able to enable sfc (and disable sdhci) by fdt overlay.
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+
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+SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency.
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+
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+Signed-off-by: FUKAUMI Naoki <[email protected]>
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+Link: https://lore.kernel.org/r/[email protected]
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+Signed-off-by: Heiko Stuebner <[email protected]>
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+---
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+ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 13 +++++++++++++
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+ 1 file changed, 13 insertions(+)
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+
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+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
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++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
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+@@ -376,6 +376,19 @@
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+ status = "okay";
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+ };
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+
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++&sfc {
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++ pinctrl-names = "default";
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++ pinctrl-0 = <&fspim0_pins>;
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++
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++ flash@0 {
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++ compatible = "jedec,spi-nor";
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++ reg = <0>;
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++ spi-max-frequency = <104000000>;
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++ spi-rx-bus-width = <4>;
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++ spi-tx-bus-width = <1>;
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++ };
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++};
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++
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+ &spi2 {
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+ status = "okay";
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+ assigned-clocks = <&cru CLK_SPI2>;
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