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@@ -0,0 +1,40 @@
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+From ed23e07bf7a1896b6eaa85b773bb43b1fad66d4b Mon Sep 17 00:00:00 2001
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+From: Linus Walleij <[email protected]>
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+Date: Sat, 21 Dec 2024 00:07:11 +0100
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+Subject: [PATCH] ARM: dts: ixp4xx: Fix up PCI on WG302
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+
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+Looking at the board file for WG302 v2 was not a good idea
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+because the GPIO IRQ for slot 2 differs, and v1 uses GPIO
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+10 instead of GPIO 9. Fix it up.
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+
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+Signed-off-by: Linus Walleij <[email protected]>
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+---
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+ .../dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts | 10 +++++-----
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+ 1 file changed, 5 insertions(+), 5 deletions(-)
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+
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+--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts
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++++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts
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+@@ -57,7 +57,7 @@
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+ status = "okay";
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+
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+ /*
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+- * Taken from WG302 v2 PCI boardfile (wg302v2-pci.c)
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++ * Taken from WG302 v1 PCI boardfile (wg302v1-pci.c)
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+ * We have slots (IDSEL) 1 and 2 with one assigned IRQ
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+ * each handling all IRQs.
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+ */
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+@@ -70,10 +70,10 @@
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+ <0x0800 0 0 3 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 8 */
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+ <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
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+ /* IDSEL 2 */
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+- <0x1000 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 9 */
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+- <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
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+- <0x1000 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 9 */
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+- <0x1000 0 0 4 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 9 */
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++ <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
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++ <0x1000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 10 */
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++ <0x1000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 10 */
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++ <0x1000 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 10 */
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+ };
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+
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+ ethernet@c8009000 {
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