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@@ -0,0 +1,115 @@
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+--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
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++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
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+@@ -19,4 +19,112 @@
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+ / {
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+ model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
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+
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++ memory {
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++ device_type = "memory";
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++ reg = <0x80000000 0x10000000>;
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++ };
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++
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++ reserved-memory {
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++ #address-cells = <0x1>;
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++ #size-cells = <0x1>;
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++ ranges;
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++
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++ apps_bl@87000000 {
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++ reg = <0x87000000 0x400000>;
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++ no-map;
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++ };
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++
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++ sbl@87400000 {
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++ reg = <0x87400000 0x100000>;
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++ no-map;
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++ };
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++
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++ cnss_debug@87500000 {
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++ reg = <0x87500000 0x600000>;
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++ no-map;
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++ };
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++
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++ cpu_context_dump@87b00000 {
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++ reg = <0x87b00000 0x080000>;
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++ no-map;
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++ };
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++
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++ tz_apps@87b80000 {
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++ reg = <0x87b80000 0x280000>;
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++ no-map;
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++ };
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++
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++ smem@87e00000 {
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++ reg = <0x87e00000 0x080000>;
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++ no-map;
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++ };
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++
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++ tz@87e80000 {
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++ reg = <0x87e80000 0x180000>;
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++ no-map;
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++ };
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++ };
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++};
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++
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++&spi_0 {
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++ mx25l25635f@0 {
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++ compatible = "mx25l25635f", "jedec,spi-nor";
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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++ reg = <0>;
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++ spi-max-frequency = <24000000>;
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++
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++ SBL1@0 {
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++ label = "SBL1";
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++ reg = <0x0 0x40000>;
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++ read-only;
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++ };
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++ MIBIB@40000 {
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++ label = "MIBIB";
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++ reg = <0x40000 0x20000>;
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++ read-only;
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++ };
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++ QSEE@60000 {
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++ label = "QSEE";
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++ reg = <0x60000 0x60000>;
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++ read-only;
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++ };
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++ CDT@c0000 {
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++ label = "CDT";
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++ reg = <0xc0000 0x10000>;
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++ read-only;
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++ };
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++ DDRPARAMS@d0000 {
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++ label = "DDRPARAMS";
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++ reg = <0xd0000 0x10000>;
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++ read-only;
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++ };
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++ APPSBLENV@e0000 {
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++ label = "APPSBLENV";
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++ reg = <0xe0000 0x10000>;
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++ read-only;
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++ };
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++ APPSBL@f0000 {
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++ label = "APPSBL";
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++ reg = <0xf0000 0x80000>;
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++ read-only;
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++ };
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++ ART@170000 {
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++ label = "ART";
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++ reg = <0x170000 0x10000>;
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++ read-only;
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++ };
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++ kernel@180000 {
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++ label = "kernel";
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++ reg = <0x180000 0x400000>;
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++ };
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++ rootfs@580000 {
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++ label = "rootfs";
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++ reg = <0x580000 0x1600000>;
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++ };
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++ firmware@180000 {
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++ label = "firmware";
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++ reg = <0x180000 0x1a00000>;
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++ };
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++ };
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+ };
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