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@@ -0,0 +1,104 @@
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+From: Felix Fietkau <[email protected]>
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+Subject: [PATCH net-next 3/4] net: ethernet: mtk_eth_soc: reduce rx ring size for older chipsets
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+Date: Tue, 15 Oct 2024 13:09:37 +0200
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+
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+Commit c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer
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+size soc specific") resolved some tx timeout issues by bumping FQ and
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+tx ring sizes from 512 to 2048 entries (the value used in the MediaTek
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+SDK), however it also changed the rx ring size for all chipsets in the
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+same way.
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+
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+Based on a few tests, it seems that a symmetric rx/tx ring size of 2048
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+really only makes sense on MT7988, which is capable of 10G ethernet links.
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+
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+Older chipsets are typically deployed in systems that are more memory
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+constrained and don't actually need the larger rings to handle received
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+packets.
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+
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+In order to reduce wasted memory set the ring size based on the SoC to
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+the following values:
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+- 2048 on MT7988
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+- 1024 on MT7986
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+- 512 (previous value) on everything else, except:
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+- 256 on RT5350 (the oldest supported chipset)
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+
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+Fixes: c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer size soc specific")
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+Signed-off-by: Felix Fietkau <[email protected]>
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+---
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+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 16 ++++++++--------
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+ 1 file changed, 8 insertions(+), 8 deletions(-)
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+
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+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+@@ -5381,7 +5381,7 @@ static const struct mtk_soc_data mt2701_
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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+ .dma_l4_valid = RX_DMA_L4_VALID,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(512),
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+ },
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+@@ -5409,7 +5409,7 @@ static const struct mtk_soc_data mt7621_
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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+ .dma_l4_valid = RX_DMA_L4_VALID,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(512),
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+ },
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+@@ -5439,7 +5439,7 @@ static const struct mtk_soc_data mt7622_
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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+ .dma_l4_valid = RX_DMA_L4_VALID,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(512),
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+ },
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+@@ -5468,7 +5468,7 @@ static const struct mtk_soc_data mt7623_
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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+ .dma_l4_valid = RX_DMA_L4_VALID,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(512),
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+ },
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+@@ -5494,7 +5494,7 @@ static const struct mtk_soc_data mt7629_
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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+ .dma_l4_valid = RX_DMA_L4_VALID,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(512),
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+ },
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+@@ -5526,7 +5526,7 @@ static const struct mtk_soc_data mt7981_
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+ .dma_l4_valid = RX_DMA_L4_VALID_V2,
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(512),
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+ },
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+ };
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+
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+@@ -5556,7 +5556,7 @@ static const struct mtk_soc_data mt7986_
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+ .dma_l4_valid = RX_DMA_L4_VALID_V2,
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(1K),
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+ },
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+ };
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+
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+@@ -5609,7 +5609,7 @@ static const struct mtk_soc_data rt5350_
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+ .dma_l4_valid = RX_DMA_L4_VALID_PDMA,
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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+- .dma_size = MTK_DMA_SIZE(2K),
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++ .dma_size = MTK_DMA_SIZE(256),
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+ },
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+ };
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+
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