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+From: Felix Fietkau <[email protected]>
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+Date: Wed, 8 Jul 2015 13:56:37 +0200
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+Subject: [PATCH] Add PowerPC soft-float support
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+
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+Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
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+instruction set for floating point operations (SPE).
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+Executing regular PowerPC floating point instructions results in
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+"Illegal instruction" errors.
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+
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+Until support for SPE FPU is added, make it possible to run these
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+devices in soft-float mode.
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+
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+Signed-off-by: Felix Fietkau <[email protected]>
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+---
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+ create mode 100644 src/fenv/powerpc-sf/fenv.sub
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+ create mode 100644 src/setjmp/powerpc-sf/longjmp.s
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+ create mode 100644 src/setjmp/powerpc-sf/longjmp.sub
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+ create mode 100644 src/setjmp/powerpc-sf/setjmp.s
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+ create mode 100644 src/setjmp/powerpc-sf/setjmp.sub
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+
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+--- a/configure
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++++ b/configure
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+@@ -498,6 +498,10 @@ trycppif "_MIPSEL || __MIPSEL || __MIPSE
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+ trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
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+ fi
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+
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++if test "$ARCH" = "powerpc" ; then
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++trycppif _SOFT_FLOAT "$t" && SUBARCH=${SUBARCH}-sf
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++fi
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++
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+ test "$ARCH" = "microblaze" && trycppif __MICROBLAZEEL__ "$t" \
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+ && SUBARCH=${SUBARCH}el
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+
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+--- /dev/null
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++++ b/src/fenv/powerpc-sf/fenv.sub
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+@@ -0,0 +1 @@
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++../fenv.c
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+--- /dev/null
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++++ b/src/setjmp/powerpc-sf/longjmp.s
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+@@ -0,0 +1,47 @@
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++ .global _longjmp
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++ .global longjmp
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++ .type _longjmp,@function
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++ .type longjmp,@function
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++_longjmp:
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++longjmp:
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++# void longjmp(jmp_buf env, int val);
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++# put val into return register and restore the env saved in setjmp
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++# if val(r4) is 0, put 1 there.
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++ # 0) move old return address into r0
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++ lwz 0, 0(3)
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++ # 1) put it into link reg
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++ mtlr 0
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++ #2 ) restore stack ptr
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++ lwz 1, 4(3)
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++ #3) restore control reg
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++ lwz 0, 8(3)
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++ mtcr 0
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++ #4) restore r14-r31
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++ lwz 14, 12(3)
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++ lwz 15, 16(3)
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++ lwz 16, 20(3)
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++ lwz 17, 24(3)
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++ lwz 18, 28(3)
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++ lwz 19, 32(3)
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++ lwz 20, 36(3)
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++ lwz 21, 40(3)
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++ lwz 22, 44(3)
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++ lwz 23, 48(3)
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++ lwz 24, 52(3)
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++ lwz 25, 56(3)
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++ lwz 26, 60(3)
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++ lwz 27, 64(3)
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++ lwz 28, 68(3)
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++ lwz 29, 72(3)
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++ lwz 30, 76(3)
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++ lwz 31, 80(3)
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++ #5) put val into return reg r3
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++ mr 3, 4
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++
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++ #6) check if return value is 0, make it 1 in that case
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++ cmpwi cr7, 4, 0
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++ bne cr7, 1f
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++ li 3, 1
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++1:
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++ blr
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++
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+--- /dev/null
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++++ b/src/setjmp/powerpc-sf/longjmp.sub
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+@@ -0,0 +1 @@
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++longjmp.s
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+--- /dev/null
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++++ b/src/setjmp/powerpc-sf/setjmp.s
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+@@ -0,0 +1,43 @@
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++ .global ___setjmp
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++ .hidden ___setjmp
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++ .global __setjmp
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++ .global _setjmp
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++ .global setjmp
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++ .type __setjmp,@function
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++ .type _setjmp,@function
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++ .type setjmp,@function
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++___setjmp:
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++__setjmp:
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++_setjmp:
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++setjmp:
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++ # 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg)
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++ mflr 0
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++ stw 0, 0(3)
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++ # 1) store reg1 (SP)
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++ stw 1, 4(3)
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++ # 2) store cr
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++ mfcr 0
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++ stw 0, 8(3)
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++ # 3) store r14-31
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++ stw 14, 12(3)
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++ stw 15, 16(3)
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++ stw 16, 20(3)
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++ stw 17, 24(3)
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++ stw 18, 28(3)
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++ stw 19, 32(3)
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++ stw 20, 36(3)
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++ stw 21, 40(3)
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++ stw 22, 44(3)
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++ stw 23, 48(3)
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++ stw 24, 52(3)
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++ stw 25, 56(3)
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++ stw 26, 60(3)
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++ stw 27, 64(3)
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++ stw 28, 68(3)
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++ stw 29, 72(3)
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++ stw 30, 76(3)
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++ stw 31, 80(3)
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++ # 4) set return value to 0
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++ li 3, 0
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++ # 5) return
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++ blr
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+--- /dev/null
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++++ b/src/setjmp/powerpc-sf/setjmp.sub
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+@@ -0,0 +1 @@
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++setjmp.s
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Felix Fietkau