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@@ -355,6 +355,7 @@ ar8xxx_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val,
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return 0;
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return 0;
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usleep_range(1000, 2000);
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usleep_range(1000, 2000);
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+ cond_resched();
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}
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}
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return -ETIMEDOUT;
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return -ETIMEDOUT;
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@@ -426,6 +427,7 @@ ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush)
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mib_stats[i] = 0;
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mib_stats[i] = 0;
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else
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else
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mib_stats[i] += t;
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mib_stats[i] += t;
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+ cond_resched();
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}
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}
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}
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}
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@@ -565,6 +567,7 @@ ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
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break;
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break;
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udelay(10);
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udelay(10);
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+ cond_resched();
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}
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}
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pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
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pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
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@@ -730,8 +733,10 @@ ar8216_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1)
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{
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{
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int timeout = 20;
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int timeout = 20;
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- while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout)
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- udelay(10);
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+ while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) {
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+ udelay(10);
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+ cond_resched();
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+ }
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if (!timeout)
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if (!timeout)
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pr_err("ar8216: timeout waiting for atu to become ready\n");
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pr_err("ar8216: timeout waiting for atu to become ready\n");
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