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@@ -115,468 +115,6 @@
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&i2c0 {
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pinctrl-names = "default";
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---- a/arch/arm/boot/dts/Makefile
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-+++ b/arch/arm/boot/dts/Makefile
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-@@ -1061,6 +1061,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
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- mt6580-evbp1.dtb \
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- mt6589-aquaris5.dtb \
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- mt6592-evb.dtb \
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-+ mt7623a-rfb-emmc.dtb \
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- mt7623n-rfb-nand.dtb \
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- mt7623n-bananapi-bpi-r2.dtb \
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- mt8127-moose.dtb \
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---- /dev/null
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-+++ b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts
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-@@ -0,0 +1,449 @@
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-+/*
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-+ * Copyright 2017 Sean Wang <[email protected]>
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-+ *
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-+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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-+ */
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-+
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-+/dts-v1/;
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-+#include <dt-bindings/input/input.h>
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-+#include "mt7623.dtsi"
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-+#include "mt6323.dtsi"
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-+
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-+/ {
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-+ model = "MediaTek MT7623N NAND reference board";
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-+ compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
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-+
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-+ aliases {
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-+ serial2 = &uart2;
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-+ };
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-+
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-+ chosen {
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-+ bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool) rootfstype=squashfs,jffs2";
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-+
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-+ stdout-path = "serial2:115200n8";
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-+ };
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-+
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-+ memory {
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-+ reg = <0 0x80000000 0 0x20000000>;
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-+ };
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-+
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-+ cpus {
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-+ cpu@0 {
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-+ proc-supply = <&mt6323_vproc_reg>;
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-+ };
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-+
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-+ cpu@1 {
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-+ proc-supply = <&mt6323_vproc_reg>;
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-+ };
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-+
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-+ cpu@2 {
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-+ proc-supply = <&mt6323_vproc_reg>;
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-+ };
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-+
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-+ cpu@3 {
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-+ proc-supply = <&mt6323_vproc_reg>;
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-+ };
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-+ };
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-+
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-+ memory@80000000 {
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-+ reg = <0 0x80000000 0 0x40000000>;
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-+ };
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-+
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-+ mt7530: switch@0 {
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-+ compatible = "mediatek,mt7530";
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-+ #address-cells = <1>;
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-+ #size-cells = <0>;
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-+ };
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-+};
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-+
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-+&crypto {
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-+ status = "okay";
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-+};
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-+
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-+ð {
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-+ status = "okay";
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-+
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-+ gmac0: mac@0 {
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-+ compatible = "mediatek,eth-mac";
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-+ reg = <0>;
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-+ phy-mode = "trgmii";
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-+
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-+ fixed-link {
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-+ speed = <1000>;
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-+ full-duplex;
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-+ pause;
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-+ };
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-+ };
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-+
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-+ gmac1: mac@1 {
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-+ compatible = "mediatek,eth-mac";
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-+ reg = <1>;
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-+ phy-mode = "rgmiii-rxid";
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-+ phy-handle = <&phy5>;
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-+ };
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-+
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-+ mdio: mdio-bus {
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-+ #address-cells = <1>;
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-+ #size-cells = <0>;
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-+ phy5: ethernet-phy@5 {
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-+ reg = <5>;
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-+ phy-mode = "rgmii-rxid";
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-+ };
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-+ };
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-+};
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-+
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-+&mt7530 {
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-+ compatible = "mediatek,mt7530";
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-+ #address-cells = <1>;
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-+ #size-cells = <0>;
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-+ reg = <0>;
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-+ pinctrl-names = "default";
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-+ mediatek,mcm;
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-+ resets = <ðsys 2>;
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-+ reset-names = "mcm";
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-+ core-supply = <&mt6323_vpa_reg>;
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-+ io-supply = <&mt6323_vemc3v3_reg>;
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-+
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-+ dsa,mii-bus = <&mdio>;
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-+
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-+ ports {
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-+ #address-cells = <1>;
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-+ #size-cells = <0>;
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-+ reg = <0>;
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-+
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-+ port@0 {
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-+ reg = <0>;
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-+ label = "lan0";
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-+ cpu = <&cpu_port0>;
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-+ };
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-+
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-+ port@1 {
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-+ reg = <1>;
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-+ label = "lan1";
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-+ cpu = <&cpu_port0>;
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-+ };
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-+
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-+ port@2 {
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-+ reg = <2>;
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-+ label = "lan2";
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-+ cpu = <&cpu_port0>;
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-+ };
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-+
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-+ port@3 {
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-+ reg = <3>;
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-+ label = "lan3";
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-+ cpu = <&cpu_port0>;
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-+ };
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-+
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-+ cpu_port0: port@6 {
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-+ reg = <6>;
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-+ label = "cpu";
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-+ ethernet = <&gmac0>;
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-+ phy-mode = "trgmii";
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-+
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-+ fixed-link {
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-+ speed = <1000>;
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-+ full-duplex;
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-+ };
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-+ };
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-+ };
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-+};
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-+
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-+&i2c0 {
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-+ pinctrl-names = "default";
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-+ pinctrl-0 = <&i2c0_pins_a>;
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-+ status = "okay";
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-+};
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-+
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-+&i2c1 {
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-+ pinctrl-names = "default";
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-+ pinctrl-0 = <&i2c1_pins_a>;
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-+ status = "okay";
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-+};
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-+
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-+&mmc0 {
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-+ pinctrl-names = "default", "state_uhs";
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-+ pinctrl-0 = <&mmc0_pins_default>;
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-+ pinctrl-1 = <&mmc0_pins_uhs>;
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-+ status = "okay";
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-+ bus-width = <8>;
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-+ max-frequency = <50000000>;
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-+ cap-mmc-highspeed;
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-+ vmmc-supply = <&mt6323_vemc3v3_reg>;
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-+ vqmmc-supply = <&mt6323_vio18_reg>;
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-+ non-removable;
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-+};
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-+
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-+&mmc1 {
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-+ pinctrl-names = "default", "state_uhs";
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-+ pinctrl-0 = <&mmc1_pins_default>;
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-+ pinctrl-1 = <&mmc1_pins_uhs>;
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-+ status = "okay";
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-+ bus-width = <4>;
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-+ max-frequency = <50000000>;
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-+ cap-sd-highspeed;
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-+ cd-gpios = <&pio 261 0>;
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-+ vmmc-supply = <&mt6323_vmch_reg>;
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-+ vqmmc-supply = <&mt6323_vio18_reg>;
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-+};
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-+
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-+&pio {
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-+ cir_pins_a:cir@0 {
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-+ pins_cir {
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-+ pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
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-+ bias-disable;
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-+ };
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-+ };
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-+
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-+ i2c0_pins_a: i2c@0 {
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-+ pins_i2c0 {
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-+ pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
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-+ <MT7623_PIN_76_SCL0_FUNC_SCL0>;
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-+ bias-disable;
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-+ };
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-+ };
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-+
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-+ i2c1_pins_a: i2c@1 {
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-+ pin_i2c1 {
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-+ pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
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-+ <MT7623_PIN_58_SCL1_FUNC_SCL1>;
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-+ bias-disable;
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-+ };
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-+ };
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-+
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-+ i2s0_pins_a: i2s@0 {
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-+ pin_i2s0 {
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-+ pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
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-+ <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
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-+ <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
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-+ <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
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-+ <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
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-+ drive-strength = <MTK_DRIVE_12mA>;
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-+ bias-pull-down;
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-+ };
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-+ };
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-+
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-+ i2s1_pins_a: i2s@1 {
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-+ pin_i2s1 {
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-+ pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
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-+ <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
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-+ <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
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-+ <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
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-+ <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
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-+ drive-strength = <MTK_DRIVE_12mA>;
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-+ bias-pull-down;
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-+ };
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-+ };
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-+
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-+ mmc0_pins_default: mmc0default {
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-+ pins_cmd_dat {
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-+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
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-+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
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-+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
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-+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
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-+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
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-+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
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-+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
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-+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
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-+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
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-+ input-enable;
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-+ bias-pull-up;
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-+ };
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-+
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-+ pins_clk {
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-+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
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-+ bias-pull-down;
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-+ };
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-+
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-+ pins_rst {
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-+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
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-+ bias-pull-up;
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-+ };
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-+ };
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-+
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-+ mmc0_pins_uhs: mmc0 {
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-+ pins_cmd_dat {
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-+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
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-+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
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-+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
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-+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
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-+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
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-+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
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-+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
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-+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
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-+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
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-+ input-enable;
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-+ drive-strength = <MTK_DRIVE_2mA>;
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-+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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-+ };
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-+
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-+ pins_clk {
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-+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
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-+ drive-strength = <MTK_DRIVE_2mA>;
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-+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
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-+ };
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-+
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-+ pins_rst {
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-+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
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-+ bias-pull-up;
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-+ };
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-+ };
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-+
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-+ mmc1_pins_default: mmc1default {
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-+ pins_cmd_dat {
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-+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
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-+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
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-+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
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-+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
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-+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
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-+ input-enable;
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-+ drive-strength = <MTK_DRIVE_4mA>;
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-+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
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-+ };
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-+
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-+ pins_clk {
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-+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
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-+ bias-pull-down;
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-+ drive-strength = <MTK_DRIVE_4mA>;
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-+ };
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-+
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-+ pins_wp {
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-+ pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
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-+ input-enable;
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-+ bias-pull-up;
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-+ };
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-+
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-+ pins_insert {
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-+ pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
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-+ bias-pull-up;
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-+ };
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-+ };
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-+
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-+ mmc1_pins_uhs: mmc1 {
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-+ pins_cmd_dat {
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-+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
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-+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
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-+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
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-+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
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-+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
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-+ input-enable;
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-+ drive-strength = <MTK_DRIVE_4mA>;
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-+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
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-+ };
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-+
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-+ pins_clk {
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-+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
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-+ drive-strength = <MTK_DRIVE_4mA>;
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-+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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-+ };
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-+ };
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-+
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-+ pwm_pins_a: pwm@0 {
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-+ pins_pwm {
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-+ pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
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-+ <MT7623_PIN_204_PWM1_FUNC_PWM1>,
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-+ <MT7623_PIN_205_PWM2_FUNC_PWM2>,
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-+ <MT7623_PIN_206_PWM3_FUNC_PWM3>,
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-+ <MT7623_PIN_207_PWM4_FUNC_PWM4>;
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-+ };
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-+ };
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-+
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-+ spi0_pins_a: spi@0 {
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-+ pins_spi {
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-+ pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
|
|
|
-+ <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
|
|
|
-+ <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
|
|
|
-+ <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
|
|
|
-+ bias-disable;
|
|
|
-+ };
|
|
|
-+ };
|
|
|
-+
|
|
|
-+ uart0_pins_a: uart@0 {
|
|
|
-+ pins_dat {
|
|
|
-+ pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
|
|
|
-+ <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
|
|
|
-+ };
|
|
|
-+ };
|
|
|
-+
|
|
|
-+ uart1_pins_a: uart@1 {
|
|
|
-+ pins_dat {
|
|
|
-+ pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
|
|
|
-+ <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
|
|
|
-+ };
|
|
|
-+ };
|
|
|
-+};
|
|
|
-+
|
|
|
-+&pwm {
|
|
|
-+ pinctrl-names = "default";
|
|
|
-+ pinctrl-0 = <&pwm_pins_a>;
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&pwrap {
|
|
|
-+ mt6323 {
|
|
|
-+ mt6323led: led {
|
|
|
-+ compatible = "mediatek,mt6323-led";
|
|
|
-+ #address-cells = <1>;
|
|
|
-+ #size-cells = <0>;
|
|
|
-+
|
|
|
-+ led@0 {
|
|
|
-+ reg = <0>;
|
|
|
-+ label = "bpi-r2:isink:green";
|
|
|
-+ default-state = "off";
|
|
|
-+ };
|
|
|
-+
|
|
|
-+ led@1 {
|
|
|
-+ reg = <1>;
|
|
|
-+ label = "bpi-r2:isink:red";
|
|
|
-+ default-state = "off";
|
|
|
-+ };
|
|
|
-+
|
|
|
-+ led@2 {
|
|
|
-+ reg = <2>;
|
|
|
-+ label = "bpi-r2:isink:blue";
|
|
|
-+ default-state = "off";
|
|
|
-+ };
|
|
|
-+ };
|
|
|
-+ };
|
|
|
-+};
|
|
|
-+
|
|
|
-+&spi0 {
|
|
|
-+ pinctrl-names = "default";
|
|
|
-+ pinctrl-0 = <&spi0_pins_a>;
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&uart0 {
|
|
|
-+ pinctrl-names = "default";
|
|
|
-+ pinctrl-0 = <&uart0_pins_a>;
|
|
|
-+ status = "disabled";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&uart1 {
|
|
|
-+ pinctrl-names = "default";
|
|
|
-+ pinctrl-0 = <&uart1_pins_a>;
|
|
|
-+ status = "disabled";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&uart2 {
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&usb1 {
|
|
|
-+ vusb33-supply = <&mt6323_vusb_reg>;
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&usb2 {
|
|
|
-+ vusb33-supply = <&mt6323_vusb_reg>;
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&u3phy1 {
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
-+&u3phy2 {
|
|
|
-+ status = "okay";
|
|
|
-+};
|
|
|
-+
|
|
|
--- a/arch/arm/boot/dts/mt7623.dtsi
|
|
|
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
|
|
@@ -326,6 +326,7 @@
|