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@@ -0,0 +1,240 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+/*
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+ * ATH9K Fixup Driver
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+ *
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+ * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
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+ * Copyright (C) 2014 Jonas Gorski <[email protected]>
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+ * Copyright (C) 2008 Maxime Bizon <[email protected]>
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+ * Copyright (C) 2008 Florian Fainelli <[email protected]>
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/etherdevice.h>
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/mtd/mtd.h>
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+#include <linux/of_net.h>
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+#include <linux/of_platform.h>
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+#include <linux/pci.h>
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+#include <linux/types.h>
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+#include <linux/ath9k_platform.h>
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+
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+#define ATH9K_MAX_FIXUPS 2
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+
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+#define ATH9K_DEF_LED_PIN -1
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+#define ATH9K_DEF_PCI_DEV 255
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+
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+struct ath9k_fixup {
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+ struct device *dev;
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+ struct resource *mem_res;
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+ u32 pci_dev;
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+ u8 mac[ETH_ALEN];
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+ struct ath9k_platform_data pdata;
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+};
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+
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+static int ath9k_num_fixups;
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+static struct ath9k_fixup *ath9k_fixups[ATH9K_MAX_FIXUPS];
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+
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+static void ath9k_pci_fixup(struct pci_dev *dev)
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+{
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+ void __iomem *mem;
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+ struct ath9k_fixup *priv = NULL;
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+ struct ath9k_platform_data *pdata = NULL;
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+ struct pci_dev *bridge = pci_upstream_bridge(dev);
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+ u16 *cal_data = NULL;
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+ u16 cmd;
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+ u32 bar0;
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+ u32 val;
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+ unsigned i;
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+
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+ for (i = 0; i < ath9k_num_fixups; i++) {
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+ if (ath9k_fixups[i]->pci_dev != PCI_SLOT(dev->devfn))
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+ continue;
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+
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+ priv = ath9k_fixups[i];
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+ cal_data = priv->pdata.eeprom_data;
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+ pdata = &priv->pdata;
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+ break;
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+ }
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+
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+ if (cal_data == NULL)
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+ return;
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+
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+ if (*cal_data != 0xa55a) {
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+ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
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+ return;
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+ }
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+
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+ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
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+
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+ val = priv->mem_res->start;
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+ mem = ioremap(priv->mem_res->start, resource_size(priv->mem_res));
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+ if (!mem) {
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+ pr_err("pci %s: ioremap error\n", pci_name(dev));
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+ return;
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+ }
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+
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+ if (bridge)
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+ pci_enable_device(bridge);
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+
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
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+
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+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
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+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
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+ pci_write_config_word(dev, PCI_COMMAND, cmd);
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+
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+ /* set offset to first reg address */
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+ cal_data += 3;
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+ while(*cal_data != 0xffff) {
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+ u32 reg;
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+
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+ reg = *cal_data++;
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+ val = *cal_data++;
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+ val |= (*cal_data++) << 16;
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+
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+ writel(val, mem + reg);
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+ udelay(100);
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+ }
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+
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+ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
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+ dev->vendor = val & 0xffff;
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+ dev->device = (val >> 16) & 0xffff;
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+
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+ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
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+ dev->revision = val & 0xff;
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+ dev->class = val >> 8; /* upper 3 bytes */
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+
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+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
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+ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
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+ pci_write_config_word(dev, PCI_COMMAND, cmd);
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+
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
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+
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+ if (bridge)
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+ pci_disable_device(bridge);
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+
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+ iounmap(mem);
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+
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+ dev->dev.platform_data = pdata;
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+}
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
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+
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+static int ath9k_mtd_eeprom(struct ath9k_fixup *priv)
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+{
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+ struct device *dev = priv->dev;
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+ struct device_node *node = dev->of_node;
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+ struct device_node *mtd_np = NULL;
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+ struct mtd_info *the_mtd;
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+ phandle phandle;
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+ size_t eeprom_readlen;
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+ const char *part;
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+ const __be32 *list;
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+ int ret, i;
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+
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+ list = of_get_property(node, "ath,eeprom", &i);
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+ if (!list || (i != (2 * sizeof(*list))))
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+ return -ENODEV;
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+
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+ phandle = be32_to_cpup(list++);
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+ if (phandle)
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+ mtd_np = of_find_node_by_phandle(phandle);
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+ if (!mtd_np)
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+ return -ENODEV;
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+
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+ part = of_get_property(mtd_np, "label", NULL);
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+ if (!part)
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+ part = mtd_np->name;
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+
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+ the_mtd = get_mtd_device_nm(part);
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+ if (IS_ERR(the_mtd))
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+ return -ENODEV;
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+
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+ ret = mtd_read(the_mtd, be32_to_cpup(list),
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+ ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16),
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+ &eeprom_readlen, (void *) priv->pdata.eeprom_data);
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+ put_mtd_device(the_mtd);
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+ if (ret)
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+ return ret;
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+
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+ return 0;
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+}
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+
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+static int ath9k_fixup_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct device_node *node = dev->of_node;
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+ struct ath9k_fixup *priv;
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+ struct resource *res;
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+ const void *mac;
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+ int ret;
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+
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+ if (ath9k_num_fixups >= ATH9K_MAX_FIXUPS)
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+ return -ENOMEM;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res)
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+ return -EINVAL;
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+
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+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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+ if (!priv)
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+ return -ENOMEM;
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+
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+ priv->dev = dev;
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+ priv->mem_res = res;
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+
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+ ret = of_property_read_u32(node, "pci-dev", &priv->pci_dev);
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+ if (ret)
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+ priv->pci_dev = ATH9K_DEF_PCI_DEV;
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+
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+ ret = ath9k_mtd_eeprom(priv);
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+ if (ret)
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+ return ret;
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+
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+ priv->pdata.endian_check = of_property_read_bool(node,
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+ "ath,endian-check");
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+ ret = of_property_read_s32(node, "ath,led-pin", &priv->pdata.led_pin);
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+ if (ret)
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+ priv->pdata.led_pin = ATH9K_DEF_LED_PIN;
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+ priv->pdata.led_active_high = of_property_read_bool(node,
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+ "ath,led-active-high");
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+
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+ mac = of_get_mac_address(node);
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+ if (!IS_ERR_OR_NULL(mac)) {
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+ memcpy(priv->mac, mac, ETH_ALEN);
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+ dev_info(dev, "mtd mac %pM\n", priv->mac);
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+ } else {
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+ random_ether_addr(priv->mac);
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+ dev_info(dev, "random mac %pM\n", priv->mac);
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+ }
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+
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+ priv->pdata.macaddr = priv->mac;
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+
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+ ath9k_fixups[ath9k_num_fixups] = priv;
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+ ath9k_num_fixups++;
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id ath9k_fixup_of_match[] = {
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+ { .compatible = "brcm,ath9k-fixup" },
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+ { /* sentinel */ }
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+};
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+
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+static struct platform_driver ath9k_fixup_driver = {
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+ .probe = ath9k_fixup_probe,
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+ .driver = {
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+ .name = "ath9k-fixup",
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+ .of_match_table = ath9k_fixup_of_match,
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+ },
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+};
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+
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+int __init ath9k_fixup_init(void)
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+{
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+ int ret = platform_driver_register(&ath9k_fixup_driver);
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+ if (ret)
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+ pr_err("ath9k_fixup: Error registering platform driver!\n");
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+ return ret;
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+}
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+late_initcall(ath9k_fixup_init);
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