mediatek: replace mt7986 watchdog assert patch with upstream

Replace "920-watchdog-add-mt7986-assert.patch" with upstreamed
- 920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch
- 921-v5.19-watchdog-mtk_wdt-mt7986-Add-toprgu-reset-controller.patch

Signed-off-by: Nick Hainke <[email protected]>

target/linux/mediatek/patches-5.15/920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch

@@ -0,0 +1,50 @@
+From 59b0f51335644ee603260faaa4298c0115fb7187 Mon Sep 17 00:00:00 2001
+From: Fengquan Chen <[email protected]>
+Date: Tue, 14 Sep 2021 20:34:54 +0800
+Subject: [PATCH] watchdog: mtk: add disable_wdt_extrst support
+
+In some cases, we may need watchdog just to trigger an
+internal soc reset without sending any output signal.
+
+Provide a disable_wdt_extrst parameter for configuration.
+We can disable or enable it just by configuring dts.
+
+Signed-off-by: Fengquan Chen <[email protected]>
+Reviewed-by: Guenter Roeck <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+Signed-off-by: Guenter Roeck <[email protected]>
+Signed-off-by: Wim Van Sebroeck <[email protected]>
+---
+ drivers/watchdog/mtk_wdt.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/watchdog/mtk_wdt.c
++++ b/drivers/watchdog/mtk_wdt.c
+@@ -65,6 +65,7 @@ struct mtk_wdt_dev {
+ 	void __iomem *wdt_base;
+ 	spinlock_t lock; /* protects WDT_SWSYSRST reg */
+ 	struct reset_controller_dev rcdev;
++	bool disable_wdt_extrst;
+ };
+ 
+ struct mtk_wdt_data {
+@@ -256,6 +257,8 @@ static int mtk_wdt_start(struct watchdog
+ 		reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
+ 	else
+ 		reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
++	if (mtk_wdt->disable_wdt_extrst)
++		reg &= ~WDT_MODE_EXRST_EN;
+ 	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
+ 	iowrite32(reg, wdt_base + WDT_MODE);
+ 
+@@ -381,6 +384,10 @@ static int mtk_wdt_probe(struct platform
+ 		if (err)
+ 			return err;
+ 	}
++
++	mtk_wdt->disable_wdt_extrst =
++		of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
++
+ 	return 0;
+ }
+ 

target/linux/mediatek/patches-5.15/920-watchdog-add-mt7986-assert.patch

@@ -1,57 +0,0 @@
---- a/drivers/watchdog/mtk_wdt.c
-+++ b/drivers/watchdog/mtk_wdt.c
-@@ -9,6 +9,7 @@
-  * Based on sunxi_wdt.c
-  */
- 
-+#include <dt-bindings/reset/mt7986-resets.h>
- #include <dt-bindings/reset-controller/mt2712-resets.h>
- #include <dt-bindings/reset-controller/mt8183-resets.h>
- #include <dt-bindings/reset-controller/mt8192-resets.h>
-@@ -65,6 +66,7 @@ struct mtk_wdt_dev {
- 	void __iomem *wdt_base;
- 	spinlock_t lock; /* protects WDT_SWSYSRST reg */
- 	struct reset_controller_dev rcdev;
-+	bool disable_wdt_extrst;
- };
- 
- struct mtk_wdt_data {
-@@ -87,6 +89,10 @@ static const struct mtk_wdt_data mt8195_
- 	.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
- };
- 
-+static const struct mtk_wdt_data mt7986_data = {
-+	.toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
-+};
-+
- static int toprgu_reset_update(struct reset_controller_dev *rcdev,
- 			       unsigned long id, bool assert)
- {
-@@ -256,6 +262,8 @@ static int mtk_wdt_start(struct watchdog
- 		reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
- 	else
- 		reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
-+	if (mtk_wdt->disable_wdt_extrst)
-+		reg &= ~WDT_MODE_EXRST_EN;
- 	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
- 	iowrite32(reg, wdt_base + WDT_MODE);
- 
-@@ -381,6 +389,10 @@ static int mtk_wdt_probe(struct platform
- 		if (err)
- 			return err;
- 	}
-+
-+	mtk_wdt->disable_wdt_extrst =
-+		of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
-+
- 	return 0;
- }
- 
-@@ -414,6 +426,7 @@ static const struct of_device_id mtk_wdt
- 	{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
- 	{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
- 	{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
-+	{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
- 	{ /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);

target/linux/mediatek/patches-5.15/921-v5.19-watchdog-mtk_wdt-mt7986-Add-toprgu-reset-controller.patch

@@ -0,0 +1,49 @@
+From 711a5b25bac95dcd1111521ed71693330e74a926 Mon Sep 17 00:00:00 2001
+From: Sam Shih <[email protected]>
+Date: Wed, 5 Jan 2022 18:04:56 +0800
+Subject: [PATCH] watchdog: mtk_wdt: mt7986: Add toprgu reset controller
+ support
+
+Besides watchdog, the mt7986 toprgu module also provides software reset
+functionality for various peripheral subsystems
+(eg, ethernet, pcie, and connectivity)
+
+Signed-off-by: Sam Shih <[email protected]>
+Reviewed-by: Matthias Brugger <[email protected]>
+Reviewed-by: Guenter Roeck <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+Signed-off-by: Guenter Roeck <[email protected]>
+Signed-off-by: Wim Van Sebroeck <[email protected]>
+---
+ drivers/watchdog/mtk_wdt.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/watchdog/mtk_wdt.c
++++ b/drivers/watchdog/mtk_wdt.c
+@@ -10,6 +10,7 @@
+  */
+ 
+ #include <dt-bindings/reset-controller/mt2712-resets.h>
++#include <dt-bindings/reset/mt7986-resets.h>
+ #include <dt-bindings/reset-controller/mt8183-resets.h>
+ #include <dt-bindings/reset-controller/mt8192-resets.h>
+ #include <dt-bindings/reset/mt8195-resets.h>
+@@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt2712_
+ 	.toprgu_sw_rst_num = MT2712_TOPRGU_SW_RST_NUM,
+ };
+ 
++static const struct mtk_wdt_data mt7986_data = {
++	.toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
++};
++
+ static const struct mtk_wdt_data mt8183_data = {
+ 	.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
+ };
+@@ -418,6 +423,7 @@ static int mtk_wdt_resume(struct device
+ static const struct of_device_id mtk_wdt_dt_ids[] = {
+ 	{ .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
+ 	{ .compatible = "mediatek,mt6589-wdt" },
++	{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
+ 	{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
+ 	{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
+ 	{ .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },