realtek: extend SoC information

Add SoC revision, CPU part number, and a flag for engineering samples to
the rtl83xx_soc_info structure.

Also extend the system type string to include this information.

Signed-off-by: Jan Hoffmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19653
Signed-off-by: Robert Marko <[email protected]>

target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h

@@ -7,6 +7,8 @@
 #define _MACH_RTL838X_H_
 
 #include <asm/types.h>
+#include <linux/types.h>
+
 /*
  * Register access macros
  */
@@ -393,6 +395,9 @@ struct rtl83xx_soc_info {
 	unsigned char *name;
 	unsigned int id;
 	unsigned int family;
+	unsigned int revision;
+	unsigned int cpu;
+	bool testchip;
 	unsigned char *compatible;
 	volatile void *sw_base;
 	volatile void *icu_base;

target/linux/realtek/files-6.12/arch/mips/rtl838x/prom.c

@@ -21,7 +21,7 @@ struct rtl83xx_soc_info soc_info;
 const void *fdt;
 
 static char soc_name[16];
-static char rtl83xx_system_type[32];
+static char rtl83xx_system_type[48];
 
 #ifdef CONFIG_MIPS_MT_SMP
 
@@ -102,6 +102,62 @@ const char *get_system_type(void)
 	return rtl83xx_system_type;
 }
 
+static void __init rtl838x_read_details(uint32_t model)
+{
+	uint32_t chip_info, ext_version, tmp;
+
+	sw_w32(0x3, RTL838X_INT_RW_CTRL);
+	sw_w32(0xa << 28, RTL838X_CHIP_INFO);
+
+	chip_info = sw_r32(RTL838X_CHIP_INFO);
+	soc_info.cpu = chip_info & 0xffff;
+
+	ext_version = sw_r32(RTL838X_EXT_VERSION);
+	tmp = ext_version & 0x1f;
+
+	if (tmp == 2) {
+		soc_info.revision = 1;
+	} else {
+		tmp = (chip_info >> 16) & 0x1f;
+		if (soc_info.cpu == 0x0477) {
+			soc_info.revision = tmp;
+			soc_info.testchip = true;
+		} else {
+			soc_info.revision = tmp - 1;
+		}
+	}
+}
+
+static void __init rtl839x_read_details(uint32_t model)
+{
+	uint32_t chip_info;
+
+	sw_w32(0xa << 28, RTL839X_CHIP_INFO);
+
+	chip_info = sw_r32(RTL839X_CHIP_INFO);
+	soc_info.cpu = chip_info & 0xffff;
+
+	soc_info.revision = (model >> 1) & 0x1f;
+
+	if (!(model & 0x3e))
+		soc_info.testchip = true;
+}
+
+static void __init rtl93xx_read_details(uint32_t model)
+{
+	uint32_t chip_info;
+
+	sw_w32(0xa << 16, RTL93XX_CHIP_INFO);
+
+	chip_info = sw_r32(RTL93XX_CHIP_INFO);
+	soc_info.cpu = chip_info & 0xffff;
+
+	soc_info.revision = model & 0xf;
+
+	if (model & 0x30)
+		soc_info.testchip = true;
+}
+
 static uint32_t __init read_model(void)
 {
 	uint32_t model, id;
@@ -111,6 +167,7 @@ static uint32_t __init read_model(void)
 	if ((id >= 0x8380 && id <= 0x8382) || id == 0x8330 || id == 0x8332) {
 		soc_info.id = id;
 		soc_info.family = RTL8380_FAMILY_ID;
+		rtl838x_read_details(model);
 		return model;
 	}
 
@@ -119,6 +176,7 @@ static uint32_t __init read_model(void)
 	if ((id >= 0x8391 && id <= 0x8396) || (id >= 0x8351 && id <= 0x8353)) {
 		soc_info.id = id;
 		soc_info.family = RTL8390_FAMILY_ID;
+		rtl839x_read_details(model);
 		return model;
 	}
 
@@ -127,10 +185,12 @@ static uint32_t __init read_model(void)
 	if (id >= 0x9301 && id <= 0x9303) {
 		soc_info.id = id;
 		soc_info.family = RTL9300_FAMILY_ID;
+		rtl93xx_read_details(model);
 		return model;
 	} else if (id >= 0x9311 && id <= 0x9313) {
 		soc_info.id = id;
 		soc_info.family = RTL9310_FAMILY_ID;
+		rtl93xx_read_details(model);
 		return model;
 	}
 
@@ -153,8 +213,18 @@ static void __init parse_model(uint32_t model)
 }
 
 static void __init rtl83xx_set_system_type(void) {
+	char revision = '?';
+	char *es = "";
+
+	if (soc_info.revision >= 0 && soc_info.revision < 26)
+		revision = 'A' + soc_info.revision;
+
+	if (soc_info.testchip)
+		es = " ES";
+
 	snprintf(rtl83xx_system_type, sizeof(rtl83xx_system_type),
-		 "Realtek %s", soc_info.name);
+		 "Realtek %s%s rev %c (%04X)",
+		 soc_info.name, es, revision, soc_info.cpu);
 }
 
 void __init prom_init(void)