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lantiq: Fixed reading the number of RX FIFOs in the SPI driver

Until now the SPI driver used the TX bits for the RX FIFO. This seems
uncritical for now since both are equals on my devices (VR9), but this
could cause problems on other SoCs.

Signed-off-by: Martin Blumenstingl <[email protected]>

SVN-Revision: 47208
John Crispin 10 years ago
parent
42c9a85e8e
commit
2c7d536780
2 changed files with 2 additions and 2 deletions
Split View Show Diff Stats
  1. 1 1
      target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
  2. 1 1
      target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch

+ 1 - 1
target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
View File 

@@ -913,7 +913,7 @@ Signed-off-by: John Crispin <[email protected]>
 
 +	/* Read module capabilities */
 
 +	id = ltq_spi_reg_read(hw, LTQ_SPI_ID);
 
 +	hw->txfs = (id >> LTQ_SPI_ID_TXFS_SHIFT) & LTQ_SPI_ID_TXFS_MASK;
 
-+	hw->rxfs = (id >> LTQ_SPI_ID_TXFS_SHIFT) & LTQ_SPI_ID_TXFS_MASK;
 
++	hw->rxfs = (id >> LTQ_SPI_ID_RXFS_SHIFT) & LTQ_SPI_ID_RXFS_MASK;
 
 +	hw->dma_support = (id & LTQ_SPI_ID_CFG) ? 1 : 0;
 
 +
 
 +	ltq_spi_config_mode_set(hw);

+ 1 - 1
target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
View File 

@@ -927,7 +927,7 @@ Signed-off-by: John Crispin <[email protected]>
 
 +	/* Read module capabilities */
 
 +	id = ltq_spi_reg_read(hw, LTQ_SPI_ID);
 
 +	hw->txfs = (id >> LTQ_SPI_ID_TXFS_SHIFT) & LTQ_SPI_ID_TXFS_MASK;
 
-+	hw->rxfs = (id >> LTQ_SPI_ID_TXFS_SHIFT) & LTQ_SPI_ID_TXFS_MASK;
 
++	hw->rxfs = (id >> LTQ_SPI_ID_RXFS_SHIFT) & LTQ_SPI_ID_RXFS_MASK;
 
 +	hw->dma_support = (id & LTQ_SPI_ID_CFG) ? 1 : 0;
 
 +
 
 +	ltq_spi_config_mode_set(hw);