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package: uboot-sunxi: various changes - bump to 2016.03 - add bugfixes related to 2016.03 update - sync DTS files with mainline - add support for non-standard uEnv.txt - add initial support for Theobroma A31-yQ7 devboard

Signed-off-by: Zoltan HERPAI <[email protected]>

SVN-Revision: 49089
Zoltan Herpai 9 жил өмнө
parent
commit
2d4ebff3ad
25 өөрчлөгдсөн 9835 нэмэгдсэн , 210 устгасан
  1. 16 4
      package/boot/uboot-sunxi/Makefile
  2. 394 0
      package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch
  3. 1411 0
      package/boot/uboot-sunxi/patches/010-dt-sync-files-with-kernel.patch
  4. 0 60
      package/boot/uboot-sunxi/patches/010-sunxi-support-smta.patch
  5. 7354 0
      package/boot/uboot-sunxi/patches/011-dt-sync-dts-files-with-kernel.patch
  6. 0 83
      package/boot/uboot-sunxi/patches/011-sunxi-support-h3-ccu.patch
  7. 40 0
      package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch
  8. 0 22
      package/boot/uboot-sunxi/patches/012-sunxi-support-psci-on-h3.patch
  9. 26 0
      package/boot/uboot-sunxi/patches/013-enable-realtek-phy.patch
  10. 0 16
      package/boot/uboot-sunxi/patches/013-sunxi-enable-booting-nonsec_HYP-on-h3.patch
  11. 135 0
      package/boot/uboot-sunxi/patches/014-fix-gmac-init.patch
  12. 82 0
      package/boot/uboot-sunxi/patches/015-fix-2nd-usb-ctrler-on-sun47i.patch
  13. 33 0
      package/boot/uboot-sunxi/patches/016-spl-print-mmc-slot.patch
  14. 43 0
      package/boot/uboot-sunxi/patches/017-usb-add-support-for-usb3-vbus-pin.patch
  15. 35 0
      package/boot/uboot-sunxi/patches/018-usb-specify-vbus-pins-on-orangepis.patch
  16. 35 0
      package/boot/uboot-sunxi/patches/019-sid-add-efuse-support-for-h3-a83t.patch
  17. 25 0
      package/boot/uboot-sunxi/patches/020-boot-display-board-model-on-startup.patch
  18. 0 25
      package/boot/uboot-sunxi/patches/020-fix-bananapro-sata-LDO4.patch
  19. 37 0
      package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
  20. 77 0
      package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch
  21. 21 0
      package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch
  22. 37 0
      package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch
  23. 28 0
      package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch
  24. 0 0
      package/boot/uboot-sunxi/uEnv-default.txt
  25. 6 0
      package/boot/uboot-sunxi/uEnv-pangolin.txt

+ 16 - 4
package/boot/uboot-sunxi/Makefile

@@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=u-boot
-PKG_VERSION:=2016.01
+PKG_VERSION:=2016.03
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:= \
 	http://mirror2.openwrt.org/sources \
 	ftp://ftp.denx.de/pub/u-boot
 
-PKG_MD5SUM:=7d4f65fd43d4d706f5c5650e020d899d
+PKG_MD5SUM:=973c1d896be751321cc3aafa564f64b2
 
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
 
@@ -90,6 +90,10 @@ define uboot/Lamobo_R1
   TITLE:=U-Boot for Lamobo R1
 endef
 
+define uboot/pangolin
+  TITLE:=U-Boot for Theobroma A31-yQ7 devboard
+endef
+
 define uboot/orangepi_plus
   TITLE:=U-Boot for Orange Pi Plus (H3)
 endef
@@ -110,7 +114,8 @@ UBOOTS:= \
 	Linksprite_pcDuino \
 	Linksprite_pcDuino3 \
 	Lamobo_R1 \
-	orangepi_plus
+	orangepi_plus \
+	pangolin
 
 define Package/uboot/template
 define Package/uboot-sunxi-$(1)
@@ -136,6 +141,13 @@ UBOOT_CONFIG:=$(if $(CONFIG),$(CONFIG),$(BUILD_VARIANT))
 UBOOT_IMAGE:=$(if $(IMAGE),$(IMAGE),openwrt-$(BOARD)-$(BUILD_VARIANT)-u-boot.bin)
 endif
 
+# check if any specialized uEnv bootconfig is required
+ifeq ($(UBOOT_CONFIG),pangolin)
+	UENV:=pangolin
+else
+	UENV:=default
+endif
+
 define Build/Configure
 	$(MAKE) -C $(PKG_BUILD_DIR) \
 		USE_PRIVATE_LIBGCC=yes $(UBOOT_CONFIG)_defconfig
@@ -154,7 +166,7 @@ define Package/uboot/install/default
 		$(KERNEL_BUILD_DIR)/uboot-$(BOARD)-$(1)-spl.bin
 	$(CP) $(PKG_BUILD_DIR)/u-boot-sunxi-with-spl.bin \
 		$(KERNEL_BUILD_DIR)/uboot-$(BOARD)-$(1)-u-boot-with-spl.bin
-	$(CP) uEnv.txt \
+	$(CP) uEnv-$(UENV).txt \
 		$(KERNEL_BUILD_DIR)/uboot-$(BOARD)-$(1)-uEnv.txt
 	mkimage -C none -A arm -T script -d $(KERNEL_BUILD_DIR)/uboot-$(BOARD)-$(1)-uEnv.txt \
 		$(KERNEL_BUILD_DIR)/uboot-$(BOARD)-$(1)-boot.scr

+ 394 - 0
package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch

@@ -0,0 +1,394 @@
+diff -ruN a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+--- a/arch/arm/dts/Makefile	2016-01-12 15:06:54.000000000 +0100
++++ b/arch/arm/dts/Makefile	2016-01-30 15:31:50.000000000 +0100
+@@ -142,6 +142,7 @@
+ 	sun6i-a31-m9.dtb \
+ 	sun6i-a31-mele-a1000g-quad.dtb \
+ 	sun6i-a31-mixtile-loftq.dtb \
++	sun6i-a31-pangolin.dtb \
+ 	sun6i-a31s-cs908.dtb \
+ 	sun6i-a31s-primo81.dtb \
+ 	sun6i-a31s-sinovoip-bpi-m2.dtb
+diff -ruN a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
+--- a/arch/arm/dts/sun6i-a31.dtsi	2016-01-12 15:06:54.000000000 +0100
++++ b/arch/arm/dts/sun6i-a31.dtsi	2016-01-31 15:06:47.000000000 +0100
+@@ -643,6 +643,13 @@
+ 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 			};
+ 
++			i2c3_pins_a: i2c3@0 {
++				allwinner,pins = "PB5", "PB6";
++				allwinner,function = "i2c3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
+ 			mmc0_pins_a: mmc0@0 {
+ 				allwinner,pins = "PF0", "PF1", "PF2",
+ 						 "PF3", "PF4", "PF5";
+diff -ruN a/arch/arm/dts/sun6i-a31-pangolin.dts b/arch/arm/dts/sun6i-a31-pangolin.dts
+--- a/arch/arm/dts/sun6i-a31-pangolin.dts	1970-01-01 01:00:00.000000000 +0100
++++ b/arch/arm/dts/sun6i-a31-pangolin.dts	2016-02-09 01:21:44.965168099 +0100
+@@ -0,0 +1,292 @@
++/*
++ * Copyright 2015, Theobroma Systems Design und Consulting GmbH
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun6i-a31.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++	model = "Theobroma Systems A31 Pangolin";
++	compatible = "tsd,a31-pangolin", "allwinner,sun6i-a31";
++
++	aliases {
++		serial0 = &uart0;
++		serial2 = &uart2;
++		spi0 = &spi0;
++		spi1 = &spi1;
++		spi2 = &spi2;
++		spi3 = &spi3;
++	};
++
++	chosen {
++		stdout-path = "serial2:115200n8";
++	};
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++&ohci2 {
++	status = "okay";
++};
++
++&gmac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&gmac_pins_rgmii_a>;
++	phy = <&phy1>;
++	phy-mode = "rgmii";
++	snps,reset-gpio = <&pio 0 7 GPIO_ACTIVE_LOW>;
++	snps,reset-active-low;
++	snps,reset-delays-us = <0 10000 30000>;
++	status = "okay";
++
++	phy1: ethernet-phy@4 {
++		reg = <4>;
++	};
++};
++
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "okay";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins_a>;
++	status = "okay";
++};
++
++&i2c3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c3_pins_a>;
++	status = "okay";
++
++	rtc_twi: rtc@6f {
++	 compatible = "isil,isl1208";
++	 reg = <0x6f>;
++	};
++	fan: fan@18 {
++		compatible = "ti,amc6821";
++		reg = <0x18>;
++		cooling-min-state = <0>;
++		cooling-max-state = <9>;
++		#cooling-cells = <2>;
++	};
++};
++
++&spi0 {
++	status = "okay";
++
++	flash: flash@0 {
++		compatible = "spansion,m25p40";
++		spi-max-frequency = <16000000>;
++		spi-cpol;
++		spi-cpha;
++	};
++};
++
++&spi1 {
++	status = "okay";
++};
++
++&ir {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ir_pins_a>;
++	status = "okay";
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_pangolin>;
++	vmmc-supply = <&reg_vcc3v0>;
++	bus-width = <4>;
++	cd-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
++	status = "okay";
++};
++
++&mmc0_pins_a {
++	/* external pull-ups missing for some pins */
++	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++};
++
++&mmc2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc2_pins_a>;
++	vmmc-supply = <&reg_vcc3v0>;
++	bus-width = <8>;
++	non-removable;
++	status = "okay";
++};
++
++&pio {
++	mmc0_cd_pin_pangolin: mmc0_cd_pin@0 {
++		allwinner,pins = "PC19";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
++	leds_pins_pangolin: led_pins@0 {
++		allwinner,pins = "PH7", "PC16";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_20_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	mmc2_pins_a: mmc2@0 {
++		allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11",
++				"PC12","PC13","PC14","PC15";
++		allwinner,function = "mmc2";
++		allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&p2wi {
++	status = "okay";
++
++	axp221: pmic@68 {
++		compatible = "x-powers,axp221";
++		reg = <0x68>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++		interrupt-controller;
++		#interrupt-cells = <1>;
++		dcdc1-supply = <&vcc_3v0>;
++		dcdc5-supply = <&vcc_dram>;
++
++		regulators {
++			x-powers,dcdc-freq = <3000>;
++
++			vcc_3v0: dcdc1 {
++				regulator-always-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-name = "vcc-3v0";
++			};
++
++			vdd_cpu: dcdc2 {
++				regulator-always-on;
++				regulator-min-microvolt = <700000>;
++				regulator-max-microvolt = <1320000>;
++				regulator-name = "vdd-cpu";
++			};
++
++			vdd_gpu: dcdc3 {
++				regulator-always-on;
++				regulator-min-microvolt = <700000>;
++				regulator-max-microvolt = <1320000>;
++				regulator-name = "vdd-gpu";
++			};
++
++			vdd_sys_dll: dcdc4 {
++				regulator-always-on;
++				regulator-min-microvolt = <1100000>;
++				regulator-max-microvolt = <1100000>;
++				regulator-name = "vdd-sys-dll";
++			};
++
++			vcc_dram: dcdc5 {
++				regulator-always-on;
++				regulator-min-microvolt = <1500000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vcc-dram";
++			};
++
++			vcc_wifi: aldo1 {
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc_wifi";
++			};
++
++			avcc: aldo3 {
++				regulator-always-on;
++				regulator-min-microvolt = <3000000>;
++				regulator-max-microvolt = <3000000>;
++				regulator-name = "avcc";
++			};
++		};
++	};
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&usb1_vbus_pin_a {
++	allwinner,pins = "PD23";
++};
++
++&reg_usb1_vbus {
++	gpio = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD 23 */
++	status = "okay";
++};
++
++&usbphy {
++	status = "okay";
++	usb1_vbus-supply = <&reg_usb1_vbus>;
++};
+diff -ruN a/configs/pangolin_defconfig b/configs/pangolin_defconfig
+--- a/configs/pangolin_defconfig	1970-01-01 01:00:00.000000000 +0100
++++ b/configs/pangolin_defconfig	2016-01-30 14:43:59.000000000 +0100
+@@ -0,0 +1,36 @@
++CONFIG_SUNXI_PANGOLIN=y
++CONFIG_SPL=y
++CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC,RGMII"
++CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-pangolin"
++CONFIG_VIDEO_VGA_VIA_LCD=y
++CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_MACH_SUN6I=y
++CONFIG_DRAM_CHANNELS=1
++CONFIG_DRAM_CLK=360
++CONFIG_DRAM_ZQ=70
++CONFIG_AXP_DCDC1_VOLT=3300
++CONFIG_AXP_ALDO1_VOLT=0
++CONFIG_AXP_ALDO2_VOLT=1800
++CONFIG_AXP_ALDO3_VOLT=3000
++CONFIG_AXP_DLDO4_VOLT=3300
++CONFIG_AXP_ELDO1_VOLT=1200
++CONFIG_AXP_ELDO2_VOLT=2500
++CONFIG_AXP_ELDO3_VOLT=3300
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++CONFIG_CONS_INDEX=3
++# Vbus gpio for usb1
++CONFIG_USB1_VBUS_PIN=""
++# No Vbus gpio for usb2
++CONFIG_USB2_VBUS_PIN=""
++CONFIG_USB=y
++CONFIG_DM_USB=y
++CONFIG_USB_EHCI=y
++CONFIG_USB_KEYBOARD=y
++CONFIG_DM_ETH=y
++CONFIG_CMD_IMLS=n
++CONFIG_ETH_DESIGNWARE=y
++CONFIG_DM_SPI=y
++CONFIG_DM_SPI_FLASH=y
++CONFIG_SUNXI_SPI=y
+diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
+index e155c4c..1b147b2 100644
+--- a/board/sunxi/Kconfig
++++ b/board/sunxi/Kconfig
+@@ -15,7 +15,6 @@ config SUNXI_GEN_SUN6I
+ 	separate ahb reset control registers, custom pmic bus, new style
+ 	watchdog, etc.
+ 
+-
+ choice
+ 	prompt "Sunxi SoC Variant"
+ 	optional
+@@ -80,6 +79,14 @@ config MACH_SUN8I
+ 	bool
+ 	default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
+ 
++choice
++	prompt "Sunxi Board Variant"
++	optional
++
++config SUNXI_PANGOLIN
++	bool "Theobroma A31 uQ7 Board"
++
++endchoice
+ 
+ config DRAM_CLK
+ 	int "sunxi dram clock speed"
+-- 
+cgit v0.10.2
+

+ 1411 - 0
package/boot/uboot-sunxi/patches/010-dt-sync-files-with-kernel.patch

@@ -0,0 +1,1411 @@
+From 4bb656e9dde2019cb42ac4c27b3a114a801ad127 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Wed, 16 Mar 2016 13:41:23 +0100
+Subject: [PATCH] include/dt-bindings: Sync some files with the kernel
+
+This commit syncs the dt-bindings/input/* headers with the kernel (v4.5)
+and adds dt-bindings/clock/sun4i-a10-pll2.h, both are necessary for newer
+sunxi dts files to build.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Reviewed-by: Tom Rini <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ include/dt-bindings/clock/sun4i-a10-pll2.h    |  53 ++
+ include/dt-bindings/input/input.h             | 510 +---------------
+ include/dt-bindings/input/linux-event-codes.h | 805 ++++++++++++++++++++++++++
+ 3 files changed, 859 insertions(+), 509 deletions(-)
+ create mode 100644 include/dt-bindings/clock/sun4i-a10-pll2.h
+ create mode 100644 include/dt-bindings/input/linux-event-codes.h
+
+diff --git a/include/dt-bindings/clock/sun4i-a10-pll2.h b/include/dt-bindings/clock/sun4i-a10-pll2.h
+new file mode 100644
+index 0000000..071c811
+--- /dev/null
++++ b/include/dt-bindings/clock/sun4i-a10-pll2.h
+@@ -0,0 +1,53 @@
++/*
++ * Copyright 2015 Maxime Ripard
++ *
++ * Maxime Ripard <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#ifndef __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_
++#define __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_
++
++#define SUN4I_A10_PLL2_1X	0
++#define SUN4I_A10_PLL2_2X	1
++#define SUN4I_A10_PLL2_4X	2
++#define SUN4I_A10_PLL2_8X	3
++
++#endif /* __DT_BINDINGS_CLOCK_SUN4I_A10_PLL2_H_ */
+diff --git a/include/dt-bindings/input/input.h b/include/dt-bindings/input/input.h
+index 042e7b3..a214133 100644
+--- a/include/dt-bindings/input/input.h
++++ b/include/dt-bindings/input/input.h
+@@ -9,515 +9,7 @@
+ #ifndef _DT_BINDINGS_INPUT_INPUT_H
+ #define _DT_BINDINGS_INPUT_INPUT_H
+ 
+-#define KEY_RESERVED		0
+-#define KEY_ESC			1
+-#define KEY_1			2
+-#define KEY_2			3
+-#define KEY_3			4
+-#define KEY_4			5
+-#define KEY_5			6
+-#define KEY_6			7
+-#define KEY_7			8
+-#define KEY_8			9
+-#define KEY_9			10
+-#define KEY_0			11
+-#define KEY_MINUS		12
+-#define KEY_EQUAL		13
+-#define KEY_BACKSPACE		14
+-#define KEY_TAB			15
+-#define KEY_Q			16
+-#define KEY_W			17
+-#define KEY_E			18
+-#define KEY_R			19
+-#define KEY_T			20
+-#define KEY_Y			21
+-#define KEY_U			22
+-#define KEY_I			23
+-#define KEY_O			24
+-#define KEY_P			25
+-#define KEY_LEFTBRACE		26
+-#define KEY_RIGHTBRACE		27
+-#define KEY_ENTER		28
+-#define KEY_LEFTCTRL		29
+-#define KEY_A			30
+-#define KEY_S			31
+-#define KEY_D			32
+-#define KEY_F			33
+-#define KEY_G			34
+-#define KEY_H			35
+-#define KEY_J			36
+-#define KEY_K			37
+-#define KEY_L			38
+-#define KEY_SEMICOLON		39
+-#define KEY_APOSTROPHE		40
+-#define KEY_GRAVE		41
+-#define KEY_LEFTSHIFT		42
+-#define KEY_BACKSLASH		43
+-#define KEY_Z			44
+-#define KEY_X			45
+-#define KEY_C			46
+-#define KEY_V			47
+-#define KEY_B			48
+-#define KEY_N			49
+-#define KEY_M			50
+-#define KEY_COMMA		51
+-#define KEY_DOT			52
+-#define KEY_SLASH		53
+-#define KEY_RIGHTSHIFT		54
+-#define KEY_KPASTERISK		55
+-#define KEY_LEFTALT		56
+-#define KEY_SPACE		57
+-#define KEY_CAPSLOCK		58
+-#define KEY_F1			59
+-#define KEY_F2			60
+-#define KEY_F3			61
+-#define KEY_F4			62
+-#define KEY_F5			63
+-#define KEY_F6			64
+-#define KEY_F7			65
+-#define KEY_F8			66
+-#define KEY_F9			67
+-#define KEY_F10			68
+-#define KEY_NUMLOCK		69
+-#define KEY_SCROLLLOCK		70
+-#define KEY_KP7			71
+-#define KEY_KP8			72
+-#define KEY_KP9			73
+-#define KEY_KPMINUS		74
+-#define KEY_KP4			75
+-#define KEY_KP5			76
+-#define KEY_KP6			77
+-#define KEY_KPPLUS		78
+-#define KEY_KP1			79
+-#define KEY_KP2			80
+-#define KEY_KP3			81
+-#define KEY_KP0			82
+-#define KEY_KPDOT		83
+-
+-#define KEY_ZENKAKUHANKAKU	85
+-#define KEY_102ND		86
+-#define KEY_F11			87
+-#define KEY_F12			88
+-#define KEY_RO			89
+-#define KEY_KATAKANA		90
+-#define KEY_HIRAGANA		91
+-#define KEY_HENKAN		92
+-#define KEY_KATAKANAHIRAGANA	93
+-#define KEY_MUHENKAN		94
+-#define KEY_KPJPCOMMA		95
+-#define KEY_KPENTER		96
+-#define KEY_RIGHTCTRL		97
+-#define KEY_KPSLASH		98
+-#define KEY_SYSRQ		99
+-#define KEY_RIGHTALT		100
+-#define KEY_LINEFEED		101
+-#define KEY_HOME		102
+-#define KEY_UP			103
+-#define KEY_PAGEUP		104
+-#define KEY_LEFT		105
+-#define KEY_RIGHT		106
+-#define KEY_END			107
+-#define KEY_DOWN		108
+-#define KEY_PAGEDOWN		109
+-#define KEY_INSERT		110
+-#define KEY_DELETE		111
+-#define KEY_MACRO		112
+-#define KEY_MUTE		113
+-#define KEY_VOLUMEDOWN		114
+-#define KEY_VOLUMEUP		115
+-#define KEY_POWER		116	/* SC System Power Down */
+-#define KEY_KPEQUAL		117
+-#define KEY_KPPLUSMINUS		118
+-#define KEY_PAUSE		119
+-#define KEY_SCALE		120	/* AL Compiz Scale (Expose) */
+-
+-#define KEY_KPCOMMA		121
+-#define KEY_HANGEUL		122
+-#define KEY_HANGUEL		KEY_HANGEUL
+-#define KEY_HANJA		123
+-#define KEY_YEN			124
+-#define KEY_LEFTMETA		125
+-#define KEY_RIGHTMETA		126
+-#define KEY_COMPOSE		127
+-
+-#define KEY_STOP		128	/* AC Stop */
+-#define KEY_AGAIN		129
+-#define KEY_PROPS		130	/* AC Properties */
+-#define KEY_UNDO		131	/* AC Undo */
+-#define KEY_FRONT		132
+-#define KEY_COPY		133	/* AC Copy */
+-#define KEY_OPEN		134	/* AC Open */
+-#define KEY_PASTE		135	/* AC Paste */
+-#define KEY_FIND		136	/* AC Search */
+-#define KEY_CUT			137	/* AC Cut */
+-#define KEY_HELP		138	/* AL Integrated Help Center */
+-#define KEY_MENU		139	/* Menu (show menu) */
+-#define KEY_CALC		140	/* AL Calculator */
+-#define KEY_SETUP		141
+-#define KEY_SLEEP		142	/* SC System Sleep */
+-#define KEY_WAKEUP		143	/* System Wake Up */
+-#define KEY_FILE		144	/* AL Local Machine Browser */
+-#define KEY_SENDFILE		145
+-#define KEY_DELETEFILE		146
+-#define KEY_XFER		147
+-#define KEY_PROG1		148
+-#define KEY_PROG2		149
+-#define KEY_WWW			150	/* AL Internet Browser */
+-#define KEY_MSDOS		151
+-#define KEY_COFFEE		152	/* AL Terminal Lock/Screensaver */
+-#define KEY_SCREENLOCK		KEY_COFFEE
+-#define KEY_DIRECTION		153
+-#define KEY_CYCLEWINDOWS	154
+-#define KEY_MAIL		155
+-#define KEY_BOOKMARKS		156	/* AC Bookmarks */
+-#define KEY_COMPUTER		157
+-#define KEY_BACK		158	/* AC Back */
+-#define KEY_FORWARD		159	/* AC Forward */
+-#define KEY_CLOSECD		160
+-#define KEY_EJECTCD		161
+-#define KEY_EJECTCLOSECD	162
+-#define KEY_NEXTSONG		163
+-#define KEY_PLAYPAUSE		164
+-#define KEY_PREVIOUSSONG	165
+-#define KEY_STOPCD		166
+-#define KEY_RECORD		167
+-#define KEY_REWIND		168
+-#define KEY_PHONE		169	/* Media Select Telephone */
+-#define KEY_ISO			170
+-#define KEY_CONFIG		171	/* AL Consumer Control Configuration */
+-#define KEY_HOMEPAGE		172	/* AC Home */
+-#define KEY_REFRESH		173	/* AC Refresh */
+-#define KEY_EXIT		174	/* AC Exit */
+-#define KEY_MOVE		175
+-#define KEY_EDIT		176
+-#define KEY_SCROLLUP		177
+-#define KEY_SCROLLDOWN		178
+-#define KEY_KPLEFTPAREN		179
+-#define KEY_KPRIGHTPAREN	180
+-#define KEY_NEW			181	/* AC New */
+-#define KEY_REDO		182	/* AC Redo/Repeat */
+-
+-#define KEY_F13			183
+-#define KEY_F14			184
+-#define KEY_F15			185
+-#define KEY_F16			186
+-#define KEY_F17			187
+-#define KEY_F18			188
+-#define KEY_F19			189
+-#define KEY_F20			190
+-#define KEY_F21			191
+-#define KEY_F22			192
+-#define KEY_F23			193
+-#define KEY_F24			194
+-
+-#define KEY_PLAYCD		200
+-#define KEY_PAUSECD		201
+-#define KEY_PROG3		202
+-#define KEY_PROG4		203
+-#define KEY_DASHBOARD		204	/* AL Dashboard */
+-#define KEY_SUSPEND		205
+-#define KEY_CLOSE		206	/* AC Close */
+-#define KEY_PLAY		207
+-#define KEY_FASTFORWARD		208
+-#define KEY_BASSBOOST		209
+-#define KEY_PRINT		210	/* AC Print */
+-#define KEY_HP			211
+-#define KEY_CAMERA		212
+-#define KEY_SOUND		213
+-#define KEY_QUESTION		214
+-#define KEY_EMAIL		215
+-#define KEY_CHAT		216
+-#define KEY_SEARCH		217
+-#define KEY_CONNECT		218
+-#define KEY_FINANCE		219	/* AL Checkbook/Finance */
+-#define KEY_SPORT		220
+-#define KEY_SHOP		221
+-#define KEY_ALTERASE		222
+-#define KEY_CANCEL		223	/* AC Cancel */
+-#define KEY_BRIGHTNESSDOWN	224
+-#define KEY_BRIGHTNESSUP	225
+-#define KEY_MEDIA		226
+-
+-#define KEY_SWITCHVIDEOMODE	227	/* Cycle between available video
+-					   outputs (Monitor/LCD/TV-out/etc) */
+-#define KEY_KBDILLUMTOGGLE	228
+-#define KEY_KBDILLUMDOWN	229
+-#define KEY_KBDILLUMUP		230
+-
+-#define KEY_SEND		231	/* AC Send */
+-#define KEY_REPLY		232	/* AC Reply */
+-#define KEY_FORWARDMAIL		233	/* AC Forward Msg */
+-#define KEY_SAVE		234	/* AC Save */
+-#define KEY_DOCUMENTS		235
+-
+-#define KEY_BATTERY		236
+-
+-#define KEY_BLUETOOTH		237
+-#define KEY_WLAN		238
+-#define KEY_UWB			239
+-
+-#define KEY_UNKNOWN		240
+-
+-#define KEY_VIDEO_NEXT		241	/* drive next video source */
+-#define KEY_VIDEO_PREV		242	/* drive previous video source */
+-#define KEY_BRIGHTNESS_CYCLE	243	/* brightness up, after max is min */
+-#define KEY_BRIGHTNESS_ZERO	244	/* brightness off, use ambient */
+-#define KEY_DISPLAY_OFF		245	/* display device to off state */
+-
+-#define KEY_WIMAX		246
+-#define KEY_RFKILL		247	/* Key that controls all radios */
+-
+-#define KEY_MICMUTE		248	/* Mute / unmute the microphone */
+-
+-/* Code 255 is reserved for special needs of AT keyboard driver */
+-
+-#define BTN_MISC		0x100
+-#define BTN_0			0x100
+-#define BTN_1			0x101
+-#define BTN_2			0x102
+-#define BTN_3			0x103
+-#define BTN_4			0x104
+-#define BTN_5			0x105
+-#define BTN_6			0x106
+-#define BTN_7			0x107
+-#define BTN_8			0x108
+-#define BTN_9			0x109
+-
+-#define BTN_MOUSE		0x110
+-#define BTN_LEFT		0x110
+-#define BTN_RIGHT		0x111
+-#define BTN_MIDDLE		0x112
+-#define BTN_SIDE		0x113
+-#define BTN_EXTRA		0x114
+-#define BTN_FORWARD		0x115
+-#define BTN_BACK		0x116
+-#define BTN_TASK		0x117
+-
+-#define BTN_JOYSTICK		0x120
+-#define BTN_TRIGGER		0x120
+-#define BTN_THUMB		0x121
+-#define BTN_THUMB2		0x122
+-#define BTN_TOP			0x123
+-#define BTN_TOP2		0x124
+-#define BTN_PINKIE		0x125
+-#define BTN_BASE		0x126
+-#define BTN_BASE2		0x127
+-#define BTN_BASE3		0x128
+-#define BTN_BASE4		0x129
+-#define BTN_BASE5		0x12a
+-#define BTN_BASE6		0x12b
+-#define BTN_DEAD		0x12f
+-
+-#define BTN_GAMEPAD		0x130
+-#define BTN_SOUTH		0x130
+-#define BTN_A			BTN_SOUTH
+-#define BTN_EAST		0x131
+-#define BTN_B			BTN_EAST
+-#define BTN_C			0x132
+-#define BTN_NORTH		0x133
+-#define BTN_X			BTN_NORTH
+-#define BTN_WEST		0x134
+-#define BTN_Y			BTN_WEST
+-#define BTN_Z			0x135
+-#define BTN_TL			0x136
+-#define BTN_TR			0x137
+-#define BTN_TL2			0x138
+-#define BTN_TR2			0x139
+-#define BTN_SELECT		0x13a
+-#define BTN_START		0x13b
+-#define BTN_MODE		0x13c
+-#define BTN_THUMBL		0x13d
+-#define BTN_THUMBR		0x13e
+-
+-#define BTN_DIGI		0x140
+-#define BTN_TOOL_PEN		0x140
+-#define BTN_TOOL_RUBBER		0x141
+-#define BTN_TOOL_BRUSH		0x142
+-#define BTN_TOOL_PENCIL		0x143
+-#define BTN_TOOL_AIRBRUSH	0x144
+-#define BTN_TOOL_FINGER		0x145
+-#define BTN_TOOL_MOUSE		0x146
+-#define BTN_TOOL_LENS		0x147
+-#define BTN_TOOL_QUINTTAP	0x148	/* Five fingers on trackpad */
+-#define BTN_TOUCH		0x14a
+-#define BTN_STYLUS		0x14b
+-#define BTN_STYLUS2		0x14c
+-#define BTN_TOOL_DOUBLETAP	0x14d
+-#define BTN_TOOL_TRIPLETAP	0x14e
+-#define BTN_TOOL_QUADTAP	0x14f	/* Four fingers on trackpad */
+-
+-#define BTN_WHEEL		0x150
+-#define BTN_GEAR_DOWN		0x150
+-#define BTN_GEAR_UP		0x151
+-
+-#define KEY_OK			0x160
+-#define KEY_SELECT		0x161
+-#define KEY_GOTO		0x162
+-#define KEY_CLEAR		0x163
+-#define KEY_POWER2		0x164
+-#define KEY_OPTION		0x165
+-#define KEY_INFO		0x166	/* AL OEM Features/Tips/Tutorial */
+-#define KEY_TIME		0x167
+-#define KEY_VENDOR		0x168
+-#define KEY_ARCHIVE		0x169
+-#define KEY_PROGRAM		0x16a	/* Media Select Program Guide */
+-#define KEY_CHANNEL		0x16b
+-#define KEY_FAVORITES		0x16c
+-#define KEY_EPG			0x16d
+-#define KEY_PVR			0x16e	/* Media Select Home */
+-#define KEY_MHP			0x16f
+-#define KEY_LANGUAGE		0x170
+-#define KEY_TITLE		0x171
+-#define KEY_SUBTITLE		0x172
+-#define KEY_ANGLE		0x173
+-#define KEY_ZOOM		0x174
+-#define KEY_MODE		0x175
+-#define KEY_KEYBOARD		0x176
+-#define KEY_SCREEN		0x177
+-#define KEY_PC			0x178	/* Media Select Computer */
+-#define KEY_TV			0x179	/* Media Select TV */
+-#define KEY_TV2			0x17a	/* Media Select Cable */
+-#define KEY_VCR			0x17b	/* Media Select VCR */
+-#define KEY_VCR2		0x17c	/* VCR Plus */
+-#define KEY_SAT			0x17d	/* Media Select Satellite */
+-#define KEY_SAT2		0x17e
+-#define KEY_CD			0x17f	/* Media Select CD */
+-#define KEY_TAPE		0x180	/* Media Select Tape */
+-#define KEY_RADIO		0x181
+-#define KEY_TUNER		0x182	/* Media Select Tuner */
+-#define KEY_PLAYER		0x183
+-#define KEY_TEXT		0x184
+-#define KEY_DVD			0x185	/* Media Select DVD */
+-#define KEY_AUX			0x186
+-#define KEY_MP3			0x187
+-#define KEY_AUDIO		0x188	/* AL Audio Browser */
+-#define KEY_VIDEO		0x189	/* AL Movie Browser */
+-#define KEY_DIRECTORY		0x18a
+-#define KEY_LIST		0x18b
+-#define KEY_MEMO		0x18c	/* Media Select Messages */
+-#define KEY_CALENDAR		0x18d
+-#define KEY_RED			0x18e
+-#define KEY_GREEN		0x18f
+-#define KEY_YELLOW		0x190
+-#define KEY_BLUE		0x191
+-#define KEY_CHANNELUP		0x192	/* Channel Increment */
+-#define KEY_CHANNELDOWN		0x193	/* Channel Decrement */
+-#define KEY_FIRST		0x194
+-#define KEY_LAST		0x195	/* Recall Last */
+-#define KEY_AB			0x196
+-#define KEY_NEXT		0x197
+-#define KEY_RESTART		0x198
+-#define KEY_SLOW		0x199
+-#define KEY_SHUFFLE		0x19a
+-#define KEY_BREAK		0x19b
+-#define KEY_PREVIOUS		0x19c
+-#define KEY_DIGITS		0x19d
+-#define KEY_TEEN		0x19e
+-#define KEY_TWEN		0x19f
+-#define KEY_VIDEOPHONE		0x1a0	/* Media Select Video Phone */
+-#define KEY_GAMES		0x1a1	/* Media Select Games */
+-#define KEY_ZOOMIN		0x1a2	/* AC Zoom In */
+-#define KEY_ZOOMOUT		0x1a3	/* AC Zoom Out */
+-#define KEY_ZOOMRESET		0x1a4	/* AC Zoom */
+-#define KEY_WORDPROCESSOR	0x1a5	/* AL Word Processor */
+-#define KEY_EDITOR		0x1a6	/* AL Text Editor */
+-#define KEY_SPREADSHEET		0x1a7	/* AL Spreadsheet */
+-#define KEY_GRAPHICSEDITOR	0x1a8	/* AL Graphics Editor */
+-#define KEY_PRESENTATION	0x1a9	/* AL Presentation App */
+-#define KEY_DATABASE		0x1aa	/* AL Database App */
+-#define KEY_NEWS		0x1ab	/* AL Newsreader */
+-#define KEY_VOICEMAIL		0x1ac	/* AL Voicemail */
+-#define KEY_ADDRESSBOOK		0x1ad	/* AL Contacts/Address Book */
+-#define KEY_MESSENGER		0x1ae	/* AL Instant Messaging */
+-#define KEY_DISPLAYTOGGLE	0x1af	/* Turn display (LCD) on and off */
+-#define KEY_SPELLCHECK		0x1b0   /* AL Spell Check */
+-#define KEY_LOGOFF		0x1b1   /* AL Logoff */
+-
+-#define KEY_DOLLAR		0x1b2
+-#define KEY_EURO		0x1b3
+-
+-#define KEY_FRAMEBACK		0x1b4	/* Consumer - transport controls */
+-#define KEY_FRAMEFORWARD	0x1b5
+-#define KEY_CONTEXT_MENU	0x1b6	/* GenDesc - system context menu */
+-#define KEY_MEDIA_REPEAT	0x1b7	/* Consumer - transport control */
+-#define KEY_10CHANNELSUP	0x1b8	/* 10 channels up (10+) */
+-#define KEY_10CHANNELSDOWN	0x1b9	/* 10 channels down (10-) */
+-#define KEY_IMAGES		0x1ba	/* AL Image Browser */
+-
+-#define KEY_DEL_EOL		0x1c0
+-#define KEY_DEL_EOS		0x1c1
+-#define KEY_INS_LINE		0x1c2
+-#define KEY_DEL_LINE		0x1c3
+-
+-#define KEY_FN			0x1d0
+-#define KEY_FN_ESC		0x1d1
+-#define KEY_FN_F1		0x1d2
+-#define KEY_FN_F2		0x1d3
+-#define KEY_FN_F3		0x1d4
+-#define KEY_FN_F4		0x1d5
+-#define KEY_FN_F5		0x1d6
+-#define KEY_FN_F6		0x1d7
+-#define KEY_FN_F7		0x1d8
+-#define KEY_FN_F8		0x1d9
+-#define KEY_FN_F9		0x1da
+-#define KEY_FN_F10		0x1db
+-#define KEY_FN_F11		0x1dc
+-#define KEY_FN_F12		0x1dd
+-#define KEY_FN_1		0x1de
+-#define KEY_FN_2		0x1df
+-#define KEY_FN_D		0x1e0
+-#define KEY_FN_E		0x1e1
+-#define KEY_FN_F		0x1e2
+-#define KEY_FN_S		0x1e3
+-#define KEY_FN_B		0x1e4
+-
+-#define KEY_BRL_DOT1		0x1f1
+-#define KEY_BRL_DOT2		0x1f2
+-#define KEY_BRL_DOT3		0x1f3
+-#define KEY_BRL_DOT4		0x1f4
+-#define KEY_BRL_DOT5		0x1f5
+-#define KEY_BRL_DOT6		0x1f6
+-#define KEY_BRL_DOT7		0x1f7
+-#define KEY_BRL_DOT8		0x1f8
+-#define KEY_BRL_DOT9		0x1f9
+-#define KEY_BRL_DOT10		0x1fa
+-
+-#define KEY_NUMERIC_0		0x200	/* used by phones, remote controls, */
+-#define KEY_NUMERIC_1		0x201	/* and other keypads */
+-#define KEY_NUMERIC_2		0x202
+-#define KEY_NUMERIC_3		0x203
+-#define KEY_NUMERIC_4		0x204
+-#define KEY_NUMERIC_5		0x205
+-#define KEY_NUMERIC_6		0x206
+-#define KEY_NUMERIC_7		0x207
+-#define KEY_NUMERIC_8		0x208
+-#define KEY_NUMERIC_9		0x209
+-#define KEY_NUMERIC_STAR	0x20a
+-#define KEY_NUMERIC_POUND	0x20b
+-
+-#define KEY_CAMERA_FOCUS	0x210
+-#define KEY_WPS_BUTTON		0x211	/* WiFi Protected Setup key */
+-
+-#define KEY_TOUCHPAD_TOGGLE	0x212	/* Request switch touchpad on or off */
+-#define KEY_TOUCHPAD_ON		0x213
+-#define KEY_TOUCHPAD_OFF	0x214
+-
+-#define KEY_CAMERA_ZOOMIN	0x215
+-#define KEY_CAMERA_ZOOMOUT	0x216
+-#define KEY_CAMERA_UP		0x217
+-#define KEY_CAMERA_DOWN		0x218
+-#define KEY_CAMERA_LEFT		0x219
+-#define KEY_CAMERA_RIGHT	0x21a
+-
+-#define KEY_ATTENDANT_ON	0x21b
+-#define KEY_ATTENDANT_OFF	0x21c
+-#define KEY_ATTENDANT_TOGGLE	0x21d	/* Attendant call on or off */
+-#define KEY_LIGHTS_TOGGLE	0x21e	/* Reading light on or off */
+-
+-#define BTN_DPAD_UP		0x220
+-#define BTN_DPAD_DOWN		0x221
+-#define BTN_DPAD_LEFT		0x222
+-#define BTN_DPAD_RIGHT		0x223
++#include "linux-event-codes.h"
+ 
+ #define MATRIX_KEY(row, col, code)	\
+ 	((((row) & 0xFF) << 24) | (((col) & 0xFF) << 16) | ((code) & 0xFFFF))
+diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
+new file mode 100644
+index 0000000..87cf351
+--- /dev/null
++++ b/include/dt-bindings/input/linux-event-codes.h
+@@ -0,0 +1,805 @@
++/*
++ * Input event codes
++ *
++ *    *** IMPORTANT ***
++ * This file is not only included from C-code but also from devicetree source
++ * files. As such this file MUST only contain comments and defines.
++ *
++ * Copyright (c) 1999-2002 Vojtech Pavlik
++ * Copyright (c) 2015 Hans de Goede <[email protected]>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#ifndef _UAPI_INPUT_EVENT_CODES_H
++#define _UAPI_INPUT_EVENT_CODES_H
++
++/*
++ * Device properties and quirks
++ */
++
++#define INPUT_PROP_POINTER		0x00	/* needs a pointer */
++#define INPUT_PROP_DIRECT		0x01	/* direct input devices */
++#define INPUT_PROP_BUTTONPAD		0x02	/* has button(s) under pad */
++#define INPUT_PROP_SEMI_MT		0x03	/* touch rectangle only */
++#define INPUT_PROP_TOPBUTTONPAD		0x04	/* softbuttons at top of pad */
++#define INPUT_PROP_POINTING_STICK	0x05	/* is a pointing stick */
++#define INPUT_PROP_ACCELEROMETER	0x06	/* has accelerometer */
++
++#define INPUT_PROP_MAX			0x1f
++#define INPUT_PROP_CNT			(INPUT_PROP_MAX + 1)
++
++/*
++ * Event types
++ */
++
++#define EV_SYN			0x00
++#define EV_KEY			0x01
++#define EV_REL			0x02
++#define EV_ABS			0x03
++#define EV_MSC			0x04
++#define EV_SW			0x05
++#define EV_LED			0x11
++#define EV_SND			0x12
++#define EV_REP			0x14
++#define EV_FF			0x15
++#define EV_PWR			0x16
++#define EV_FF_STATUS		0x17
++#define EV_MAX			0x1f
++#define EV_CNT			(EV_MAX+1)
++
++/*
++ * Synchronization events.
++ */
++
++#define SYN_REPORT		0
++#define SYN_CONFIG		1
++#define SYN_MT_REPORT		2
++#define SYN_DROPPED		3
++#define SYN_MAX			0xf
++#define SYN_CNT			(SYN_MAX+1)
++
++/*
++ * Keys and buttons
++ *
++ * Most of the keys/buttons are modeled after USB HUT 1.12
++ * (see http://www.usb.org/developers/hidpage).
++ * Abbreviations in the comments:
++ * AC - Application Control
++ * AL - Application Launch Button
++ * SC - System Control
++ */
++
++#define KEY_RESERVED		0
++#define KEY_ESC			1
++#define KEY_1			2
++#define KEY_2			3
++#define KEY_3			4
++#define KEY_4			5
++#define KEY_5			6
++#define KEY_6			7
++#define KEY_7			8
++#define KEY_8			9
++#define KEY_9			10
++#define KEY_0			11
++#define KEY_MINUS		12
++#define KEY_EQUAL		13
++#define KEY_BACKSPACE		14
++#define KEY_TAB			15
++#define KEY_Q			16
++#define KEY_W			17
++#define KEY_E			18
++#define KEY_R			19
++#define KEY_T			20
++#define KEY_Y			21
++#define KEY_U			22
++#define KEY_I			23
++#define KEY_O			24
++#define KEY_P			25
++#define KEY_LEFTBRACE		26
++#define KEY_RIGHTBRACE		27
++#define KEY_ENTER		28
++#define KEY_LEFTCTRL		29
++#define KEY_A			30
++#define KEY_S			31
++#define KEY_D			32
++#define KEY_F			33
++#define KEY_G			34
++#define KEY_H			35
++#define KEY_J			36
++#define KEY_K			37
++#define KEY_L			38
++#define KEY_SEMICOLON		39
++#define KEY_APOSTROPHE		40
++#define KEY_GRAVE		41
++#define KEY_LEFTSHIFT		42
++#define KEY_BACKSLASH		43
++#define KEY_Z			44
++#define KEY_X			45
++#define KEY_C			46
++#define KEY_V			47
++#define KEY_B			48
++#define KEY_N			49
++#define KEY_M			50
++#define KEY_COMMA		51
++#define KEY_DOT			52
++#define KEY_SLASH		53
++#define KEY_RIGHTSHIFT		54
++#define KEY_KPASTERISK		55
++#define KEY_LEFTALT		56
++#define KEY_SPACE		57
++#define KEY_CAPSLOCK		58
++#define KEY_F1			59
++#define KEY_F2			60
++#define KEY_F3			61
++#define KEY_F4			62
++#define KEY_F5			63
++#define KEY_F6			64
++#define KEY_F7			65
++#define KEY_F8			66
++#define KEY_F9			67
++#define KEY_F10			68
++#define KEY_NUMLOCK		69
++#define KEY_SCROLLLOCK		70
++#define KEY_KP7			71
++#define KEY_KP8			72
++#define KEY_KP9			73
++#define KEY_KPMINUS		74
++#define KEY_KP4			75
++#define KEY_KP5			76
++#define KEY_KP6			77
++#define KEY_KPPLUS		78
++#define KEY_KP1			79
++#define KEY_KP2			80
++#define KEY_KP3			81
++#define KEY_KP0			82
++#define KEY_KPDOT		83
++
++#define KEY_ZENKAKUHANKAKU	85
++#define KEY_102ND		86
++#define KEY_F11			87
++#define KEY_F12			88
++#define KEY_RO			89
++#define KEY_KATAKANA		90
++#define KEY_HIRAGANA		91
++#define KEY_HENKAN		92
++#define KEY_KATAKANAHIRAGANA	93
++#define KEY_MUHENKAN		94
++#define KEY_KPJPCOMMA		95
++#define KEY_KPENTER		96
++#define KEY_RIGHTCTRL		97
++#define KEY_KPSLASH		98
++#define KEY_SYSRQ		99
++#define KEY_RIGHTALT		100
++#define KEY_LINEFEED		101
++#define KEY_HOME		102
++#define KEY_UP			103
++#define KEY_PAGEUP		104
++#define KEY_LEFT		105
++#define KEY_RIGHT		106
++#define KEY_END			107
++#define KEY_DOWN		108
++#define KEY_PAGEDOWN		109
++#define KEY_INSERT		110
++#define KEY_DELETE		111
++#define KEY_MACRO		112
++#define KEY_MUTE		113
++#define KEY_VOLUMEDOWN		114
++#define KEY_VOLUMEUP		115
++#define KEY_POWER		116	/* SC System Power Down */
++#define KEY_KPEQUAL		117
++#define KEY_KPPLUSMINUS		118
++#define KEY_PAUSE		119
++#define KEY_SCALE		120	/* AL Compiz Scale (Expose) */
++
++#define KEY_KPCOMMA		121
++#define KEY_HANGEUL		122
++#define KEY_HANGUEL		KEY_HANGEUL
++#define KEY_HANJA		123
++#define KEY_YEN			124
++#define KEY_LEFTMETA		125
++#define KEY_RIGHTMETA		126
++#define KEY_COMPOSE		127
++
++#define KEY_STOP		128	/* AC Stop */
++#define KEY_AGAIN		129
++#define KEY_PROPS		130	/* AC Properties */
++#define KEY_UNDO		131	/* AC Undo */
++#define KEY_FRONT		132
++#define KEY_COPY		133	/* AC Copy */
++#define KEY_OPEN		134	/* AC Open */
++#define KEY_PASTE		135	/* AC Paste */
++#define KEY_FIND		136	/* AC Search */
++#define KEY_CUT			137	/* AC Cut */
++#define KEY_HELP		138	/* AL Integrated Help Center */
++#define KEY_MENU		139	/* Menu (show menu) */
++#define KEY_CALC		140	/* AL Calculator */
++#define KEY_SETUP		141
++#define KEY_SLEEP		142	/* SC System Sleep */
++#define KEY_WAKEUP		143	/* System Wake Up */
++#define KEY_FILE		144	/* AL Local Machine Browser */
++#define KEY_SENDFILE		145
++#define KEY_DELETEFILE		146
++#define KEY_XFER		147
++#define KEY_PROG1		148
++#define KEY_PROG2		149
++#define KEY_WWW			150	/* AL Internet Browser */
++#define KEY_MSDOS		151
++#define KEY_COFFEE		152	/* AL Terminal Lock/Screensaver */
++#define KEY_SCREENLOCK		KEY_COFFEE
++#define KEY_ROTATE_DISPLAY	153	/* Display orientation for e.g. tablets */
++#define KEY_DIRECTION		KEY_ROTATE_DISPLAY
++#define KEY_CYCLEWINDOWS	154
++#define KEY_MAIL		155
++#define KEY_BOOKMARKS		156	/* AC Bookmarks */
++#define KEY_COMPUTER		157
++#define KEY_BACK		158	/* AC Back */
++#define KEY_FORWARD		159	/* AC Forward */
++#define KEY_CLOSECD		160
++#define KEY_EJECTCD		161
++#define KEY_EJECTCLOSECD	162
++#define KEY_NEXTSONG		163
++#define KEY_PLAYPAUSE		164
++#define KEY_PREVIOUSSONG	165
++#define KEY_STOPCD		166
++#define KEY_RECORD		167
++#define KEY_REWIND		168
++#define KEY_PHONE		169	/* Media Select Telephone */
++#define KEY_ISO			170
++#define KEY_CONFIG		171	/* AL Consumer Control Configuration */
++#define KEY_HOMEPAGE		172	/* AC Home */
++#define KEY_REFRESH		173	/* AC Refresh */
++#define KEY_EXIT		174	/* AC Exit */
++#define KEY_MOVE		175
++#define KEY_EDIT		176
++#define KEY_SCROLLUP		177
++#define KEY_SCROLLDOWN		178
++#define KEY_KPLEFTPAREN		179
++#define KEY_KPRIGHTPAREN	180
++#define KEY_NEW			181	/* AC New */
++#define KEY_REDO		182	/* AC Redo/Repeat */
++
++#define KEY_F13			183
++#define KEY_F14			184
++#define KEY_F15			185
++#define KEY_F16			186
++#define KEY_F17			187
++#define KEY_F18			188
++#define KEY_F19			189
++#define KEY_F20			190
++#define KEY_F21			191
++#define KEY_F22			192
++#define KEY_F23			193
++#define KEY_F24			194
++
++#define KEY_PLAYCD		200
++#define KEY_PAUSECD		201
++#define KEY_PROG3		202
++#define KEY_PROG4		203
++#define KEY_DASHBOARD		204	/* AL Dashboard */
++#define KEY_SUSPEND		205
++#define KEY_CLOSE		206	/* AC Close */
++#define KEY_PLAY		207
++#define KEY_FASTFORWARD		208
++#define KEY_BASSBOOST		209
++#define KEY_PRINT		210	/* AC Print */
++#define KEY_HP			211
++#define KEY_CAMERA		212
++#define KEY_SOUND		213
++#define KEY_QUESTION		214
++#define KEY_EMAIL		215
++#define KEY_CHAT		216
++#define KEY_SEARCH		217
++#define KEY_CONNECT		218
++#define KEY_FINANCE		219	/* AL Checkbook/Finance */
++#define KEY_SPORT		220
++#define KEY_SHOP		221
++#define KEY_ALTERASE		222
++#define KEY_CANCEL		223	/* AC Cancel */
++#define KEY_BRIGHTNESSDOWN	224
++#define KEY_BRIGHTNESSUP	225
++#define KEY_MEDIA		226
++
++#define KEY_SWITCHVIDEOMODE	227	/* Cycle between available video
++					   outputs (Monitor/LCD/TV-out/etc) */
++#define KEY_KBDILLUMTOGGLE	228
++#define KEY_KBDILLUMDOWN	229
++#define KEY_KBDILLUMUP		230
++
++#define KEY_SEND		231	/* AC Send */
++#define KEY_REPLY		232	/* AC Reply */
++#define KEY_FORWARDMAIL		233	/* AC Forward Msg */
++#define KEY_SAVE		234	/* AC Save */
++#define KEY_DOCUMENTS		235
++
++#define KEY_BATTERY		236
++
++#define KEY_BLUETOOTH		237
++#define KEY_WLAN		238
++#define KEY_UWB			239
++
++#define KEY_UNKNOWN		240
++
++#define KEY_VIDEO_NEXT		241	/* drive next video source */
++#define KEY_VIDEO_PREV		242	/* drive previous video source */
++#define KEY_BRIGHTNESS_CYCLE	243	/* brightness up, after max is min */
++#define KEY_BRIGHTNESS_AUTO	244	/* Set Auto Brightness: manual
++					  brightness control is off,
++					  rely on ambient */
++#define KEY_BRIGHTNESS_ZERO	KEY_BRIGHTNESS_AUTO
++#define KEY_DISPLAY_OFF		245	/* display device to off state */
++
++#define KEY_WWAN		246	/* Wireless WAN (LTE, UMTS, GSM, etc.) */
++#define KEY_WIMAX		KEY_WWAN
++#define KEY_RFKILL		247	/* Key that controls all radios */
++
++#define KEY_MICMUTE		248	/* Mute / unmute the microphone */
++
++/* Code 255 is reserved for special needs of AT keyboard driver */
++
++#define BTN_MISC		0x100
++#define BTN_0			0x100
++#define BTN_1			0x101
++#define BTN_2			0x102
++#define BTN_3			0x103
++#define BTN_4			0x104
++#define BTN_5			0x105
++#define BTN_6			0x106
++#define BTN_7			0x107
++#define BTN_8			0x108
++#define BTN_9			0x109
++
++#define BTN_MOUSE		0x110
++#define BTN_LEFT		0x110
++#define BTN_RIGHT		0x111
++#define BTN_MIDDLE		0x112
++#define BTN_SIDE		0x113
++#define BTN_EXTRA		0x114
++#define BTN_FORWARD		0x115
++#define BTN_BACK		0x116
++#define BTN_TASK		0x117
++
++#define BTN_JOYSTICK		0x120
++#define BTN_TRIGGER		0x120
++#define BTN_THUMB		0x121
++#define BTN_THUMB2		0x122
++#define BTN_TOP			0x123
++#define BTN_TOP2		0x124
++#define BTN_PINKIE		0x125
++#define BTN_BASE		0x126
++#define BTN_BASE2		0x127
++#define BTN_BASE3		0x128
++#define BTN_BASE4		0x129
++#define BTN_BASE5		0x12a
++#define BTN_BASE6		0x12b
++#define BTN_DEAD		0x12f
++
++#define BTN_GAMEPAD		0x130
++#define BTN_SOUTH		0x130
++#define BTN_A			BTN_SOUTH
++#define BTN_EAST		0x131
++#define BTN_B			BTN_EAST
++#define BTN_C			0x132
++#define BTN_NORTH		0x133
++#define BTN_X			BTN_NORTH
++#define BTN_WEST		0x134
++#define BTN_Y			BTN_WEST
++#define BTN_Z			0x135
++#define BTN_TL			0x136
++#define BTN_TR			0x137
++#define BTN_TL2			0x138
++#define BTN_TR2			0x139
++#define BTN_SELECT		0x13a
++#define BTN_START		0x13b
++#define BTN_MODE		0x13c
++#define BTN_THUMBL		0x13d
++#define BTN_THUMBR		0x13e
++
++#define BTN_DIGI		0x140
++#define BTN_TOOL_PEN		0x140
++#define BTN_TOOL_RUBBER		0x141
++#define BTN_TOOL_BRUSH		0x142
++#define BTN_TOOL_PENCIL		0x143
++#define BTN_TOOL_AIRBRUSH	0x144
++#define BTN_TOOL_FINGER		0x145
++#define BTN_TOOL_MOUSE		0x146
++#define BTN_TOOL_LENS		0x147
++#define BTN_TOOL_QUINTTAP	0x148	/* Five fingers on trackpad */
++#define BTN_TOUCH		0x14a
++#define BTN_STYLUS		0x14b
++#define BTN_STYLUS2		0x14c
++#define BTN_TOOL_DOUBLETAP	0x14d
++#define BTN_TOOL_TRIPLETAP	0x14e
++#define BTN_TOOL_QUADTAP	0x14f	/* Four fingers on trackpad */
++
++#define BTN_WHEEL		0x150
++#define BTN_GEAR_DOWN		0x150
++#define BTN_GEAR_UP		0x151
++
++#define KEY_OK			0x160
++#define KEY_SELECT		0x161
++#define KEY_GOTO		0x162
++#define KEY_CLEAR		0x163
++#define KEY_POWER2		0x164
++#define KEY_OPTION		0x165
++#define KEY_INFO		0x166	/* AL OEM Features/Tips/Tutorial */
++#define KEY_TIME		0x167
++#define KEY_VENDOR		0x168
++#define KEY_ARCHIVE		0x169
++#define KEY_PROGRAM		0x16a	/* Media Select Program Guide */
++#define KEY_CHANNEL		0x16b
++#define KEY_FAVORITES		0x16c
++#define KEY_EPG			0x16d
++#define KEY_PVR			0x16e	/* Media Select Home */
++#define KEY_MHP			0x16f
++#define KEY_LANGUAGE		0x170
++#define KEY_TITLE		0x171
++#define KEY_SUBTITLE		0x172
++#define KEY_ANGLE		0x173
++#define KEY_ZOOM		0x174
++#define KEY_MODE		0x175
++#define KEY_KEYBOARD		0x176
++#define KEY_SCREEN		0x177
++#define KEY_PC			0x178	/* Media Select Computer */
++#define KEY_TV			0x179	/* Media Select TV */
++#define KEY_TV2			0x17a	/* Media Select Cable */
++#define KEY_VCR			0x17b	/* Media Select VCR */
++#define KEY_VCR2		0x17c	/* VCR Plus */
++#define KEY_SAT			0x17d	/* Media Select Satellite */
++#define KEY_SAT2		0x17e
++#define KEY_CD			0x17f	/* Media Select CD */
++#define KEY_TAPE		0x180	/* Media Select Tape */
++#define KEY_RADIO		0x181
++#define KEY_TUNER		0x182	/* Media Select Tuner */
++#define KEY_PLAYER		0x183
++#define KEY_TEXT		0x184
++#define KEY_DVD			0x185	/* Media Select DVD */
++#define KEY_AUX			0x186
++#define KEY_MP3			0x187
++#define KEY_AUDIO		0x188	/* AL Audio Browser */
++#define KEY_VIDEO		0x189	/* AL Movie Browser */
++#define KEY_DIRECTORY		0x18a
++#define KEY_LIST		0x18b
++#define KEY_MEMO		0x18c	/* Media Select Messages */
++#define KEY_CALENDAR		0x18d
++#define KEY_RED			0x18e
++#define KEY_GREEN		0x18f
++#define KEY_YELLOW		0x190
++#define KEY_BLUE		0x191
++#define KEY_CHANNELUP		0x192	/* Channel Increment */
++#define KEY_CHANNELDOWN		0x193	/* Channel Decrement */
++#define KEY_FIRST		0x194
++#define KEY_LAST		0x195	/* Recall Last */
++#define KEY_AB			0x196
++#define KEY_NEXT		0x197
++#define KEY_RESTART		0x198
++#define KEY_SLOW		0x199
++#define KEY_SHUFFLE		0x19a
++#define KEY_BREAK		0x19b
++#define KEY_PREVIOUS		0x19c
++#define KEY_DIGITS		0x19d
++#define KEY_TEEN		0x19e
++#define KEY_TWEN		0x19f
++#define KEY_VIDEOPHONE		0x1a0	/* Media Select Video Phone */
++#define KEY_GAMES		0x1a1	/* Media Select Games */
++#define KEY_ZOOMIN		0x1a2	/* AC Zoom In */
++#define KEY_ZOOMOUT		0x1a3	/* AC Zoom Out */
++#define KEY_ZOOMRESET		0x1a4	/* AC Zoom */
++#define KEY_WORDPROCESSOR	0x1a5	/* AL Word Processor */
++#define KEY_EDITOR		0x1a6	/* AL Text Editor */
++#define KEY_SPREADSHEET		0x1a7	/* AL Spreadsheet */
++#define KEY_GRAPHICSEDITOR	0x1a8	/* AL Graphics Editor */
++#define KEY_PRESENTATION	0x1a9	/* AL Presentation App */
++#define KEY_DATABASE		0x1aa	/* AL Database App */
++#define KEY_NEWS		0x1ab	/* AL Newsreader */
++#define KEY_VOICEMAIL		0x1ac	/* AL Voicemail */
++#define KEY_ADDRESSBOOK		0x1ad	/* AL Contacts/Address Book */
++#define KEY_MESSENGER		0x1ae	/* AL Instant Messaging */
++#define KEY_DISPLAYTOGGLE	0x1af	/* Turn display (LCD) on and off */
++#define KEY_BRIGHTNESS_TOGGLE	KEY_DISPLAYTOGGLE
++#define KEY_SPELLCHECK		0x1b0   /* AL Spell Check */
++#define KEY_LOGOFF		0x1b1   /* AL Logoff */
++
++#define KEY_DOLLAR		0x1b2
++#define KEY_EURO		0x1b3
++
++#define KEY_FRAMEBACK		0x1b4	/* Consumer - transport controls */
++#define KEY_FRAMEFORWARD	0x1b5
++#define KEY_CONTEXT_MENU	0x1b6	/* GenDesc - system context menu */
++#define KEY_MEDIA_REPEAT	0x1b7	/* Consumer - transport control */
++#define KEY_10CHANNELSUP	0x1b8	/* 10 channels up (10+) */
++#define KEY_10CHANNELSDOWN	0x1b9	/* 10 channels down (10-) */
++#define KEY_IMAGES		0x1ba	/* AL Image Browser */
++
++#define KEY_DEL_EOL		0x1c0
++#define KEY_DEL_EOS		0x1c1
++#define KEY_INS_LINE		0x1c2
++#define KEY_DEL_LINE		0x1c3
++
++#define KEY_FN			0x1d0
++#define KEY_FN_ESC		0x1d1
++#define KEY_FN_F1		0x1d2
++#define KEY_FN_F2		0x1d3
++#define KEY_FN_F3		0x1d4
++#define KEY_FN_F4		0x1d5
++#define KEY_FN_F5		0x1d6
++#define KEY_FN_F6		0x1d7
++#define KEY_FN_F7		0x1d8
++#define KEY_FN_F8		0x1d9
++#define KEY_FN_F9		0x1da
++#define KEY_FN_F10		0x1db
++#define KEY_FN_F11		0x1dc
++#define KEY_FN_F12		0x1dd
++#define KEY_FN_1		0x1de
++#define KEY_FN_2		0x1df
++#define KEY_FN_D		0x1e0
++#define KEY_FN_E		0x1e1
++#define KEY_FN_F		0x1e2
++#define KEY_FN_S		0x1e3
++#define KEY_FN_B		0x1e4
++
++#define KEY_BRL_DOT1		0x1f1
++#define KEY_BRL_DOT2		0x1f2
++#define KEY_BRL_DOT3		0x1f3
++#define KEY_BRL_DOT4		0x1f4
++#define KEY_BRL_DOT5		0x1f5
++#define KEY_BRL_DOT6		0x1f6
++#define KEY_BRL_DOT7		0x1f7
++#define KEY_BRL_DOT8		0x1f8
++#define KEY_BRL_DOT9		0x1f9
++#define KEY_BRL_DOT10		0x1fa
++
++#define KEY_NUMERIC_0		0x200	/* used by phones, remote controls, */
++#define KEY_NUMERIC_1		0x201	/* and other keypads */
++#define KEY_NUMERIC_2		0x202
++#define KEY_NUMERIC_3		0x203
++#define KEY_NUMERIC_4		0x204
++#define KEY_NUMERIC_5		0x205
++#define KEY_NUMERIC_6		0x206
++#define KEY_NUMERIC_7		0x207
++#define KEY_NUMERIC_8		0x208
++#define KEY_NUMERIC_9		0x209
++#define KEY_NUMERIC_STAR	0x20a
++#define KEY_NUMERIC_POUND	0x20b
++#define KEY_NUMERIC_A		0x20c	/* Phone key A - HUT Telephony 0xb9 */
++#define KEY_NUMERIC_B		0x20d
++#define KEY_NUMERIC_C		0x20e
++#define KEY_NUMERIC_D		0x20f
++
++#define KEY_CAMERA_FOCUS	0x210
++#define KEY_WPS_BUTTON		0x211	/* WiFi Protected Setup key */
++
++#define KEY_TOUCHPAD_TOGGLE	0x212	/* Request switch touchpad on or off */
++#define KEY_TOUCHPAD_ON		0x213
++#define KEY_TOUCHPAD_OFF	0x214
++
++#define KEY_CAMERA_ZOOMIN	0x215
++#define KEY_CAMERA_ZOOMOUT	0x216
++#define KEY_CAMERA_UP		0x217
++#define KEY_CAMERA_DOWN		0x218
++#define KEY_CAMERA_LEFT		0x219
++#define KEY_CAMERA_RIGHT	0x21a
++
++#define KEY_ATTENDANT_ON	0x21b
++#define KEY_ATTENDANT_OFF	0x21c
++#define KEY_ATTENDANT_TOGGLE	0x21d	/* Attendant call on or off */
++#define KEY_LIGHTS_TOGGLE	0x21e	/* Reading light on or off */
++
++#define BTN_DPAD_UP		0x220
++#define BTN_DPAD_DOWN		0x221
++#define BTN_DPAD_LEFT		0x222
++#define BTN_DPAD_RIGHT		0x223
++
++#define KEY_ALS_TOGGLE		0x230	/* Ambient light sensor */
++
++#define KEY_BUTTONCONFIG		0x240	/* AL Button Configuration */
++#define KEY_TASKMANAGER		0x241	/* AL Task/Project Manager */
++#define KEY_JOURNAL		0x242	/* AL Log/Journal/Timecard */
++#define KEY_CONTROLPANEL		0x243	/* AL Control Panel */
++#define KEY_APPSELECT		0x244	/* AL Select Task/Application */
++#define KEY_SCREENSAVER		0x245	/* AL Screen Saver */
++#define KEY_VOICECOMMAND		0x246	/* Listening Voice Command */
++
++#define KEY_BRIGHTNESS_MIN		0x250	/* Set Brightness to Minimum */
++#define KEY_BRIGHTNESS_MAX		0x251	/* Set Brightness to Maximum */
++
++#define KEY_KBDINPUTASSIST_PREV		0x260
++#define KEY_KBDINPUTASSIST_NEXT		0x261
++#define KEY_KBDINPUTASSIST_PREVGROUP		0x262
++#define KEY_KBDINPUTASSIST_NEXTGROUP		0x263
++#define KEY_KBDINPUTASSIST_ACCEPT		0x264
++#define KEY_KBDINPUTASSIST_CANCEL		0x265
++
++#define BTN_TRIGGER_HAPPY		0x2c0
++#define BTN_TRIGGER_HAPPY1		0x2c0
++#define BTN_TRIGGER_HAPPY2		0x2c1
++#define BTN_TRIGGER_HAPPY3		0x2c2
++#define BTN_TRIGGER_HAPPY4		0x2c3
++#define BTN_TRIGGER_HAPPY5		0x2c4
++#define BTN_TRIGGER_HAPPY6		0x2c5
++#define BTN_TRIGGER_HAPPY7		0x2c6
++#define BTN_TRIGGER_HAPPY8		0x2c7
++#define BTN_TRIGGER_HAPPY9		0x2c8
++#define BTN_TRIGGER_HAPPY10		0x2c9
++#define BTN_TRIGGER_HAPPY11		0x2ca
++#define BTN_TRIGGER_HAPPY12		0x2cb
++#define BTN_TRIGGER_HAPPY13		0x2cc
++#define BTN_TRIGGER_HAPPY14		0x2cd
++#define BTN_TRIGGER_HAPPY15		0x2ce
++#define BTN_TRIGGER_HAPPY16		0x2cf
++#define BTN_TRIGGER_HAPPY17		0x2d0
++#define BTN_TRIGGER_HAPPY18		0x2d1
++#define BTN_TRIGGER_HAPPY19		0x2d2
++#define BTN_TRIGGER_HAPPY20		0x2d3
++#define BTN_TRIGGER_HAPPY21		0x2d4
++#define BTN_TRIGGER_HAPPY22		0x2d5
++#define BTN_TRIGGER_HAPPY23		0x2d6
++#define BTN_TRIGGER_HAPPY24		0x2d7
++#define BTN_TRIGGER_HAPPY25		0x2d8
++#define BTN_TRIGGER_HAPPY26		0x2d9
++#define BTN_TRIGGER_HAPPY27		0x2da
++#define BTN_TRIGGER_HAPPY28		0x2db
++#define BTN_TRIGGER_HAPPY29		0x2dc
++#define BTN_TRIGGER_HAPPY30		0x2dd
++#define BTN_TRIGGER_HAPPY31		0x2de
++#define BTN_TRIGGER_HAPPY32		0x2df
++#define BTN_TRIGGER_HAPPY33		0x2e0
++#define BTN_TRIGGER_HAPPY34		0x2e1
++#define BTN_TRIGGER_HAPPY35		0x2e2
++#define BTN_TRIGGER_HAPPY36		0x2e3
++#define BTN_TRIGGER_HAPPY37		0x2e4
++#define BTN_TRIGGER_HAPPY38		0x2e5
++#define BTN_TRIGGER_HAPPY39		0x2e6
++#define BTN_TRIGGER_HAPPY40		0x2e7
++
++/* We avoid low common keys in module aliases so they don't get huge. */
++#define KEY_MIN_INTERESTING	KEY_MUTE
++#define KEY_MAX			0x2ff
++#define KEY_CNT			(KEY_MAX+1)
++
++/*
++ * Relative axes
++ */
++
++#define REL_X			0x00
++#define REL_Y			0x01
++#define REL_Z			0x02
++#define REL_RX			0x03
++#define REL_RY			0x04
++#define REL_RZ			0x05
++#define REL_HWHEEL		0x06
++#define REL_DIAL		0x07
++#define REL_WHEEL		0x08
++#define REL_MISC		0x09
++#define REL_MAX			0x0f
++#define REL_CNT			(REL_MAX+1)
++
++/*
++ * Absolute axes
++ */
++
++#define ABS_X			0x00
++#define ABS_Y			0x01
++#define ABS_Z			0x02
++#define ABS_RX			0x03
++#define ABS_RY			0x04
++#define ABS_RZ			0x05
++#define ABS_THROTTLE		0x06
++#define ABS_RUDDER		0x07
++#define ABS_WHEEL		0x08
++#define ABS_GAS			0x09
++#define ABS_BRAKE		0x0a
++#define ABS_HAT0X		0x10
++#define ABS_HAT0Y		0x11
++#define ABS_HAT1X		0x12
++#define ABS_HAT1Y		0x13
++#define ABS_HAT2X		0x14
++#define ABS_HAT2Y		0x15
++#define ABS_HAT3X		0x16
++#define ABS_HAT3Y		0x17
++#define ABS_PRESSURE		0x18
++#define ABS_DISTANCE		0x19
++#define ABS_TILT_X		0x1a
++#define ABS_TILT_Y		0x1b
++#define ABS_TOOL_WIDTH		0x1c
++
++#define ABS_VOLUME		0x20
++
++#define ABS_MISC		0x28
++
++#define ABS_MT_SLOT		0x2f	/* MT slot being modified */
++#define ABS_MT_TOUCH_MAJOR	0x30	/* Major axis of touching ellipse */
++#define ABS_MT_TOUCH_MINOR	0x31	/* Minor axis (omit if circular) */
++#define ABS_MT_WIDTH_MAJOR	0x32	/* Major axis of approaching ellipse */
++#define ABS_MT_WIDTH_MINOR	0x33	/* Minor axis (omit if circular) */
++#define ABS_MT_ORIENTATION	0x34	/* Ellipse orientation */
++#define ABS_MT_POSITION_X	0x35	/* Center X touch position */
++#define ABS_MT_POSITION_Y	0x36	/* Center Y touch position */
++#define ABS_MT_TOOL_TYPE	0x37	/* Type of touching device */
++#define ABS_MT_BLOB_ID		0x38	/* Group a set of packets as a blob */
++#define ABS_MT_TRACKING_ID	0x39	/* Unique ID of initiated contact */
++#define ABS_MT_PRESSURE		0x3a	/* Pressure on contact area */
++#define ABS_MT_DISTANCE		0x3b	/* Contact hover distance */
++#define ABS_MT_TOOL_X		0x3c	/* Center X tool position */
++#define ABS_MT_TOOL_Y		0x3d	/* Center Y tool position */
++
++
++#define ABS_MAX			0x3f
++#define ABS_CNT			(ABS_MAX+1)
++
++/*
++ * Switch events
++ */
++
++#define SW_LID			0x00  /* set = lid shut */
++#define SW_TABLET_MODE		0x01  /* set = tablet mode */
++#define SW_HEADPHONE_INSERT	0x02  /* set = inserted */
++#define SW_RFKILL_ALL		0x03  /* rfkill master switch, type "any"
++					 set = radio enabled */
++#define SW_RADIO		SW_RFKILL_ALL	/* deprecated */
++#define SW_MICROPHONE_INSERT	0x04  /* set = inserted */
++#define SW_DOCK			0x05  /* set = plugged into dock */
++#define SW_LINEOUT_INSERT	0x06  /* set = inserted */
++#define SW_JACK_PHYSICAL_INSERT 0x07  /* set = mechanical switch set */
++#define SW_VIDEOOUT_INSERT	0x08  /* set = inserted */
++#define SW_CAMERA_LENS_COVER	0x09  /* set = lens covered */
++#define SW_KEYPAD_SLIDE		0x0a  /* set = keypad slide out */
++#define SW_FRONT_PROXIMITY	0x0b  /* set = front proximity sensor active */
++#define SW_ROTATE_LOCK		0x0c  /* set = rotate locked/disabled */
++#define SW_LINEIN_INSERT	0x0d  /* set = inserted */
++#define SW_MUTE_DEVICE		0x0e  /* set = device disabled */
++#define SW_MAX			0x0f
++#define SW_CNT			(SW_MAX+1)
++
++/*
++ * Misc events
++ */
++
++#define MSC_SERIAL		0x00
++#define MSC_PULSELED		0x01
++#define MSC_GESTURE		0x02
++#define MSC_RAW			0x03
++#define MSC_SCAN		0x04
++#define MSC_TIMESTAMP		0x05
++#define MSC_MAX			0x07
++#define MSC_CNT			(MSC_MAX+1)
++
++/*
++ * LEDs
++ */
++
++#define LED_NUML		0x00
++#define LED_CAPSL		0x01
++#define LED_SCROLLL		0x02
++#define LED_COMPOSE		0x03
++#define LED_KANA		0x04
++#define LED_SLEEP		0x05
++#define LED_SUSPEND		0x06
++#define LED_MUTE		0x07
++#define LED_MISC		0x08
++#define LED_MAIL		0x09
++#define LED_CHARGING		0x0a
++#define LED_MAX			0x0f
++#define LED_CNT			(LED_MAX+1)
++
++/*
++ * Autorepeat values
++ */
++
++#define REP_DELAY		0x00
++#define REP_PERIOD		0x01
++#define REP_MAX			0x01
++#define REP_CNT			(REP_MAX+1)
++
++/*
++ * Sounds
++ */
++
++#define SND_CLICK		0x00
++#define SND_BELL		0x01
++#define SND_TONE		0x02
++#define SND_MAX			0x07
++#define SND_CNT			(SND_MAX+1)
++
++#endif

+ 0 - 60
package/boot/uboot-sunxi/patches/010-sunxi-support-smta.patch

@@ -1,60 +0,0 @@
-diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
-index dfb0a3e..7a6a3cc 100644
---- a/arch/arm/cpu/armv7/sunxi/Makefile
-+++ b/arch/arm/cpu/armv7/sunxi/Makefile
-@@ -33,6 +33,7 @@ obj-$(CONFIG_MACH_SUN8I)	+= clock_sun6i.o
- endif
- obj-$(CONFIG_MACH_SUN9I)	+= clock_sun9i.o
- obj-$(CONFIG_MACH_SUN6I)	+= tzpc.o
-+obj-$(CONFIG_MACH_SUN8I)	+= tzpc.o
- 
- obj-$(CONFIG_AXP152_POWER)	+= pmic_bus.o
- obj-$(CONFIG_AXP209_POWER)	+= pmic_bus.o
-diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
-index 5c9c69b..6c8a0fd 100644
---- a/arch/arm/cpu/armv7/sunxi/tzpc.c
-+++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
-@@ -13,6 +13,15 @@ void tzpc_init(void)
- {
- 	struct sunxi_tzpc *tzpc = (struct sunxi_tzpc *)SUNXI_TZPC_BASE;
- 
-+#ifdef CONFIG_MACH_SUN6I
- 	/* Enable non-secure access to the RTC */
--	writel(SUNXI_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
-+	writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
-+#endif
-+
-+#ifdef CONFIG_MACH_SUN8I_H3
-+	/* Enable non-secure access to all peripherals */
-+	writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
-+	writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
-+	writel(SUN8I_H3_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
-+#endif
- }
-diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h
-index ba4d43b..95c55cd 100644
---- a/arch/arm/include/asm/arch-sunxi/tzpc.h
-+++ b/arch/arm/include/asm/arch-sunxi/tzpc.h
-@@ -13,10 +13,21 @@ struct sunxi_tzpc {
- 	u32 decport0_status;	/* 0x04 Status of decode protection port 0 */
- 	u32 decport0_set;	/* 0x08 Set decode protection port 0 */
- 	u32 decport0_clear;	/* 0x0c Clear decode protection port 0 */
-+	/* For A80 and later SoCs */
-+	u32 decport1_status;	/* 0x10 Status of decode protection port 1 */
-+	u32 decport1_set;	/* 0x14 Set decode protection port 1 */
-+	u32 decport1_clear;	/* 0x18 Clear decode protection port 1 */
-+	u32 decport2_status;	/* 0x1c Status of decode protection port 2 */
-+	u32 decport2_set;	/* 0x20 Set decode protection port 2 */
-+	u32 decport2_clear;	/* 0x24 Clear decode protection port 2 */
- };
- #endif
- 
--#define SUNXI_TZPC_DECPORT0_RTC	(1 << 1)
-+#define SUN6I_TZPC_DECPORT0_RTC	(1 << 1)
-+
-+#define SUN8I_H3_TZPC_DECPORT0_ALL  0xbe
-+#define SUN8I_H3_TZPC_DECPORT1_ALL  0xff
-+#define SUN8I_H3_TZPC_DECPORT2_ALL  0x7f
- 
- void tzpc_init(void);
- 

+ 7354 - 0
package/boot/uboot-sunxi/patches/011-dt-sync-dts-files-with-kernel.patch

@@ -0,0 +1,7354 @@
+From 80e5f83c0fc4bf42110cc55ce671ad7ddc7b08a4 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Mon, 14 Mar 2016 17:37:09 +0100
+Subject: [PATCH] sunxi: Sync dts files with the upstream kernel
+
+Sync dts files with the upstream kernel including
+changes queued for 4.6:
+
+https://git.kernel.org/cgit/linux/kernel/git/mripard/linux.git/commit/?h=sunxi/dt-for-4.6
+
+Note this adds a number of new unused board dts files. I've asked the
+authors of the kernel commits adding these to submit a matching defconfig
+to u-boot.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ arch/arm/dts/Makefile                              |   8 +-
+ arch/arm/dts/axp22x.dtsi                           | 145 ++++++++++++
+ arch/arm/dts/sun4i-a10-a1000.dts                   |   4 +
+ arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts         |  22 ++
+ arch/arm/dts/sun4i-a10-cubieboard.dts              |   4 +
+ arch/arm/dts/sun4i-a10-gemei-g9.dts                |  63 +++++-
+ arch/arm/dts/sun4i-a10-inet1.dts                   |  48 ++++
+ arch/arm/dts/sun4i-a10-inet97fv2.dts               | 127 ++++++++++-
+ arch/arm/dts/sun4i-a10-inet9f-rev03.dts            | 181 +++++++++++++++
+ arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts    |  86 +------
+ arch/arm/dts/sun4i-a10-jesurun-q5.dts              |  15 ++
+ arch/arm/dts/sun4i-a10-marsboard.dts               |  23 ++
+ arch/arm/dts/sun4i-a10-mk802.dts                   |  37 +++
+ arch/arm/dts/sun4i-a10-olinuxino-lime.dts          |  12 +
+ arch/arm/dts/sun4i-a10-pcduino.dts                 |  58 ++++-
+ arch/arm/dts/sun4i-a10-pcduino2.dts                |  78 +++++++
+ arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts        |  69 ++++++
+ arch/arm/dts/sun4i-a10.dtsi                        | 153 +++++++++++--
+ arch/arm/dts/sun5i-a10s-auxtek-t004.dts            |  14 ++
+ arch/arm/dts/sun5i-a10s-olinuxino-micro.dts        |   2 +-
+ arch/arm/dts/sun5i-a13-empire-electronix-d709.dts  |  19 +-
+ arch/arm/dts/sun5i-a13-inet-98v-rev2.dts           |  26 +--
+ arch/arm/dts/sun5i-a13-utoo-p66.dts                |  30 +++
+ arch/arm/dts/sun5i-q8-common.dtsi                  |  10 +
+ arch/arm/dts/sun5i-r8-chip.dts                     |  47 +++-
+ arch/arm/dts/sun5i.dtsi                            |  31 +++
+ arch/arm/dts/sun6i-a31-colombus.dts                |  24 ++
+ arch/arm/dts/sun6i-a31-hummingbird.dts             | 132 ++++++-----
+ arch/arm/dts/sun6i-a31.dtsi                        |  65 +++++-
+ arch/arm/dts/sun6i-a31s-primo81.dts                | 247 ++++++++++++++++++++-
+ arch/arm/dts/sun6i-a31s-sina31s-core.dtsi          | 142 ++++++++++++
+ arch/arm/dts/sun6i-a31s-sina31s.dts                | 153 +++++++++++++
+ .../arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts | 205 +++++++++++++++++
+ arch/arm/dts/sun7i-a20-bananapi.dts                |  78 ++++++-
+ arch/arm/dts/sun7i-a20-cubieboard2.dts             |  23 ++
+ arch/arm/dts/sun7i-a20-cubietruck.dts              |   4 +
+ arch/arm/dts/sun7i-a20-icnova-swac.dts             | 169 ++++++++++++++
+ arch/arm/dts/sun7i-a20-itead-ibox.dts              | 125 +++++++++++
+ arch/arm/dts/sun7i-a20-lamobo-r1.dts               |  10 -
+ arch/arm/dts/sun7i-a20-mk808c.dts                  |  39 ++++
+ arch/arm/dts/sun7i-a20-olimex-som-evb.dts          |  95 ++++++--
+ arch/arm/dts/sun7i-a20-olinuxino-lime.dts          |  12 +
+ arch/arm/dts/sun7i-a20-olinuxino-lime2.dts         |  47 ++++
+ arch/arm/dts/sun7i-a20-olinuxino-micro.dts         |   6 +
+ arch/arm/dts/sun7i-a20-orangepi-mini.dts           |  33 +++
+ arch/arm/dts/sun7i-a20-orangepi.dts                |  29 +++
+ arch/arm/dts/sun7i-a20-pcduino3-nano.dts           |  69 +++++-
+ arch/arm/dts/sun7i-a20-pcduino3.dts                |  58 ++++-
+ arch/arm/dts/sun7i-a20-wexler-tab7200.dts          |  90 +++++++-
+ arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts        | 187 +++++++++++++++-
+ arch/arm/dts/sun7i-a20.dtsi                        | 113 +++++++++-
+ arch/arm/dts/sun8i-a23-a33.dtsi                    |  71 ++++--
+ arch/arm/dts/sun8i-a23-gt90h-v4.dts                | 120 +++++++++-
+ arch/arm/dts/sun8i-a23.dtsi                        |  25 +++
+ arch/arm/dts/sun8i-a33-sinlinx-sina33.dts          |  83 ++++++-
+ arch/arm/dts/sun8i-a33.dtsi                        |  45 ++++
+ arch/arm/dts/sun8i-a83t-cubietruck-plus.dts        |  65 ++++++
+ arch/arm/dts/sun8i-a83t.dtsi                       | 125 +++++------
+ arch/arm/dts/sun8i-h3-orangepi-pc.dts              |  69 ++++++
+ arch/arm/dts/sun8i-h3-orangepi-plus.dts            |  63 ++++++
+ arch/arm/dts/sun8i-h3.dtsi                         | 189 +++++++++++-----
+ arch/arm/dts/sun8i-q8-common.dtsi                  |  96 +++++++-
+ arch/arm/dts/sun9i-a80-cubieboard4.dts             |  36 +++
+ arch/arm/dts/sun9i-a80-optimus.dts                 |  48 ++--
+ arch/arm/dts/sun9i-a80.dtsi                        | 204 +++++++++++++++--
+ arch/arm/dts/sunxi-itead-core-common.dtsi          | 136 ++++++++++++
+ arch/arm/dts/sunxi-q8-common.dtsi                  |   6 +
+ 67 files changed, 4351 insertions(+), 497 deletions(-)
+ create mode 100644 arch/arm/dts/axp22x.dtsi
+ create mode 100644 arch/arm/dts/sun4i-a10-pcduino2.dts
+ create mode 100644 arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
+ create mode 100644 arch/arm/dts/sun6i-a31s-sina31s.dts
+ create mode 100644 arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+ create mode 100644 arch/arm/dts/sun7i-a20-icnova-swac.dts
+ create mode 100644 arch/arm/dts/sun7i-a20-itead-ibox.dts
+ create mode 100644 arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
+ create mode 100644 arch/arm/dts/sunxi-itead-core-common.dtsi
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index 578038b..0cea4b4 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -126,6 +126,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \
+ 	sun4i-a10-mk802ii.dtb \
+ 	sun4i-a10-olinuxino-lime.dtb \
+ 	sun4i-a10-pcduino.dtb \
++	sun4i-a10-pcduino2.dtb \
+ 	sun4i-a10-pov-protab2-ips9.dtb
+ dtb-$(CONFIG_MACH_SUN5I) += \
+ 	sun5i-a10s-auxtek-t003.dtb \
+@@ -154,7 +155,9 @@ dtb-$(CONFIG_MACH_SUN6I) += \
+ 	sun6i-a31-mixtile-loftq.dtb \
+ 	sun6i-a31s-cs908.dtb \
+ 	sun6i-a31s-primo81.dtb \
+-	sun6i-a31s-sinovoip-bpi-m2.dtb
++	sun6i-a31s-sina31s.dtb \
++	sun6i-a31s-sinovoip-bpi-m2.dtb \
++	sun6i-a31s-yones-toptech-bs1078-v2.dtb
+ dtb-$(CONFIG_MACH_SUN7I) += \
+ 	sun7i-a20-ainol-aw1.dtb \
+ 	sun7i-a20-bananapi.dtb \
+@@ -163,6 +166,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
+ 	sun7i-a20-cubietruck.dtb \
+ 	sun7i-a20-hummingbird.dtb \
+ 	sun7i-a20-i12-tvbox.dtb \
++	sun7i-a20-icnova-swac.dtb \
++	sun7i-a20-itead-ibox.dtb \
+ 	sun7i-a20-lamobo-r1.dtb \
+ 	sun7i-a20-m3.dtb \
+ 	sun7i-a20-m5.dtb \
+@@ -189,6 +194,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \
+ 	sun8i-a33-sinlinx-sina33.dtb
+ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
+ 	sun8i-a83t-allwinner-h8homlet-v2.dtb \
++	sun8i-a83t-cubietruck-plus.dtb \
+ 	sun8i-a83t-sinovoip-bpi-m3.dtb
+ dtb-$(CONFIG_MACH_SUN8I_H3) += \
+ 	sun8i-h3-orangepi-pc.dtb \
+diff --git a/arch/arm/dts/axp22x.dtsi b/arch/arm/dts/axp22x.dtsi
+new file mode 100644
+index 0000000..0cfec50
+--- /dev/null
++++ b/arch/arm/dts/axp22x.dtsi
+@@ -0,0 +1,145 @@
++/*
++ * Copyright 2015 Chen-Yu Tsai
++ *
++ * Chen-Yu Tsai <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/*
++ * AXP221/221s/223 Integrated Power Management Chip
++ * http://www.x-powers.com/product/AXP22X.php
++ * http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf
++ */
++
++&axp22x {
++	interrupt-controller;
++	#interrupt-cells = <1>;
++
++	regulators {
++		/* Default work frequency for buck regulators */
++		x-powers,dcdc-freq = <3000>;
++
++		reg_dcdc1: dcdc1 {
++			regulator-name = "dcdc1";
++		};
++
++		reg_dcdc2: dcdc2 {
++			regulator-name = "dcdc2";
++		};
++
++		reg_dcdc3: dcdc3 {
++			regulator-name = "dcdc3";
++		};
++
++		reg_dcdc4: dcdc4 {
++			regulator-name = "dcdc4";
++		};
++
++		reg_dcdc5: dcdc5 {
++			regulator-name = "dcdc5";
++		};
++
++		reg_dc1sw: dc1sw {
++			regulator-name = "dc1sw";
++		};
++
++		reg_dc5ldo: dc5ldo {
++			regulator-name = "dc5ldo";
++		};
++
++		reg_aldo1: aldo1 {
++			regulator-name = "aldo1";
++		};
++
++		reg_aldo2: aldo2 {
++			regulator-name = "aldo2";
++		};
++
++		reg_aldo3: aldo3 {
++			regulator-name = "aldo3";
++		};
++
++		reg_dldo1: dldo1 {
++			regulator-name = "dldo1";
++		};
++
++		reg_dldo2: dldo2 {
++			regulator-name = "dldo2";
++		};
++
++		reg_dldo3: dldo3 {
++			regulator-name = "dldo3";
++		};
++
++		reg_dldo4: dldo4 {
++			regulator-name = "dldo4";
++		};
++
++		reg_eldo1: eldo1 {
++			regulator-name = "eldo1";
++		};
++
++		reg_eldo2: eldo2 {
++			regulator-name = "eldo2";
++		};
++
++		reg_eldo3: eldo3 {
++			regulator-name = "eldo3";
++		};
++
++		reg_ldo_io0: ldo_io0 {
++			regulator-name = "ldo_io0";
++			status = "disabled";
++		};
++
++		reg_ldo_io1: ldo_io1 {
++			regulator-name = "ldo_io1";
++			status = "disabled";
++		};
++
++		reg_rtc_ldo: rtc_ldo {
++			/* RTC_LDO is a fixed, always-on regulator */
++			regulator-always-on;
++			regulator-min-microvolt = <3000000>;
++			regulator-max-microvolt = <3000000>;
++			regulator-name = "rtc_ldo";
++		};
++	};
++};
+diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts
+index 2630d78..97570cb 100644
+--- a/arch/arm/dts/sun4i-a10-a1000.dts
++++ b/arch/arm/dts/sun4i-a10-a1000.dts
+@@ -93,6 +93,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
+index 1430568..023b03e 100644
+--- a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
++++ b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
+@@ -45,6 +45,7 @@
+ #include "sunxi-common-regulators.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+ 
+ / {
+ 	model = "Chuwi V7 CW0825";
+@@ -78,6 +79,27 @@
+ 	};
+ };
+ 
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins_a>;
++	status = "okay";
++
++	ft5306de4: touchscreen@38 {
++		compatible = "edt,edt-ft5406";
++		reg = <0x38>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
++		touchscreen-size-x = <1024>;
++		touchscreen-size-y = <768>;
++	};
++};
++
+ &lradc {
+ 	vref-supply = <&reg_vcc3v0>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun4i-a10-cubieboard.dts b/arch/arm/dts/sun4i-a10-cubieboard.dts
+index 046a84d..710e2ef 100644
+--- a/arch/arm/dts/sun4i-a10-cubieboard.dts
++++ b/arch/arm/dts/sun4i-a10-cubieboard.dts
+@@ -83,6 +83,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+diff --git a/arch/arm/dts/sun4i-a10-gemei-g9.dts b/arch/arm/dts/sun4i-a10-gemei-g9.dts
+index 570754d..ac64781 100644
+--- a/arch/arm/dts/sun4i-a10-gemei-g9.dts
++++ b/arch/arm/dts/sun4i-a10-gemei-g9.dts
+@@ -47,6 +47,7 @@
+ #include "sunxi-common-regulators.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+ 
+ / {
+ 	model = "Gemei G9 Tablet";
+@@ -64,12 +65,22 @@
+ /*
+  * TODO:
+  *   2x cameras via CSI
+- *   bma250 IRQs
+  *   AXP battery management
+  *   NAND
+  *   OTG
+  *   Touchscreen - gt801_2plus1 @ i2c adapter 2 @ 0x48
+  */
++&codec {
++	/* PH15 controls power to external amplifier (ft2012q) */
++	pinctrl-names = "default";
++	pinctrl-0 = <&codec_pa_pin>;
++	allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>;
++	status = "okay";
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
+ 
+ &ehci0 {
+ 	status = "okay";
+@@ -85,15 +96,13 @@
+ 	status = "okay";
+ 
+ 	axp209: pmic@34 {
+-		compatible = "x-powers,axp209";
+ 		reg = <0x34>;
+ 		interrupts = <0>;
+-
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
+ 	};
+ };
+ 
++#include "axp209.dtsi"
++
+ &i2c1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins_a>;
+@@ -103,17 +112,13 @@
+ 	bma250@18 {
+ 		compatible = "bosch,bma250";
+ 		reg = <0x18>;
+-
+-		/*
+-		 * TODO: interrupt pins:
+-		 * int1 - PH00
+-		 * int2 - PI10
+-		 */
++		interrupt-parent = <&pio>;
++		interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH00 / EINT0 */
+ 	};
+ };
+ 
+ &lradc {
+-	vref-supply = <&reg_vcc3v0>;
++	vref-supply = <&reg_ldo2>;
+ 
+ 	status = "okay";
+ 
+@@ -149,6 +154,40 @@
+ 	status = "okay";
+ };
+ 
++&pio {
++	codec_pa_pin: codec_pa_pin@0 {
++		allwinner,pins = "PH15";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1250000>;
++	regulator-max-microvolt = <1250000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun4i-a10-inet1.dts b/arch/arm/dts/sun4i-a10-inet1.dts
+index 487ce63..e09053b 100644
+--- a/arch/arm/dts/sun4i-a10-inet1.dts
++++ b/arch/arm/dts/sun4i-a10-inet1.dts
+@@ -47,6 +47,7 @@
+ #include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
++#include <dt-bindings/pwm/pwm.h>
+ 
+ / {
+ 	model = "iNet-1";
+@@ -56,11 +57,25 @@
+ 		serial0 = &uart0;
+ 	};
+ 
++	backlight: backlight {
++		compatible = "pwm-backlight";
++		pinctrl-names = "default";
++		pinctrl-0 = <&bl_en_pin_inet>;
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <8>;
++		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+@@ -104,6 +119,19 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c2_pins_a>;
+ 	status = "okay";
++
++	ft5x: touchscreen@38 {
++		compatible = "edt,edt-ft5406";
++		reg = <0x38>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&touchscreen_wake_pin>;
++		wake-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* PB13 */
++		touchscreen-size-x = <600>;
++		touchscreen-size-y = <1024>;
++		touchscreen-swapped-x-y;
++	};
+ };
+ 
+ &lradc {
+@@ -151,6 +179,20 @@
+ };
+ 
+ &pio {
++	bl_en_pin_inet: bl_en_pin@0 {
++		allwinner,pins = "PH7";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	touchscreen_wake_pin: touchscreen_wake_pin@0 {
++		allwinner,pins = "PB13";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	usb0_id_detect_pin: usb0_id_detect_pin@0 {
+ 		allwinner,pins = "PH4";
+ 		allwinner,function = "gpio_in";
+@@ -166,6 +208,12 @@
+ 	};
+ };
+ 
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm0_pins_a>;
++	status = "okay";
++};
++
+ &reg_dcdc2 {
+ 	regulator-always-on;
+ 	regulator-min-microvolt = <1000000>;
+diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sun4i-a10-inet97fv2.dts
+index 6c927a8..04b0d2d 100644
+--- a/arch/arm/dts/sun4i-a10-inet97fv2.dts
++++ b/arch/arm/dts/sun4i-a10-inet97fv2.dts
+@@ -47,6 +47,8 @@
+ #include "sunxi-common-regulators.dtsi"
+ 
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+ 
+ / {
+ 	model = "INet-97F Rev 02";
+@@ -61,8 +63,8 @@
+ 	};
+ };
+ 
+-&ehci0 {
+-	status = "okay";
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
+ };
+ 
+ &ehci1 {
+@@ -75,12 +77,71 @@
+ 	status = "okay";
+ 
+ 	axp209: pmic@34 {
+-		compatible = "x-powers,axp209";
+ 		reg = <0x34>;
+ 		interrupts = <0>;
++	};
++};
++
++#include "axp209.dtsi"
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins_a>;
++	status = "okay";
++
++	ft5406ee8: touchscreen@38 {
++		compatible = "edt,edt-ft5406";
++		reg = <0x38>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
++		touchscreen-size-x = <800>;
++		touchscreen-size-y = <480>;
++	};
++};
++
++&lradc {
++	vref-supply = <&reg_ldo2>;
++	status = "okay";
++
++	button@200 {
++		label = "Menu";
++		linux,code = <KEY_MENU>;
++		channel = <0>;
++		voltage = <200000>;
++	};
++
++	button@600 {
++		label = "Volume Up";
++		linux,code = <KEY_VOLUMEUP>;
++		channel = <0>;
++		voltage = <600000>;
++	};
+ 
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
++	button@800 {
++		label = "Volume Down";
++		linux,code = <KEY_VOLUMEDOWN>;
++		channel = <0>;
++		voltage = <800000>;
++	};
++
++	button@1000 {
++		label = "Home";
++		linux,code = <KEY_HOMEPAGE>;
++		channel = <0>;
++		voltage = <1000000>;
++	};
++
++	button@1200 {
++		label = "Esc";
++		linux,code = <KEY_ESC>;
++		channel = <0>;
++		voltage = <1200000>;
+ 	};
+ };
+ 
+@@ -94,15 +155,52 @@
+ 	status = "okay";
+ };
+ 
+-&ohci0 {
++&otg_sram {
+ 	status = "okay";
+ };
+ 
+-&ohci1 {
+-	status = "okay";
++&pio {
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
++	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
++		allwinner,pins = "PH5";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
++	};
++};
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
+ };
+ 
+-&reg_usb1_vbus {
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1250000>;
++	regulator-max-microvolt = <1250000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
++&reg_usb0_vbus {
+ 	status = "okay";
+ };
+ 
+@@ -116,8 +214,17 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
+-	usb1_vbus-supply = <&reg_usb1_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
+index 8446465..bba4f9c 100644
+--- a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
++++ b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
+@@ -59,6 +59,159 @@
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
++
++	gpio_keys {
++		compatible = "gpio-keys-polled";
++		pinctrl-names = "default";
++		pinctrl-0 = <&key_pins_inet9f>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++		poll-interval = <20>;
++
++		button@0 {
++			label = "Left Joystick Left";
++			linux,code = <ABS_X>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <0xffffffff>; /* -1 */
++			gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */
++		};
++
++		button@1 {
++			label = "Left Joystick Right";
++			linux,code = <ABS_X>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <1>;
++			gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */
++		};
++
++		button@2 {
++			label = "Left Joystick Up";
++			linux,code = <ABS_Y>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <0xffffffff>; /* -1 */
++			gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
++		};
++
++		button@3 {
++			label = "Left Joystick Down";
++			linux,code = <ABS_Y>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <1>;
++			gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
++		};
++
++		button@4 {
++			label = "Right Joystick Left";
++			linux,code = <ABS_Z>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <0xffffffff>; /* -1 */
++			gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */
++		};
++
++		button@5 {
++			label = "Right Joystick Right";
++			linux,code = <ABS_Z>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <1>;
++			gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
++		};
++
++		button@6 {
++			label = "Right Joystick Up";
++			linux,code = <ABS_RZ>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <0xffffffff>; /* -1 */
++			gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */
++		};
++
++		button@7 {
++			label = "Right Joystick Down";
++			linux,code = <ABS_RZ>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <1>;
++			gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
++		};
++
++		button@8 {
++			label = "DPad Left";
++			linux,code = <ABS_HAT0X>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <0xffffffff>; /* -1 */
++			gpios = <&pio 7 23 GPIO_ACTIVE_LOW>; /* PH23 */
++		};
++
++		button@9 {
++			label = "DPad Right";
++			linux,code = <ABS_HAT0X>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <1>;
++			gpios = <&pio 7 24 GPIO_ACTIVE_LOW>; /* PH24 */
++		};
++
++		button@10 {
++			label = "DPad Up";
++			linux,code = <ABS_HAT0Y>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <0xffffffff>; /* -1 */
++			gpios = <&pio 7 25 GPIO_ACTIVE_LOW>; /* PH25 */
++		};
++
++		button@11 {
++			label = "DPad Down";
++			linux,code = <ABS_HAT0Y>;
++			linux,input-type = <EV_ABS>;
++			linux,input-value = <1>;
++			gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */
++		};
++
++		button@12 {
++			label = "Button X";
++			linux,code = <BTN_X>;
++			gpios = <&pio 0 16 GPIO_ACTIVE_LOW>; /* PA16 */
++		};
++
++		button@13 {
++			label = "Button Y";
++			linux,code = <BTN_Y>;
++			gpios = <&pio 0 14 GPIO_ACTIVE_LOW>; /* PA14 */
++		};
++
++		button@14 {
++			label = "Button A";
++			linux,code = <BTN_A>;
++			gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
++		};
++
++		button@15 {
++			label = "Button B";
++			linux,code = <BTN_B>;
++			gpios = <&pio 0 15 GPIO_ACTIVE_LOW>; /* PA15 */
++		};
++
++		button@16 {
++			label = "Select Button";
++			linux,code = <BTN_SELECT>;
++			gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */
++		};
++
++		button@17 {
++			label = "Start Button";
++			linux,code = <BTN_START>;
++			gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */
++		};
++
++		button@18 {
++			label = "Top Left Button";
++			linux,code = <BTN_TL>;
++			gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
++		};
++
++		button@19 {
++			label = "Top Right Button";
++			linux,code = <BTN_TR>;
++			gpios = <&pio 0 13 GPIO_ACTIVE_LOW>; /* PA13 */
++		};
++	};
+ };
+ 
+ &cpu0 {
+@@ -86,12 +239,29 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins_a>;
+ 	status = "okay";
++
++	/* Accelerometer */
++	bma250@18 {
++		compatible = "bosch,bma250";
++		reg = <0x18>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */
++	};
+ };
+ 
+ &i2c2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c2_pins_a>;
+ 	status = "okay";
++
++	ft5406ee8: touchscreen@38 {
++		compatible = "edt,edt-ft5406";
++		reg = <0x38>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
++		touchscreen-size-x = <800>;
++		touchscreen-size-y = <480>;
++	};
+ };
+ 
+ &lradc {
+@@ -149,6 +319,17 @@
+ };
+ 
+ &pio {
++	key_pins_inet9f: key_pins@0 {
++		allwinner,pins = "PA0", "PA1", "PA3", "PA4",
++				 "PA5", "PA6", "PA8", "PA9",
++				 "PA11", "PA12", "PA13",
++				 "PA14", "PA15", "PA16", "PA17",
++				 "PH22", "PH23", "PH24", "PH25", "PH26";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
+ 	usb0_id_detect_pin: usb0_id_detect_pin@0 {
+ 		allwinner,pins = "PH4";
+ 		allwinner,function = "gpio_in";
+diff --git a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts
+index 985e155..4e798f0 100644
+--- a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts
++++ b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright 2015 Josef Gajdusek <[email protected]>
++ * Copyright 2015 - Marcus Cooper <[email protected]>
+  *
+  * This file is dual-licensed: you can use it either under the terms
+  * of the GPL or the X11 license, at your option. Note that this dual
+@@ -42,22 +43,11 @@
+ 
+ /dts-v1/;
+ #include "sun4i-a10.dtsi"
+-#include "sunxi-common-regulators.dtsi"
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/pinctrl/sun4i-a10.h>
++#include "sunxi-itead-core-common.dtsi"
+ 
+ / {
+ 	model = "Iteaduino Plus A10";
+ 	compatible = "itead,iteaduino-plus-a10", "allwinner,sun4i-a10";
+-
+-	aliases {
+-		serial0 = &uart0;
+-	};
+-
+-	chosen {
+-		stdout-path = "serial0:115200n8";
+-	};
+ };
+ 
+ &ahci {
+@@ -65,18 +55,6 @@
+ 	status = "okay";
+ };
+ 
+-&cpu0 {
+-	cpu-supply = <&reg_dcdc2>;
+-};
+-
+-&ehci0 {
+-	status = "okay";
+-};
+-
+-&ehci1 {
+-	status = "okay";
+-};
+-
+ &emac {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&emac_pins_a>;
+@@ -89,12 +67,7 @@
+ };
+ 
+ &i2c0 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&i2c0_pins_a>;
+-	status = "okay";
+-
+ 	axp209: pmic@34 {
+-		reg = <0x34>;
+ 		interrupts = <0>;
+ 	};
+ };
+@@ -135,68 +108,13 @@
+ 	status = "okay";
+ };
+ 
+-&ohci0 {
+-	status = "okay";
+-};
+-
+-&ohci1 {
+-	status = "okay";
+-};
+-
+ &reg_ahci_5v {
+ 	status = "okay";
+ };
+ 
+-#include "axp209.dtsi"
+-
+-&reg_dcdc2 {
+-	regulator-always-on;
+-	regulator-min-microvolt = <1000000>;
+-	regulator-max-microvolt = <1450000>;
+-	regulator-name = "vdd-cpu";
+-};
+-
+-&reg_dcdc3 {
+-	regulator-always-on;
+-	regulator-min-microvolt = <1000000>;
+-	regulator-max-microvolt = <1400000>;
+-	regulator-name = "vdd-int-dll";
+-};
+-
+-&reg_ldo1 {
+-	regulator-name = "vdd-rtc";
+-};
+-
+-&reg_ldo2 {
+-	regulator-always-on;
+-	regulator-min-microvolt = <3000000>;
+-	regulator-max-microvolt = <3000000>;
+-	regulator-name = "avcc";
+-};
+-
+-&reg_usb1_vbus {
+-	status = "okay";
+-};
+-
+-&reg_usb2_vbus {
+-	status = "okay";
+-};
+-
+ &spi0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&spi0_pins_a>,
+ 		    <&spi0_cs0_pins_a>;
+ 	status = "okay";
+ };
+-
+-&uart0 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&uart0_pins_a>;
+-	status = "okay";
+-};
+-
+-&usbphy {
+-	usb1_vbus-supply = <&reg_usb1_vbus>;
+-	usb2_vbus-supply = <&reg_usb2_vbus>;
+-	status = "okay";
+-};
+diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
+index dc2f2ae..7afc7a6 100644
+--- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts
++++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
+@@ -156,6 +156,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	emac_power_pin_q5: emac_power_pin@0 {
+ 		allwinner,pins = "PH19";
+@@ -172,6 +176,11 @@
+ 	};
+ };
+ 
++&reg_usb0_vbus {
++	regulator-boot-on;
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -186,7 +195,13 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "host";
++	status = "okay";
++};
++
+ &usbphy {
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun4i-a10-marsboard.dts b/arch/arm/dts/sun4i-a10-marsboard.dts
+index 02158bc..8e50723 100644
+--- a/arch/arm/dts/sun4i-a10-marsboard.dts
++++ b/arch/arm/dts/sun4i-a10-marsboard.dts
+@@ -91,6 +91,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -154,6 +158,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	led_pins_marsboard: led_pins@0 {
+ 		allwinner,pins = "PB5", "PB6", "PB7", "PB8";
+@@ -161,6 +169,13 @@
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
+ };
+ 
+ &reg_usb1_vbus {
+@@ -184,7 +199,15 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun4i-a10-mk802.dts
+index 3c7eebe..ee46ea8 100644
+--- a/arch/arm/dts/sun4i-a10-mk802.dts
++++ b/arch/arm/dts/sun4i-a10-mk802.dts
+@@ -44,6 +44,7 @@
+ #include "sun4i-a10.dtsi"
+ #include "sunxi-common-regulators.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+ / {
+ 	model = "MK802";
+@@ -58,6 +59,10 @@
+ 	};
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -80,7 +85,25 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
++		allwinner,pins = "PH5";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	usb2_vbus_pin_mk802: usb2_vbus_pin@0 {
+ 		allwinner,pins = "PH12";
+ 		allwinner,function = "gpio_out";
+@@ -89,6 +112,10 @@
+ 	};
+ };
+ 
++&reg_usb0_vbus {
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -105,7 +132,17 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
++	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
+index 28e32ad..b350448 100644
+--- a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
++++ b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
+@@ -124,6 +124,18 @@
+ 	};
+ };
+ 
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++
++	eeprom: eeprom@50 {
++		compatible = "atmel,24c16";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++};
++
+ &mdio {
+ 	status = "okay";
+ 
+diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts
+index 4e3e1b9..39034aa 100644
+--- a/arch/arm/dts/sun4i-a10-pcduino.dts
++++ b/arch/arm/dts/sun4i-a10-pcduino.dts
+@@ -104,6 +104,10 @@
+ 	};
+ };
+ 
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -129,12 +133,8 @@
+ 	status = "okay";
+ 
+ 	axp209: pmic@34 {
+-		compatible = "x-powers,axp209";
+ 		reg = <0x34>;
+ 		interrupts = <0>;
+-
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
+ 	};
+ };
+ 
+@@ -164,6 +164,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	led_pins_pcduino: led_pins@0 {
+ 		allwinner,pins = "PH15", "PH16";
+@@ -178,14 +182,40 @@
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
+ };
+ 
+-&reg_usb1_vbus {
+-	status = "okay";
++#include "axp209.dtsi"
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
+ };
+ 
+-&reg_usb2_vbus {
+-	status = "okay";
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
+ };
+ 
+ &uart0 {
+@@ -194,8 +224,16 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
+-	usb1_vbus-supply = <&reg_usb1_vbus>;
+-	usb2_vbus-supply = <&reg_usb2_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb1_vbus-supply = <&reg_vcc5v0>; /* USB1 VBUS is always on */
++	usb2_vbus-supply = <&reg_vcc5v0>; /* USB2 VBUS is always on */
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun4i-a10-pcduino2.dts b/arch/arm/dts/sun4i-a10-pcduino2.dts
+new file mode 100644
+index 0000000..de483a1
+--- /dev/null
++++ b/arch/arm/dts/sun4i-a10-pcduino2.dts
+@@ -0,0 +1,78 @@
++/*
++ * Copyright 2015 Siarhei Siamashka <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/*
++ * The LinkSprite pcDuino2 board is almost identical to the older
++ * LinkSprite pcDuino1 board. The only software visible difference
++ * is that the pcDuino2 board got a USB VBUS voltage regulator, which
++ * is controlled by the PD2 pin (pulled-up by default). Also one of
++ * the USB host ports has been replaced with a USB WIFI chip.
++ */
++
++#include "sun4i-a10-pcduino.dts"
++
++/ {
++	model = "LinkSprite pcDuino2";
++	compatible = "linksprite,a10-pcduino2", "allwinner,sun4i-a10";
++};
++
++&pio {
++	usb2_vbus_pin_pcduino2: usb2_vbus_pin@0 {
++		allwinner,pins = "PD2";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&reg_usb2_vbus {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb2_vbus_pin_pcduino2>;
++	gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>;
++	status = "okay";
++};
++
++&usbphy {
++	usb1_vbus-supply = <&reg_vcc3v3>; /* USB WIFI is always on */
++	usb2_vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts
+index 223515e..ea90634 100644
+--- a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts
++++ b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts
+@@ -47,6 +47,7 @@
+ #include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
++#include <dt-bindings/pwm/pwm.h>
+ 
+ / {
+ 	model = "Point of View Protab2-IPS9";
+@@ -56,11 +57,28 @@
+ 		serial0 = &uart0;
+ 	};
+ 
++	backlight: backlight {
++		compatible = "pwm-backlight";
++		pinctrl-names = "default";
++		pinctrl-0 = <&bl_en_pin_protab>;
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <8>;
++		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ };
+ 
++&codec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&codec_pa_pin>;
++	allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+@@ -86,12 +104,36 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins_a>;
+ 	status = "okay";
++
++	/* Accelerometer */
++	bma250@18 {
++		compatible = "bosch,bma250";
++		reg = <0x18>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */
++	};
+ };
+ 
+ &i2c2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c2_pins_a>;
+ 	status = "okay";
++
++	pixcir_ts@5c {
++		pinctrl-names = "default";
++		pinctrl-0 = <&touchscreen_pins>;
++		compatible = "pixcir,pixcir_tangoc";
++		reg = <0x5c>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */
++		attb-gpio = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */
++		enable-gpios = <&pio 0 5 GPIO_ACTIVE_LOW>;
++		wake-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>;
++		touchscreen-size-x = <1024>;
++		touchscreen-size-y = <768>;
++		touchscreen-inverted-x;
++		touchscreen-inverted-y;
++	};
+ };
+ 
+ &lradc {
+@@ -128,6 +170,27 @@
+ };
+ 
+ &pio {
++	bl_en_pin_protab: bl_en_pin@0 {
++		allwinner,pins = "PH7";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	codec_pa_pin: codec_pa_pin@0 {
++		allwinner,pins = "PH15";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	touchscreen_pins: touchscreen_pins@0 {
++		allwinner,pins = "PA5", "PB13";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	usb0_id_detect_pin: usb0_id_detect_pin@0 {
+ 		allwinner,pins = "PH4";
+ 		allwinner,function = "gpio_in";
+@@ -143,6 +206,12 @@
+ 	};
+ };
+ 
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm0_pins_a>;
++	status = "okay";
++};
++
+ &reg_dcdc2 {
+ 	regulator-always-on;
+ 	regulator-min-microvolt = <1000000>;
+diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi
+index 463bacd..2c8f5e6 100644
+--- a/arch/arm/dts/sun4i-a10.dtsi
++++ b/arch/arm/dts/sun4i-a10.dtsi
+@@ -45,6 +45,7 @@
+ 
+ #include <dt-bindings/thermal/thermal.h>
+ 
++#include <dt-bindings/clock/sun4i-a10-pll2.h>
+ #include <dt-bindings/dma/sun4i-a10.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+@@ -65,7 +66,7 @@
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0-hdmi";
+ 			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
+-				 <&ahb_gates 44>;
++				 <&ahb_gates 44>, <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 
+@@ -74,7 +75,8 @@
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
+ 			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
+-				 <&ahb_gates 44>, <&ahb_gates 46>;
++				 <&ahb_gates 44>, <&ahb_gates 46>,
++				 <&dram_gates 25>, <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 
+@@ -83,7 +85,8 @@
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_fe0-de_be0-lcd0";
+ 			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
+-				 <&ahb_gates 46>;
++				 <&ahb_gates 46>, <&dram_gates 25>,
++				 <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 
+@@ -92,7 +95,8 @@
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
+ 			clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
+-				 <&ahb_gates 44>, <&ahb_gates 46>;
++				 <&ahb_gates 44>, <&ahb_gates 46>,
++				 <&dram_gates 25>, <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 	};
+@@ -195,6 +199,15 @@
+ 			clock-output-names = "pll1";
+ 		};
+ 
++		pll2: clk@01c20008 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun4i-a10-pll2-clk";
++			reg = <0x01c20008 0x8>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll2-1x", "pll2-2x",
++					     "pll2-4x", "pll2-8x";
++		};
++
+ 		pll4: clk@01c20018 {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun4i-a10-pll1-clk";
+@@ -241,6 +254,7 @@
+ 			compatible = "allwinner,sun4i-a10-axi-gates-clk";
+ 			reg = <0x01c2005c 0x4>;
+ 			clocks = <&axi>;
++			clock-indices = <0>;
+ 			clock-output-names = "axi_dram";
+ 		};
+ 
+@@ -257,17 +271,36 @@
+ 			compatible = "allwinner,sun4i-a10-ahb-gates-clk";
+ 			reg = <0x01c20060 0x8>;
+ 			clocks = <&ahb>;
++			clock-indices = <0>, <1>,
++					<2>, <3>,
++					<4>, <5>, <6>,
++					<7>, <8>, <9>,
++					<10>, <11>, <12>,
++					<13>, <14>, <16>,
++					<17>, <18>, <20>,
++					<21>, <22>, <23>,
++					<24>, <25>, <26>,
++					<32>, <33>, <34>,
++					<35>, <36>, <37>,
++					<40>, <41>, <43>,
++					<44>, <45>,
++					<46>, <47>,
++					<50>, <52>;
+ 			clock-output-names = "ahb_usb0", "ahb_ehci0",
+-				"ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss",
+-				"ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1",
+-				"ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand",
+-				"ahb_sdram", "ahb_ace",	"ahb_emac", "ahb_ts",
+-				"ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3",
+-				"ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve",
+-				"ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0",
+-				"ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi",
+-				"ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",
+-				"ahb_de_fe1", "ahb_mp", "ahb_mali400";
++					     "ahb_ohci0", "ahb_ehci1",
++					     "ahb_ohci1", "ahb_ss", "ahb_dma",
++					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",
++					     "ahb_mmc2", "ahb_mmc3", "ahb_ms",
++					     "ahb_nand", "ahb_sdram", "ahb_ace",
++					     "ahb_emac", "ahb_ts", "ahb_spi0",
++					     "ahb_spi1", "ahb_spi2", "ahb_spi3",
++					     "ahb_pata", "ahb_sata", "ahb_gps",
++					     "ahb_ve", "ahb_tvd", "ahb_tve0",
++					     "ahb_tve1", "ahb_lcd0", "ahb_lcd1",
++					     "ahb_csi0", "ahb_csi1", "ahb_hdmi",
++					     "ahb_de_be0", "ahb_de_be1",
++					     "ahb_de_fe0", "ahb_de_fe1",
++					     "ahb_mp", "ahb_mali400";
+ 		};
+ 
+ 		apb0: apb0@01c20054 {
+@@ -283,9 +316,14 @@
+ 			compatible = "allwinner,sun4i-a10-apb0-gates-clk";
+ 			reg = <0x01c20068 0x4>;
+ 			clocks = <&apb0>;
++			clock-indices = <0>, <1>,
++					<2>, <3>,
++					<5>, <6>,
++					<7>, <10>;
+ 			clock-output-names = "apb0_codec", "apb0_spdif",
+-				"apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0",
+-				"apb0_ir1", "apb0_keypad";
++					     "apb0_ac97", "apb0_iis",
++					     "apb0_pio", "apb0_ir0",
++					     "apb0_ir1", "apb0_keypad";
+ 		};
+ 
+ 		apb1: clk@01c20058 {
+@@ -301,12 +339,22 @@
+ 			compatible = "allwinner,sun4i-a10-apb1-gates-clk";
+ 			reg = <0x01c2006c 0x4>;
+ 			clocks = <&apb1>;
++			clock-indices = <0>, <1>,
++					<2>, <4>,
++					<5>, <6>,
++					<7>, <16>,
++					<17>, <18>,
++					<19>, <20>,
++					<21>, <22>,
++					<23>;
+ 			clock-output-names = "apb1_i2c0", "apb1_i2c1",
+-				"apb1_i2c2", "apb1_can", "apb1_scr",
+-				"apb1_ps20", "apb1_ps21", "apb1_uart0",
+-				"apb1_uart1", "apb1_uart2", "apb1_uart3",
+-				"apb1_uart4", "apb1_uart5", "apb1_uart6",
+-				"apb1_uart7";
++					     "apb1_i2c2", "apb1_can",
++					     "apb1_scr", "apb1_ps20",
++					     "apb1_ps21", "apb1_uart0",
++					     "apb1_uart1", "apb1_uart2",
++					     "apb1_uart3", "apb1_uart4",
++					     "apb1_uart5", "apb1_uart6",
++					     "apb1_uart7";
+ 		};
+ 
+ 		nand_clk: clk@01c20080 {
+@@ -446,6 +494,48 @@
+ 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
+ 			clock-output-names = "spi3";
+ 		};
++
++		dram_gates: clk@01c20100 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun4i-a10-dram-gates-clk";
++			reg = <0x01c20100 0x4>;
++			clocks = <&pll5 0>;
++			clock-indices = <0>,
++					<1>, <2>,
++					<3>,
++					<4>,
++					<5>, <6>,
++					<15>,
++					<24>, <25>,
++					<26>, <27>,
++					<28>, <29>;
++			clock-output-names = "dram_ve",
++					     "dram_csi0", "dram_csi1",
++					     "dram_ts",
++					     "dram_tvd",
++					     "dram_tve0", "dram_tve1",
++					     "dram_output",
++					     "dram_de_fe1", "dram_de_fe0",
++					     "dram_de_be0", "dram_de_be1",
++					     "dram_de_mp", "dram_ace";
++		};
++
++		ve_clk: clk@01c2013c {
++			#clock-cells = <0>;
++			#reset-cells = <0>;
++			compatible = "allwinner,sun4i-a10-ve-clk";
++			reg = <0x01c2013c 0x4>;
++			clocks = <&pll4>;
++			clock-output-names = "ve";
++		};
++
++		codec_clk: clk@01c20140 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-codec-clk";
++			reg = <0x01c20140 0x4>;
++			clocks = <&pll2 SUN4I_A10_PLL2_1X>;
++			clock-output-names = "codec";
++		};
+ 	};
+ 
+ 	soc@01c00000 {
+@@ -656,6 +746,14 @@
+ 			status = "disabled";
+ 		};
+ 
++		crypto: crypto-engine@01c15000 {
++			compatible = "allwinner,sun4i-a10-crypto";
++			reg = <0x01c15000 0x1000>;
++			interrupts = <86>;
++			clocks = <&ahb_gates 5>, <&ss_clk>;
++			clock-names = "ahb", "mod";
++		};
++
+ 		spi2: spi@01c17000 {
+ 			compatible = "allwinner,sun4i-a10-spi";
+ 			reg = <0x01c17000 0x1000>;
+@@ -961,6 +1059,19 @@
+ 			status = "disabled";
+ 		};
+ 
++		codec: codec@01c22c00 {
++			#sound-dai-cells = <0>;
++			compatible = "allwinner,sun4i-a10-codec";
++			reg = <0x01c22c00 0x40>;
++			interrupts = <30>;
++			clocks = <&apb0_gates 0>, <&codec_clk>;
++			clock-names = "apb", "codec";
++			dmas = <&dma SUN4I_DMA_NORMAL 19>,
++			       <&dma SUN4I_DMA_NORMAL 19>;
++			dma-names = "rx", "tx";
++			status = "disabled";
++		};
++
+ 		sid: eeprom@01c23800 {
+ 			compatible = "allwinner,sun4i-a10-sid";
+ 			reg = <0x01c23800 0x10>;
+diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
+index 2b3511e..a790ec8 100644
+--- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
++++ b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
+@@ -86,6 +86,20 @@
+ 	status = "okay";
+ };
+ 
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "okay";
++
++	axp152: pmic@30 {
++		compatible = "x-powers,axp152";
++		reg = <0x30>;
++		interrupts = <0>;
++		interrupt-controller;
++		#interrupt-cells = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t004>;
+diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
+index 5a422c1..86d046a 100644
+--- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
++++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
+@@ -111,7 +111,7 @@
+ 	status = "okay";
+ 
+ 	at24@50 {
+-		compatible = "at,24c16";
++		compatible = "atmel,24c16";
+ 		pagesize = <16>;
+ 		reg = <0x50>;
+ 		read-only;
+diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
+index 7fbb0b0..6efbba6 100644
+--- a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
++++ b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
+@@ -123,7 +123,7 @@
+ 
+ &mmc0 {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>;
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>;
+ 	vmmc-supply = <&reg_vcc3v3>;
+ 	bus-width = <4>;
+ 	cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
+@@ -131,27 +131,12 @@
+ 	status = "okay";
+ };
+ 
+-&mmc2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&mmc2_pins_a>;
+-	vmmc-supply = <&reg_vcc3v3>;
+-	bus-width = <8>;
+-	non-removable;
+-	status = "okay";
+-
+-	mmccard: mmccard@0 {
+-		reg = <0>;
+-		compatible = "mmc-card";
+-		broken-hpi;
+-	};
+-};
+-
+ &otg_sram {
+ 	status = "okay";
+ };
+ 
+ &pio {
+-	mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 {
++	mmc0_cd_pin_d709: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PG0";
+ 		allwinner,function = "gpio_in";
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+diff --git a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts
+index 6d466a2..1b11ec9 100644
+--- a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts
++++ b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts
+@@ -123,21 +123,6 @@
+ 	status = "okay";
+ };
+ 
+-&mmc2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&mmc2_pins_a>;
+-	vmmc-supply = <&reg_vcc3v3>;
+-	bus-width = <8>;
+-	non-removable;
+-	status = "okay";
+-
+-	mmccard: mmccard@0 {
+-		reg = <0>;
+-		compatible = "mmc-card";
+-		broken-hpi;
+-	};
+-};
+-
+ &otg_sram {
+ 	status = "okay";
+ };
+@@ -201,11 +186,6 @@
+ 	status = "okay";
+ };
+ 
+-&reg_usb1_vbus {
+-	gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
+-	status = "okay";
+-};
+-
+ &uart1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart1_pins_b>;
+@@ -221,16 +201,12 @@
+ 	allwinner,pins = "PG12";
+ };
+ 
+-&usb1_vbus_pin_a {
+-	allwinner,pins = "PG11";
+-};
+-
+ &usbphy {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
+ 	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+ 	usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+ 	usb0_vbus-supply = <&reg_usb0_vbus>;
+-	usb1_vbus-supply = <&reg_usb1_vbus>;
++	usb1_vbus-supply = <&reg_ldo3>;
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts
+index eb793d5..fa9ddfd 100644
+--- a/arch/arm/dts/sun5i-a13-utoo-p66.dts
++++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts
+@@ -47,11 +47,21 @@
+ #include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
++#include <dt-bindings/pwm/pwm.h>
+ 
+ / {
+ 	model = "Utoo P66";
+ 	compatible = "utoo,p66", "allwinner,sun5i-a13";
+ 
++	backlight: backlight {
++		compatible = "pwm-backlight";
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		/* Note levels of 10 / 20% result in backlight off */
++		brightness-levels = <0 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <6>;
++		/* TODO: backlight uses axp gpio1 as enable pin */
++	};
++
+ 	i2c_lcd: i2c@0 {
+ 		/* The lcd panel i2c interface is hooked up via gpios */
+ 		compatible = "i2c-gpio";
+@@ -63,6 +73,13 @@
+ 	};
+ };
+ 
++&codec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&codec_pa_pin>;
++	allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+@@ -158,6 +175,13 @@
+ };
+ 
+ &pio {
++	codec_pa_pin: codec_pa_pin@0 {
++		allwinner,pins = "PG3";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	mmc0_cd_pin_p66: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PG0";
+ 		allwinner,function = "gpio_in";
+@@ -201,6 +225,12 @@
+ 	};
+ };
+ 
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm0_pins>;
++	status = "okay";
++};
++
+ &reg_dcdc2 {
+ 	regulator-always-on;
+ 	regulator-min-microvolt = <1000000>;
+diff --git a/arch/arm/dts/sun5i-q8-common.dtsi b/arch/arm/dts/sun5i-q8-common.dtsi
+index 0641d68..a78e189 100644
+--- a/arch/arm/dts/sun5i-q8-common.dtsi
++++ b/arch/arm/dts/sun5i-q8-common.dtsi
+@@ -41,11 +41,21 @@
+  */
+ #include "sunxi-q8-common.dtsi"
+ 
++#include <dt-bindings/pwm/pwm.h>
++
+ / {
+ 	aliases {
+ 		serial0 = &uart1;
+ 	};
+ 
++	backlight: backlight {
++		compatible = "pwm-backlight";
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <8>;
++		/* TODO: backlight uses axp gpio1 as enable pin */
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts
+index abf3ccb..6ad19e2 100644
+--- a/arch/arm/dts/sun5i-r8-chip.dts
++++ b/arch/arm/dts/sun5i-r8-chip.dts
+@@ -64,6 +64,26 @@
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
++
++	wifi_reg_on: wifi_reg_on {
++		compatible = "regulator-fixed";
++		pinctrl-names = "default";
++		pinctrl-0 = <&chip_wifi_reg_on_pin>;
++
++		regulator-name = "wifi-reg-on";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>; /* PC19 */
++		enable-active-high;
++	};
++};
++
++&codec {
++	status = "okay";
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
+ };
+ 
+ &ehci0 {
+@@ -109,10 +129,14 @@
+ 	};
+ };
+ 
++&mmc0_pins_a {
++	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>;
+-	vmmc-supply = <&reg_vcc3v3>;
++	vmmc-supply = <&wifi_reg_on>;
+ 	bus-width = <4>;
+ 	non-removable;
+ 	status = "okay";
+@@ -134,6 +158,13 @@
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
+ 
++	chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {
++		allwinner,pins = "PC19";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	chip_id_det_pin: chip_id_det_pin@0 {
+ 		allwinner,pins = "PG2";
+ 		allwinner,function = "gpio_in";
+@@ -167,6 +198,20 @@
+ 	regulator-always-on;
+ };
+ 
++&reg_ldo3 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vdd-wifi1";
++	regulator-always-on;
++};
++
++&reg_ldo4 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vdd-wifi2";
++	regulator-always-on;
++};
++
+ &reg_ldo5 {
+ 	regulator-min-microvolt = <1800000>;
+ 	regulator-max-microvolt = <1800000>;
+diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi
+index 9ffee9b..59a9426 100644
+--- a/arch/arm/dts/sun5i.dtsi
++++ b/arch/arm/dts/sun5i.dtsi
+@@ -44,6 +44,7 @@
+ 
+ #include "skeleton.dtsi"
+ 
++#include <dt-bindings/clock/sun4i-a10-pll2.h>
+ #include <dt-bindings/dma/sun4i-a10.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+@@ -102,6 +103,15 @@
+ 			clock-output-names = "pll1";
+ 		};
+ 
++		pll2: clk@01c20008 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun5i-a13-pll2-clk";
++			reg = <0x01c20008 0x8>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll2-1x", "pll2-2x",
++					     "pll2-4x", "pll2-8x";
++		};
++
+ 		pll4: clk@01c20018 {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun4i-a10-pll1-clk";
+@@ -285,6 +295,14 @@
+ 			clock-output-names = "usb_ohci0", "usb_phy";
+ 		};
+ 
++		codec_clk: clk@01c20140 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-codec-clk";
++			reg = <0x01c20140 0x4>;
++			clocks = <&pll2 SUN4I_A10_PLL2_1X>;
++			clock-output-names = "codec";
++		};
++
+ 		mbus_clk: clk@01c2015c {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun5i-a13-mbus-clk";
+@@ -571,6 +589,19 @@
+ 			status = "disabled";
+ 		};
+ 
++		codec: codec@01c22c00 {
++			#sound-dai-cells = <0>;
++			compatible = "allwinner,sun4i-a10-codec";
++			reg = <0x01c22c00 0x40>;
++			interrupts = <30>;
++			clocks = <&apb0_gates 0>, <&codec_clk>;
++			clock-names = "apb", "codec";
++			dmas = <&dma SUN4I_DMA_NORMAL 19>,
++			       <&dma SUN4I_DMA_NORMAL 19>;
++			dma-names = "rx", "tx";
++			status = "disabled";
++		};
++
+ 		sid: eeprom@01c23800 {
+ 			compatible = "allwinner,sun4i-a10-sid";
+ 			reg = <0x01c23800 0x10>;
+diff --git a/arch/arm/dts/sun6i-a31-colombus.dts b/arch/arm/dts/sun6i-a31-colombus.dts
+index 0d0b6f2..f9cf368 100644
+--- a/arch/arm/dts/sun6i-a31-colombus.dts
++++ b/arch/arm/dts/sun6i-a31-colombus.dts
+@@ -60,6 +60,16 @@
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
++
++	i2c_lcd: i2c@0 {
++		/* The lcd panel i2c interface is hooked up via gpios */
++		compatible = "i2c-gpio";
++		pinctrl-names = "default";
++		pinctrl-0 = <&i2c_lcd_pins>;
++		gpios = <&pio 0 23 GPIO_ACTIVE_HIGH>, /* PA23, sda */
++			<&pio 0 24 GPIO_ACTIVE_HIGH>; /* PA24, scl */
++		i2c-gpio,delay-us = <5>;
++	};
+ };
+ 
+ &ehci1 {
+@@ -94,6 +104,13 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c2_pins_a>;
+ 	status = "okay";
++
++	mma8452: mma8452@1d {
++		compatible = "fsl,mma8452";
++		reg = <0x1d>;
++		interrupt-parent = <&pio>;
++		interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PA9 */
++	};
+ };
+ 
+ &mmc0 {
+@@ -124,6 +141,13 @@
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
++
++	i2c_lcd_pins: i2c_lcd_pin@0 {
++		allwinner,pins = "PA23", "PA24";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
+ };
+ 
+ &reg_usb2_vbus {
+diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts
+index d0cfada..9a74637 100644
+--- a/arch/arm/dts/sun6i-a31-hummingbird.dts
++++ b/arch/arm/dts/sun6i-a31-hummingbird.dts
+@@ -54,6 +54,8 @@
+ 	compatible = "merrii,a31-hummingbird", "allwinner,sun6i-a31";
+ 
+ 	aliases {
++		rtc0 = &pcf8563;
++		rtc1 = &rtc;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -67,13 +69,17 @@
+ 	};
+ };
+ 
++&cpu0 {
++	cpu-supply = <&reg_dcdc3>;
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+ 
+ &gmac {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&gmac_pins_rgmii_a>;
++	pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_hummingbird>;
+ 	phy = <&phy1>;
+ 	phy-mode = "rgmii";
+ 	snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
+@@ -119,7 +125,7 @@
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>;
+-	vmmc-supply = <&vcc_3v0>;
++	vmmc-supply = <&reg_dcdc1>;
+ 	bus-width = <4>;
+ 	cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
+ 	cd-inverted;
+@@ -134,7 +140,7 @@
+ &mmc1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc1_pins_a>, <&wifi_reset_pin_hummingbird>;
+-	vmmc-supply = <&vcc_wifi>;
++	vmmc-supply = <&reg_aldo1>;
+ 	mmc-pwrseq = <&wifi_pwrseq>;
+ 	bus-width = <4>;
+ 	non-removable;
+@@ -146,6 +152,13 @@
+ };
+ 
+ &pio {
++	gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin@0 {
++		allwinner,pins = "PA21";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PA8";
+ 		allwinner,function = "gpio_in";
+@@ -164,70 +177,69 @@
+ &p2wi {
+ 	status = "okay";
+ 
+-	axp221: pmic@68 {
++	axp22x: pmic@68 {
+ 		compatible = "x-powers,axp221";
+ 		reg = <0x68>;
+ 		interrupt-parent = <&nmi_intc>;
+ 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
+-		dcdc1-supply = <&vcc_3v0>;
+-		dcdc5-supply = <&vcc_dram>;
+-
+-		regulators {
+-			x-powers,dcdc-freq = <3000>;
+-
+-			vcc_3v0: dcdc1 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <3000000>;
+-				regulator-max-microvolt = <3000000>;
+-				regulator-name = "vcc-3v0";
+-			};
+-
+-			vdd_cpu: dcdc2 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <700000>;
+-				regulator-max-microvolt = <1320000>;
+-				regulator-name = "vdd-cpu";
+-			};
+-
+-			vdd_gpu: dcdc3 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <700000>;
+-				regulator-max-microvolt = <1320000>;
+-				regulator-name = "vdd-gpu";
+-			};
+-
+-			vdd_sys_dll: dcdc4 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <1100000>;
+-				regulator-max-microvolt = <1100000>;
+-				regulator-name = "vdd-sys-dll";
+-			};
+-
+-			vcc_dram: dcdc5 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <1500000>;
+-				regulator-max-microvolt = <1500000>;
+-				regulator-name = "vcc-dram";
+-			};
+-
+-			vcc_wifi: aldo1 {
+-				regulator-min-microvolt = <3300000>;
+-				regulator-max-microvolt = <3300000>;
+-				regulator-name = "vcc_wifi";
+-			};
+-
+-			avcc: aldo3 {
+-				regulator-always-on;
+-				regulator-min-microvolt = <3000000>;
+-				regulator-max-microvolt = <3000000>;
+-				regulator-name = "avcc";
+-			};
+-		};
+ 	};
+ };
+ 
++#include "axp22x.dtsi"
++
++&reg_aldo1 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-wifi";
++};
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "avcc";
++};
++
++&reg_dc5ldo {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpus";
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-gpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc4 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-sys-dll";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
+ &reg_usb1_vbus {
+ 	gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
+index 44f889f..1867af2 100644
+--- a/arch/arm/dts/sun6i-a31.dtsi
++++ b/arch/arm/dts/sun6i-a31.dtsi
+@@ -61,7 +61,7 @@
+ 		#size-cells = <1>;
+ 		ranges;
+ 
+-		framebuffer@0 {
++		simplefb_hdmi: framebuffer@0 {
+ 			compatible = "allwinner,simple-framebuffer",
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0-hdmi";
+@@ -69,7 +69,7 @@
+ 			status = "disabled";
+ 		};
+ 
+-		framebuffer@1 {
++		simplefb_lcd: framebuffer@1 {
+ 			compatible = "allwinner,simple-framebuffer",
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0";
+@@ -252,6 +252,20 @@
+ 			compatible = "allwinner,sun6i-a31-ahb1-gates-clk";
+ 			reg = <0x01c20060 0x8>;
+ 			clocks = <&ahb1>;
++			clock-indices = <1>, <5>,
++					<6>, <8>, <9>,
++					<10>, <11>, <12>,
++					<13>, <14>,
++					<17>, <18>, <19>,
++					<20>, <21>, <22>,
++					<23>, <24>, <26>,
++					<27>, <29>,
++					<30>, <31>, <32>,
++					<36>, <37>, <40>,
++					<43>, <44>, <45>,
++					<46>, <47>, <50>,
++					<52>, <55>, <56>,
++					<57>, <58>;
+ 			clock-output-names = "ahb1_mipidsi", "ahb1_ss",
+ 					"ahb1_dma", "ahb1_mmc0", "ahb1_mmc1",
+ 					"ahb1_mmc2", "ahb1_mmc3", "ahb1_nand1",
+@@ -281,6 +295,9 @@
+ 			compatible = "allwinner,sun6i-a31-apb1-gates-clk";
+ 			reg = <0x01c20068 0x4>;
+ 			clocks = <&apb1>;
++			clock-indices = <0>, <4>,
++					<5>, <12>,
++					<13>;
+ 			clock-output-names = "apb1_codec", "apb1_digital_mic",
+ 					"apb1_pio", "apb1_daudio0",
+ 					"apb1_daudio1";
+@@ -299,6 +316,10 @@
+ 			compatible = "allwinner,sun6i-a31-apb2-gates-clk";
+ 			reg = <0x01c2006c 0x4>;
+ 			clocks = <&apb2>;
++			clock-indices = <0>, <1>,
++					<2>, <3>, <16>,
++					<17>, <18>, <19>,
++					<20>, <21>;
+ 			clock-output-names = "apb2_i2c0", "apb2_i2c1",
+ 					     "apb2_i2c2", "apb2_i2c3",
+ 					     "apb2_uart0", "apb2_uart1",
+@@ -346,6 +367,14 @@
+ 					     "mmc3_sample";
+ 		};
+ 
++		ss_clk: clk@01c2009c {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c2009c 0x4>;
++			clocks = <&osc24M>, <&pll6 0>;
++			clock-output-names = "ss";
++		};
++
+ 		spi0_clk: clk@01c200a0 {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun4i-a10-mod0-clk";
+@@ -384,6 +413,9 @@
+ 			compatible = "allwinner,sun6i-a31-usb-clk";
+ 			reg = <0x01c200cc 0x4>;
+ 			clocks = <&osc24M>;
++			clock-indices = <8>, <9>, <10>,
++					<16>, <17>,
++					<18>;
+ 			clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2",
+ 					     "usb_ohci0", "usb_ohci1",
+ 					     "usb_ohci2";
+@@ -677,6 +709,16 @@
+ 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 			};
+ 
++			mmc3_8bit_emmc_pins: mmc3@1 {
++				allwinner,pins = "PC6", "PC7", "PC8", "PC9",
++						 "PC10", "PC11", "PC12",
++						 "PC13", "PC14", "PC15",
++						 "PC24";
++				allwinner,function = "mmc3";
++				allwinner,drive = <SUN4I_PINCTRL_40_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
+ 			gmac_pins_mii_a: gmac_mii@0 {
+ 				allwinner,pins = "PA0", "PA1", "PA2", "PA3",
+ 						"PA8", "PA9", "PA11",
+@@ -754,6 +796,13 @@
+ 			reg = <0x01c20ca0 0x20>;
+ 		};
+ 
++		lradc: lradc@01c22800 {
++			compatible = "allwinner,sun4i-a10-lradc-keys";
++			reg = <0x01c22800 0x100>;
++			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
+ 		rtp: rtp@01c25000 {
+ 			compatible = "allwinner,sun6i-a31-ts";
+ 			reg = <0x01c25000 0x100>;
+@@ -900,6 +949,16 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		crypto: crypto-engine@01c15000 {
++			compatible = "allwinner,sun4i-a10-crypto";
++			reg = <0x01c15000 0x1000>;
++			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ahb1_gates 5>, <&ss_clk>;
++			clock-names = "ahb", "mod";
++			resets = <&ahb1_rst 5>;
++			reset-names = "ahb";
++		};
++
+ 		timer@01c60000 {
+ 			compatible = "allwinner,sun6i-a31-hstimer",
+ 				     "allwinner,sun7i-a20-hstimer";
+@@ -1061,7 +1120,7 @@
+ 			resets = <&apb0_rst 0>;
+ 			gpio-controller;
+ 			interrupt-controller;
+-			#interrupt-cells = <2>;
++			#interrupt-cells = <3>;
+ 			#size-cells = <0>;
+ 			#gpio-cells = <3>;
+ 
+diff --git a/arch/arm/dts/sun6i-a31s-primo81.dts b/arch/arm/dts/sun6i-a31s-primo81.dts
+index cfdc03e..379746a 100644
+--- a/arch/arm/dts/sun6i-a31s-primo81.dts
++++ b/arch/arm/dts/sun6i-a31s-primo81.dts
+@@ -1,16 +1,57 @@
+ /*
+- * Copyright 2015 Hans de Goede <[email protected]>
++ * Copyright 2014 Siarhei Siamashka <[email protected]>
++ * Copyright 2015 Karsten Merker <[email protected]>
++ * Copyright 2015 Chen-Yu Tsai <[email protected]>
+  *
+- * Minimal dts file for the MSI Primo81 for u-boot only
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
+  *
+- * SPDX-License-Identifier:     GPL-2.0+ or X11
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
+  */
+ 
+ /dts-v1/;
+ #include "sun6i-a31s.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+ / {
+-	model = "MSI Primo81";
++	model = "MSI Primo81 tablet";
+ 	compatible = "msi,primo81", "allwinner,sun6i-a31s";
+ 
+ 	aliases {
+@@ -22,8 +63,202 @@
+ 	};
+ };
+ 
+-&uart0 {
++&cpu0 {
++	cpu-supply = <&reg_dcdc3>;
++};
++
++&ehci0 {
++	/* rtl8188etv wifi is connected here */
++	status = "okay";
++};
++
++&i2c0 {
++	/* pull-ups and device VDDIO use AXP221 DLDO3 */
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "failed";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++
++	ctp@5d {
++		pinctrl-names = "default";
++		pinctrl-0 = <&gt911_int_primo81>;
++		compatible = "goodix,gt911";
++		reg = <0x5d>;
++		interrupt-parent = <&pio>;
++		interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>; /* PA3 */
++		touchscreen-swapped-x-y;
++	};
++};
++
++&i2c2 {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&uart0_pins_a>;
++	pinctrl-0 = <&i2c2_pins_a>;
++	status = "okay";
++
++	accelerometer@1c {
++		pinctrl-names = "default";
++		pinctrl-0 = <&mma8452_int_primo81>;
++		compatible = "fsl,mma8452";
++		reg = <0x1c>;
++		interrupt-parent = <&pio>;
++		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; /* PA9 */
++		#io-channel-cells = <1>;
++	};
++};
++
++&lradc {
++	vref-supply = <&reg_aldo3>;
++	status = "okay";
++
++	button@158 {
++		label = "Volume Up";
++		linux,code = <KEY_VOLUMEUP>;
++		channel = <0>;
++		voltage = <158730>;
++	};
++
++	button@349 {
++		label = "Volume Down";
++		linux,code = <KEY_VOLUMEDOWN>;
++		channel = <0>;
++		voltage = <349206>;
++	};
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_primo81>;
++	vmmc-supply = <&reg_dcdc1>;
++	bus-width = <4>;
++	cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
++	cd-inverted;
++	status = "okay";
++};
++
++&pio {
++	gt911_int_primo81: gt911_int_pin@0 {
++		allwinner,pins = "PA3";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	mma8452_int_primo81: mma8452_int_pin@0 {
++		allwinner,pins = "PA9";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
++	mmc0_cd_pin_primo81: mmc0_cd_pin@0 {
++		allwinner,pins = "PA8";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++};
++
++&p2wi {
++	status = "okay";
++
++	axp22x: pmic@68 {
++		compatible = "x-powers,axp221";
++		reg = <0x68>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++#include "axp22x.dtsi"
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "avcc";
++};
++
++&reg_dc1sw {
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-lcd";
++};
++
++&reg_dc5ldo {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpus"; /* This is an educated guess */
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-gpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc4 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-sys-dll";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
++&reg_dldo1 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-wifi";
++};
++
++&reg_dldo3 {
++	regulator-min-microvolt = <2800000>;
++	regulator-max-microvolt = <2800000>;
++	regulator-name = "vddio-csi";
++};
++
++&reg_eldo3 {
++	regulator-min-microvolt = <1080000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-mipi-bridge";
++};
++
++&simplefb_lcd {
++	vcc-lcd-supply = <&reg_dc1sw>;
++	vdd-mipi-bridge-supply = <&reg_eldo3>;
++};
++
++&usb_otg {
++	/* otg support requires support for AXP221 usb-power-supply and GPIO */
++	dr_mode = "host";
++	status = "okay";
++};
++
++&usbphy {
++	usb1_vbus-supply = <&reg_dldo1>;
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
+new file mode 100644
+index 0000000..4ec0c86
+--- /dev/null
++++ b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
+@@ -0,0 +1,142 @@
++/*
++ * Copyright 2015 Chen-Yu Tsai <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun6i-a31s.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++	model = "Sinlinx SinA31s Core Board";
++	compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
++
++	aliases {
++		serial0 = &uart0;
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc3>;
++};
++
++/* eMMC on core board */
++&mmc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc3_8bit_emmc_pins>;
++	vmmc-supply = <&reg_dcdc1>;
++	vqmmc-supply = <&reg_dcdc1>;
++	bus-width = <8>;
++	non-removable;
++	cap-mmc-hw-reset;
++	status = "okay";
++};
++
++/* AXP221s PMIC on core board */
++&p2wi {
++	status = "okay";
++
++	axp22x: pmic@68 {
++		compatible = "x-powers,axp221";
++		reg = <0x68>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++#include "axp22x.dtsi"
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "avcc";
++};
++
++&reg_dc5ldo {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpus";
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-gpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc4 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-sys-dll";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
++/* UART0 pads available on core board */
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
+diff --git a/arch/arm/dts/sun6i-a31s-sina31s.dts b/arch/arm/dts/sun6i-a31s-sina31s.dts
+new file mode 100644
+index 0000000..6ead2f5
+--- /dev/null
++++ b/arch/arm/dts/sun6i-a31s-sina31s.dts
+@@ -0,0 +1,153 @@
++/*
++ * Copyright 2015 Chen-Yu Tsai <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/* The SinA31s development board has the SinA31s core board soldered on */
++#include "sun6i-a31s-sina31s-core.dtsi"
++
++#include <dt-bindings/input/input.h>
++
++/ {
++	model = "Sinlinx SinA31s Development Board";
++	compatible = "sinlinx,sina31s-sdk", "allwinner,sun6i-a31s";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&led_pin_sina31s>;
++
++		status {
++			label = "sina31s:status:usr";
++			gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */
++		};
++	};
++};
++
++&ehci0 {
++	/* USB 2.0 4 port hub IC */
++	status = "okay";
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&gmac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&gmac_pins_mii_a>;
++	phy = <&phy1>;
++	phy-mode = "mii";
++	phy-supply = <&reg_dldo1>;
++	status = "okay";
++
++	phy1: ethernet-phy@1 {
++		reg = <1>;
++	};
++};
++
++&ir {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ir_pins_a>;
++	status = "okay";
++};
++
++&lradc {
++	vref-supply = <&reg_aldo3>;
++	status = "okay";
++
++	button@158 {
++		label = "Volume Up";
++		linux,code = <KEY_VOLUMEUP>;
++		channel = <0>;
++		voltage = <158730>;
++	};
++
++	button@349 {
++		label = "Volume Down";
++		linux,code = <KEY_VOLUMEDOWN>;
++		channel = <0>;
++		voltage = <349206>;
++	};
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina31s>;
++	vmmc-supply = <&reg_dcdc1>;
++	bus-width = <4>;
++	cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */
++	cd-inverted;
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++&pio {
++	led_pin_sina31s: led_pin@0 {
++		allwinner,pins = "PH13";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	mmc0_cd_pin_sina31s: mmc0_cd_pin@0 {
++		allwinner,pins = "PA4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++};
++
++&reg_dldo1 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-gmac-phy";
++};
++
++&usbphy {
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+new file mode 100644
+index 0000000..360adfb
+--- /dev/null
++++ b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+@@ -0,0 +1,205 @@
++/*
++ * Copyright 2015 Lawrence Yu <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun6i-a31s.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++	model = "Yones TopTech BS1078 v2 Tablet";
++	compatible = "yones-toptech,bs1078-v2", "allwinner,sun6i-a31s";
++
++	aliases {
++		serial0 = &uart0;
++		i2c1 = &i2c1;
++		i2c2 = &i2c2;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins_a>;
++	status = "okay";
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++&pio {
++	mmc0_cd_pin_bs1078v2: mmc0_cd_pin@0 {
++		allwinner,pins = "PA8";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bs1078v2>;
++	vmmc-supply = <&reg_vcc3v0>;
++	bus-width = <4>;
++	cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
++	cd-inverted;
++	status = "okay";
++};
++
++&mmc0_pins_a {
++	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++};
++
++&p2wi {
++	status = "okay";
++
++	axp22x: pmic@68 {
++		compatible = "x-powers,axp221";
++		reg = <0x68>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++#include "axp22x.dtsi"
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "avcc";
++};
++
++&reg_dc1sw {
++	regulator-name = "vcc-lcd-usb2";
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++};
++
++&reg_dc5ldo {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpus";
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-gpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc4 {
++	regulator-always-on;
++	regulator-min-microvolt = <700000>;
++	regulator-max-microvolt = <1320000>;
++	regulator-name = "vdd-sys-dll";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
++&reg_dldo1 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-wifi";
++};
++
++/* Voltage source for I2C pullup resistors for I2C Bus 0 */
++&reg_dldo3 {
++	regulator-min-microvolt = <2800000>;
++	regulator-max-microvolt = <2800000>;
++	regulator-name = "vddio-csi";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&usbphy {
++	usb1_vbus-supply = <&reg_dldo1>;
++	usb2_vbus-supply = <&reg_dc1sw>;
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts
+index 9f7b472..67c8a76 100644
+--- a/arch/arm/dts/sun7i-a20-bananapi.dts
++++ b/arch/arm/dts/sun7i-a20-bananapi.dts
+@@ -92,6 +92,24 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++	operating-points = <
++		/* kHz	  uV */
++		960000	1400000
++		912000	1400000
++		864000	1350000
++		720000	1250000
++		528000	1150000
++		312000	1100000
++		144000	1050000
++		>;
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -119,13 +137,9 @@
+ 	status = "okay";
+ 
+ 	axp209: pmic@34 {
+-		compatible = "x-powers,axp209";
+ 		reg = <0x34>;
+ 		interrupt-parent = <&nmi_intc>;
+ 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+-
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
+ 	};
+ };
+ 
+@@ -159,7 +173,18 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
+ 	mmc0_cd_pin_bananapi: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PH10";
+ 		allwinner,function = "gpio_in";
+@@ -182,6 +207,37 @@
+ 	};
+ };
+ 
++#include "axp209.dtsi"
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
++&reg_usb0_vbus {
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -216,7 +272,21 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usb_power_supply {
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_power-supply = <&usb_power_supply>;
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts
+index 39a51d5..1fa832d 100644
+--- a/arch/arm/dts/sun7i-a20-cubieboard2.dts
++++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts
+@@ -84,6 +84,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+@@ -150,6 +154,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	led_pins_cubieboard2: led_pins@0 {
+ 		allwinner,pins = "PH20", "PH21";
+@@ -157,12 +165,24 @@
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
+ };
+ 
+ &reg_ahci_5v {
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ #include "axp209.dtsi"
+ 
+ &reg_dcdc2 {
+@@ -205,6 +225,9 @@
+ };
+ 
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts
+index e6b0192..8da939a 100644
+--- a/arch/arm/dts/sun7i-a20-cubietruck.dts
++++ b/arch/arm/dts/sun7i-a20-cubietruck.dts
+@@ -101,6 +101,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+diff --git a/arch/arm/dts/sun7i-a20-icnova-swac.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts
+new file mode 100644
+index 0000000..f5b5325
+--- /dev/null
++++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts
+@@ -0,0 +1,169 @@
++/*
++ * Copyright 2015 Stefan Roese <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun7i-a20.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++	model = "ICnova-A20 SWAC";
++	compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20";
++
++	aliases {
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&gmac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&gmac_pins_mii_a>;
++	phy = <&phy1>;
++	phy-mode = "mii";
++	status = "okay";
++
++	phy1: ethernet-phy@1 {
++		reg = <1>;
++	};
++};
++
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "okay";
++
++	axp209: pmic@34 {
++		reg = <0x34>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <4>;
++	cd-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; /* PI5 */
++	cd-inverted;
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++#include "axp209.dtsi"
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
++&reg_usb1_vbus {
++	status = "okay";
++};
++
++&reg_usb2_vbus {
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&usbphy {
++	usb1_vbus-supply = <&reg_usb1_vbus>;
++	usb2_vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts
+new file mode 100644
+index 0000000..661c21d
+--- /dev/null
++++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts
+@@ -0,0 +1,125 @@
++/*
++ * Copyright 2015 - Marcus Cooper <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun7i-a20.dtsi"
++#include "sunxi-itead-core-common.dtsi"
++
++/ {
++	model = "Itead Ibox A20";
++	compatible = "itead,itead-ibox-a20", "allwinner,sun7i-a20";
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&led_pins_itead_core>;
++
++		green {
++			label = "itead_core:green:usr";
++			gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++		};
++
++		blue {
++			label = "itead_core:blue:usr";
++			gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++		};
++	};
++};
++
++&ahci {
++	target-supply = <&reg_ahci_5v>;
++	status = "okay";
++};
++
++&codec {
++	status = "okay";
++};
++
++&gmac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&gmac_pins_mii_a>;
++	phy = <&phy1>;
++	phy-mode = "mii";
++	status = "okay";
++
++	phy1: ethernet-phy@1 {
++		reg = <1>;
++	};
++};
++
++&i2c0 {
++	axp209: pmic@34 {
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&ir0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ir0_rx_pins_a>;
++	status = "okay";
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <4>;
++	cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
++	cd-inverted;
++	status = "okay";
++};
++
++&pio {
++	led_pins_itead_core: led_pins@0 {
++		allwinner,pins = "PH20","PH21";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_20_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&reg_ahci_5v {
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
+index 975b0b2..5ee43d8 100644
+--- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts
++++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
+@@ -97,16 +97,6 @@
+ 
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+-	operating-points = <
+-		/* kHz	  uV */
+-		960000	1400000
+-		912000	1400000
+-		864000	1350000
+-		720000	1250000
+-		528000	1150000
+-		312000	1100000
+-		144000	1050000
+-		>;
+ };
+ 
+ &ehci0 {
+diff --git a/arch/arm/dts/sun7i-a20-mk808c.dts b/arch/arm/dts/sun7i-a20-mk808c.dts
+index 4f432f8..90ff4a2 100644
+--- a/arch/arm/dts/sun7i-a20-mk808c.dts
++++ b/arch/arm/dts/sun7i-a20-mk808c.dts
+@@ -53,6 +53,7 @@
+ 
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+ / {
+ 	model = "mk808c";
+@@ -68,6 +69,10 @@
+ 	};
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -121,6 +126,30 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
++&pio {
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
++		allwinner,pins = "PH5";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&reg_usb0_vbus {
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -141,7 +170,17 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
++	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
+index 6904dbd..23aacce 100644
+--- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
++++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright 2015 - Marcus Cooper <[email protected]>
++ * Copyright 2015 - Karsten Merker <[email protected]>
+  *
+  * This file is dual-licensed: you can use it either under the terms
+  * of the GPL or the X11 license, at your option. Note that this dual
+@@ -45,6 +46,7 @@
+ #include "sunxi-common-regulators.dtsi"
+ 
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+@@ -71,14 +73,6 @@
+ 			default-state = "on";
+ 		};
+ 	};
+-
+-	reg_axp_ipsout: axp_ipsout {
+-		compatible = "regulator-fixed";
+-		regulator-name = "axp-ipsout";
+-		regulator-min-microvolt = <5000000>;
+-		regulator-max-microvolt = <5000000>;
+-		regulator-always-on;
+-	};
+ };
+ 
+ &ahci {
+@@ -94,6 +88,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &gmac {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&gmac_pins_rgmii_a>;
+@@ -118,10 +116,58 @@
+ 	};
+ };
+ 
+-&i2c1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&i2c1_pins_a>;
++&lradc {
++	vref-supply = <&reg_vcc3v0>;
+ 	status = "okay";
++
++	button@190 {
++		label = "Volume Up";
++		linux,code = <KEY_VOLUMEUP>;
++		channel = <0>;
++		voltage = <190000>;
++	};
++
++	button@390 {
++		label = "Volume Down";
++		linux,code = <KEY_VOLUMEDOWN>;
++		channel = <0>;
++		voltage = <390000>;
++	};
++
++	button@600 {
++		label = "Menu";
++		linux,code = <KEY_MENU>;
++		channel = <0>;
++		voltage = <600000>;
++	};
++
++	button@800 {
++		label = "Search";
++		linux,code = <KEY_SEARCH>;
++		channel = <0>;
++		voltage = <800000>;
++	};
++
++	button@980 {
++		label = "Home";
++		linux,code = <KEY_HOMEPAGE>;
++		channel = <0>;
++		voltage = <980000>;
++	};
++
++	button@1180 {
++		label = "Esc";
++		linux,code = <KEY_ESC>;
++		channel = <0>;
++		voltage = <1180000>;
++	};
++
++	button@1400 {
++		label = "Enter";
++		linux,code = <KEY_ENTER>;
++		channel = <0>;
++		voltage = <1400000>;
++	};
+ };
+ 
+ &mmc0 {
+@@ -134,6 +180,16 @@
+ 	status = "okay";
+ };
+ 
++&mmc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olimex_som_evb>;
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <4>;
++	cd-gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>; /* PH0 */
++	cd-inverted;
++	status = "okay";
++};
++
+ &ohci0 {
+ 	status = "okay";
+ };
+@@ -161,15 +217,22 @@
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
+ 
++	mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin@0 {
++		allwinner,pins = "PH0";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
+ 	usb0_id_detect_pin: usb0_id_detect_pin@0 {
+-		allwinner,pins = "PH04";
++		allwinner,pins = "PH4";
+ 		allwinner,function = "gpio_in";
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
+ 
+ 	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
+-		allwinner,pins = "PH05";
++		allwinner,pins = "PH5";
+ 		allwinner,function = "gpio_in";
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+@@ -187,7 +250,7 @@
+ &reg_dcdc2 {
+ 	regulator-always-on;
+ 	regulator-min-microvolt = <1000000>;
+-	regulator-max-microvolt = <1425000>;
++	regulator-max-microvolt = <1400000>;
+ 	regulator-name = "vdd-cpu";
+ };
+ 
+@@ -235,8 +298,8 @@
+ &usbphy {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
+-	usb0_id_det-gpios = <&pio 7 04 GPIO_ACTIVE_HIGH>; /* PH04 */
+-	usb0_vbus_det-gpios = <&pio 7 05 GPIO_ACTIVE_HIGH>; /* PH05 */
++	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH04 */
++	usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH05 */
+ 	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
+index 0423708..35ad700 100644
+--- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
++++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
+@@ -117,6 +117,18 @@
+ 	};
+ };
+ 
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++
++	eeprom: eeprom@50 {
++		compatible = "atmel,24c16";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
+index 8acff78..d5c796c 100644
+--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
++++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
+@@ -170,6 +170,12 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins_a>;
+ 	status = "okay";
++
++	eeprom: eeprom@50 {
++		compatible = "atmel,24c16";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
+ };
+ 
+ &mmc0 {
+@@ -190,6 +196,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
+ 		allwinner,pins = "PC3";
+@@ -204,6 +214,27 @@
+ 		allwinner,drive = <SUN4I_PINCTRL_20_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
++	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
++		allwinner,pins = "PH5";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
++	};
++
++	usb0_vbus_pin_lime2: usb0_vbus_pin@0 {
++		allwinner,pins = "PC17";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
+ };
+ 
+ &reg_ahci_5v {
+@@ -212,6 +243,12 @@
+ 	status = "okay";
+ };
+ 
++&reg_usb0_vbus {
++	pinctrl-0 = <&usb0_vbus_pin_lime2>;
++	gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -226,7 +263,17 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
+index c5d70ca..7e3006f 100644
+--- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
++++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
+@@ -125,6 +125,12 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins_a>;
+ 	status = "okay";
++
++	eeprom: eeprom@50 {
++		compatible = "atmel,24c16";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
+ };
+ 
+ &i2c2 {
+diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
+index 73cd81e..2be04c4 100644
+--- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts
++++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
+@@ -95,6 +95,10 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -156,7 +160,18 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
+ 	mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PH10";
+ 		allwinner,function = "gpio_in";
+@@ -225,6 +240,10 @@
+ 	regulator-name = "avcc";
+ };
+ 
++&reg_usb0_vbus {
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	pinctrl-0 = <&usb1_vbus_pin_bananapro>;
+ 	gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */
+@@ -243,7 +262,21 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usb_power_supply {
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_power-supply = <&usb_power_supply>;
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts
+index 55a06ce..71125bf 100644
+--- a/arch/arm/dts/sun7i-a20-orangepi.dts
++++ b/arch/arm/dts/sun7i-a20-orangepi.dts
+@@ -141,7 +141,18 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
+ 	mmc0_cd_pin_orangepi: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PH10";
+ 		allwinner,function = "gpio_in";
+@@ -203,6 +214,10 @@
+ 	regulator-name = "avcc";
+ };
+ 
++&reg_usb0_vbus {
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	pinctrl-0 = <&usb1_vbus_pin_bananapro>;
+ 	gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */
+@@ -221,7 +236,21 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usb_power_supply {
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_power-supply = <&usb_power_supply>;
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
+index 5361fce..ddac732 100644
+--- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
++++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
+@@ -82,6 +82,14 @@
+ 	status = "okay";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -108,13 +116,9 @@
+ 	status = "okay";
+ 
+ 	axp209: pmic@34 {
+-		compatible = "x-powers,axp209";
+ 		reg = <0x34>;
+ 		interrupt-parent = <&nmi_intc>;
+ 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+-
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
+ 	};
+ };
+ 
+@@ -142,6 +146,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 {
+ 		allwinner,pins = "PH2";
+@@ -157,8 +165,15 @@
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
+ 
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++
+ 	usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 {
+-		allwinner,pins = "PH11";
++		allwinner,pins = "PD2";
+ 		allwinner,function = "gpio_out";
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+@@ -171,13 +186,37 @@
+ 	status = "okay";
+ };
+ 
+-&reg_usb1_vbus {
+-	pinctrl-0 = <&usb1_vbus_pin_pcduino3_nano>;
+-	gpio = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+-	status = "okay";
++#include "axp209.dtsi"
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-pll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
+ };
+ 
+-&reg_usb2_vbus {
++/* A single regulator (U24) powers both USB host ports. */
++&reg_usb1_vbus {
++	pinctrl-0 = <&usb1_vbus_pin_pcduino3_nano>;
++	gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
+ 	status = "okay";
+ };
+ 
+@@ -187,8 +226,16 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+-	usb2_vbus-supply = <&reg_usb2_vbus>;
++	usb2_vbus-supply = <&reg_usb1_vbus>;
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts
+index afc9ece..1a8b39b 100644
+--- a/arch/arm/dts/sun7i-a20-pcduino3.dts
++++ b/arch/arm/dts/sun7i-a20-pcduino3.dts
+@@ -111,6 +111,14 @@
+ 	allwinner,pins = "PH2";
+ };
+ 
++&codec {
++	status = "okay";
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
++
+ &ehci0 {
+ 	status = "okay";
+ };
+@@ -137,16 +145,14 @@
+ 	status = "okay";
+ 
+ 	axp209: pmic@34 {
+-		compatible = "x-powers,axp209";
+ 		reg = <0x34>;
+ 		interrupt-parent = <&nmi_intc>;
+ 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+-
+-		interrupt-controller;
+-		#interrupt-cells = <1>;
+ 	};
+ };
+ 
++#include "axp209.dtsi"
++
+ &ir0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir0_rx_pins_a>;
+@@ -171,6 +177,10 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
+ &pio {
+ 	led_pins_pcduino3: led_pins@0 {
+ 		allwinner,pins = "PH15", "PH16";
+@@ -185,6 +195,13 @@
+ 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
+ };
+ 
+ &reg_ahci_5v {
+@@ -192,6 +209,31 @@
+ 	status = "okay";
+ };
+ 
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-pll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -206,7 +248,15 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
+index 83c6d3f..2f6b21a 100644
+--- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
++++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
+@@ -48,6 +48,7 @@
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/pwm/pwm.h>
+ 
+ / {
+ 	model = "Wexler TAB7200";
+@@ -57,11 +58,28 @@
+ 		serial0 = &uart0;
+ 	};
+ 
++	backlight {
++		compatible = "pwm-backlight";
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <8>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&bl_enable_pin>;
++		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ };
+ 
++&codec {
++	pinctrl-names = "default";
++	pinctrl-0 = <&codec_pa_pin>;
++	allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
++	status = "okay";
++};
++
+ &cpu0 {
+ 	cpu-supply = <&reg_dcdc2>;
+ };
+@@ -86,6 +104,8 @@
+ 	};
+ };
+ 
++#include "axp209.dtsi"
++
+ &i2c1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins_a>;
+@@ -96,6 +116,18 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c2_pins_a>;
+ 	status = "okay";
++
++	gt911: touchscreen@5d {
++		compatible = "goodix,gt911";
++		reg = <0x5d>;
++		interrupt-parent = <&pio>;
++		interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */
++		pinctrl-names = "default";
++		pinctrl-0 = <&ts_reset_pin>;
++		irq-gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* INT (PH21) */
++		reset-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* RST (PB13) */
++		touchscreen-swapped-x-y;
++	};
+ };
+ 
+ &lradc {
+@@ -135,7 +167,45 @@
+ 	status = "okay";
+ };
+ 
+-#include "axp209.dtsi"
++&otg_sram {
++	status = "okay";
++};
++
++&pio {
++	bl_enable_pin: bl_enable_pin@0 {
++		allwinner,pins = "PH7";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	codec_pa_pin: codec_pa_pin@0 {
++		allwinner,pins = "PH15";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	ts_reset_pin: ts_reset_pin@0 {
++		allwinner,pins = "PB13";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++};
++
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm0_pins_a>;
++	status = "okay";
++};
+ 
+ &reg_dcdc2 {
+ 	regulator-always-on;
+@@ -162,6 +232,10 @@
+ 	regulator-name = "avcc";
+ };
+ 
++&reg_usb0_vbus {
++	status = "okay";
++};
++
+ &reg_usb1_vbus {
+ 	status = "okay";
+ };
+@@ -176,7 +250,21 @@
+ 	status = "okay";
+ };
+ 
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usb_power_supply {
++	status = "okay";
++};
++
+ &usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_power-supply = <&usb_power_supply>;
++	usb0_vbus-supply = <&reg_usb0_vbus>;
+ 	usb1_vbus-supply = <&reg_usb1_vbus>;
+ 	usb2_vbus-supply = <&reg_usb2_vbus>;
+ 	status = "okay";
+diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
+index e7d84fe..dc31d47 100644
+--- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
++++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
+@@ -1,13 +1,52 @@
+ /*
+- * Copyright 2015 Hans de Goede <[email protected]>
++ * Copyright 2015 Jelle de Jong <[email protected]>
+  *
+- * Minimal dts file for the Wits Pro A20 DKT for u-boot only
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
+  *
+- * SPDX-License-Identifier:     GPL-2.0+ or X11
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
+  */
+ 
+ /dts-v1/;
+ #include "sun7i-a20.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/interrupt-controller/irq.h>
+ 
+ / {
+ 	model = "Wits Pro A20 DKT";
+@@ -20,6 +59,17 @@
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
++
++	mmc3_pwrseq: mmc3_pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		pinctrl-names = "default";
++		pinctrl-0 = <&vmmc3_pin_ap6xxx_wl_regon>;
++		reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
+ };
+ 
+ &ehci0 {
+@@ -42,6 +92,60 @@
+ 	};
+ };
+ 
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "okay";
++
++	axp209: pmic@34 {
++		reg = <0x34>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c2_pins_a>;
++	status = "okay";
++};
++
++#include "axp209.dtsi"
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <4>;
++	cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
++	cd-inverted;
++	status = "okay";
++};
++
++&mmc3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc3_pins_a>;
++	vmmc-supply = <&reg_vcc3v3>;
++	mmc-pwrseq = <&mmc3_pwrseq>;
++	bus-width = <4>;
++	non-removable;
++	status = "okay";
++
++	brcmf: bcrmf@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++		interrupt-parent = <&pio>;
++		interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
++		interrupt-names = "host-wake";
++	};
++};
++
+ &ohci0 {
+ 	status = "okay";
+ };
+@@ -50,8 +154,85 @@
+ 	status = "okay";
+ };
+ 
++&otg_sram {
++	status = "okay";
++};
++
++&pio {
++	vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin@0 {
++		allwinner,pins = "PH9";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	usb0_id_detect_pin: usb0_id_detect_pin@0 {
++		allwinner,pins = "PH4";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++	};
++};
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1450000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
++&reg_usb0_vbus {
++	status = "okay";
++};
++
++&reg_usb1_vbus {
++	status = "okay";
++};
++
++&reg_usb2_vbus {
++	status = "okay";
++};
++
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_pins_a>;
+ 	status = "okay";
+ };
++
++&usb_otg {
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usb_power_supply {
++	status = "okay";
++};
++
++&usbphy {
++	pinctrl-names = "default";
++	pinctrl-0 = <&usb0_id_detect_pin>;
++	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
++	usb0_vbus_power-supply = <&usb_power_supply>;
++	usb0_vbus-supply = <&reg_usb0_vbus>;
++	usb1_vbus-supply = <&reg_usb1_vbus>;
++	usb2_vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi
+index 71ab6b8..0940a78 100644
+--- a/arch/arm/dts/sun7i-a20.dtsi
++++ b/arch/arm/dts/sun7i-a20.dtsi
+@@ -47,6 +47,7 @@
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/thermal/thermal.h>
+ 
++#include <dt-bindings/clock/sun4i-a10-pll2.h>
+ #include <dt-bindings/dma/sun4i-a10.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+@@ -67,7 +68,7 @@
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0-hdmi";
+ 			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
+-				 <&ahb_gates 44>;
++				 <&ahb_gates 44>, <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 
+@@ -75,7 +76,8 @@
+ 			compatible = "allwinner,simple-framebuffer",
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0";
+-			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
++			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
++				 <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 
+@@ -84,7 +86,7 @@
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0-tve0";
+ 			clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
+-				 <&ahb_gates 44>;
++				 <&ahb_gates 44>, <&dram_gates 26>;
+ 			status = "disabled";
+ 		};
+ 	};
+@@ -107,7 +109,7 @@
+ 				720000	1200000
+ 				528000	1100000
+ 				312000	1000000
+-				144000	900000
++				144000	1000000
+ 				>;
+ 			#cooling-cells = <2>;
+ 			cooling-min-level = <0>;
+@@ -199,6 +201,15 @@
+ 			clock-output-names = "pll1";
+ 		};
+ 
++		pll2: clk@01c20008 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun4i-a10-pll2-clk";
++			reg = <0x01c20008 0x8>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll2-1x", "pll2-2x",
++					     "pll2-4x", "pll2-8x";
++		};
++
+ 		pll4: clk@01c20018 {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun7i-a20-pll4-clk";
+@@ -267,6 +278,19 @@
+ 			compatible = "allwinner,sun7i-a20-ahb-gates-clk";
+ 			reg = <0x01c20060 0x8>;
+ 			clocks = <&ahb>;
++			clock-indices = <0>, <1>,
++					<2>, <3>, <4>,
++					<5>, <6>, <7>, <8>,
++					<9>, <10>, <11>, <12>,
++					<13>, <14>, <16>,
++					<17>, <18>, <20>, <21>,
++					<22>, <23>, <25>,
++					<28>, <32>, <33>, <34>,
++					<35>, <36>, <37>, <40>,
++					<41>, <42>, <43>,
++					<44>, <45>, <46>,
++					<47>, <49>, <50>,
++					<52>;
+ 			clock-output-names = "ahb_usb0", "ahb_ehci0",
+ 				"ahb_ohci0", "ahb_ehci1", "ahb_ohci1",
+ 				"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
+@@ -295,6 +319,10 @@
+ 			compatible = "allwinner,sun7i-a20-apb0-gates-clk";
+ 			reg = <0x01c20068 0x4>;
+ 			clocks = <&apb0>;
++			clock-indices = <0>, <1>,
++					<2>, <3>, <4>,
++					<5>, <6>, <7>,
++					<8>, <10>;
+ 			clock-output-names = "apb0_codec", "apb0_spdif",
+ 				"apb0_ac97", "apb0_iis0", "apb0_iis1",
+ 				"apb0_pio", "apb0_ir0", "apb0_ir1",
+@@ -314,6 +342,12 @@
+ 			compatible = "allwinner,sun7i-a20-apb1-gates-clk";
+ 			reg = <0x01c2006c 0x4>;
+ 			clocks = <&apb1>;
++			clock-indices = <0>, <1>,
++					<2>, <3>, <4>,
++					<5>, <6>, <7>,
++					<15>, <16>, <17>,
++					<18>, <19>, <20>,
++					<21>, <22>, <23>;
+ 			clock-output-names = "apb1_i2c0", "apb1_i2c1",
+ 				"apb1_i2c2", "apb1_i2c3", "apb1_can",
+ 				"apb1_scr", "apb1_ps20", "apb1_ps21",
+@@ -442,6 +476,14 @@
+ 			clock-output-names = "ir1";
+ 		};
+ 
++		keypad_clk: clk@01c200c4 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c200c4 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "keypad";
++		};
++
+ 		usb_clk: clk@01c200cc {
+ 			#clock-cells = <1>;
+ 			#reset-cells = <1>;
+@@ -460,6 +502,48 @@
+ 			clock-output-names = "spi3";
+ 		};
+ 
++		dram_gates: clk@01c20100 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun4i-a10-dram-gates-clk";
++			reg = <0x01c20100 0x4>;
++			clocks = <&pll5 0>;
++			clock-indices = <0>,
++					<1>, <2>,
++					<3>,
++					<4>,
++					<5>, <6>,
++					<15>,
++					<24>, <25>,
++					<26>, <27>,
++					<28>, <29>;
++			clock-output-names = "dram_ve",
++					     "dram_csi0", "dram_csi1",
++					     "dram_ts",
++					     "dram_tvd",
++					     "dram_tve0", "dram_tve1",
++					     "dram_output",
++					     "dram_de_fe1", "dram_de_fe0",
++					     "dram_de_be0", "dram_de_be1",
++					     "dram_de_mp", "dram_ace";
++		};
++
++		ve_clk: clk@01c2013c {
++			#clock-cells = <0>;
++			#reset-cells = <0>;
++			compatible = "allwinner,sun4i-a10-ve-clk";
++			reg = <0x01c2013c 0x4>;
++			clocks = <&pll4>;
++			clock-output-names = "ve";
++		};
++
++		codec_clk: clk@01c20140 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-codec-clk";
++			reg = <0x01c20140 0x4>;
++			clocks = <&pll2 SUN4I_A10_PLL2_1X>;
++			clock-output-names = "codec";
++		};
++
+ 		mbus_clk: clk@01c2015c {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun5i-a13-mbus-clk";
+@@ -744,6 +828,14 @@
+ 			status = "disabled";
+ 		};
+ 
++		crypto: crypto-engine@01c15000 {
++			compatible = "allwinner,sun4i-a10-crypto";
++			reg = <0x01c15000 0x1000>;
++			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ahb_gates 5>, <&ss_clk>;
++			clock-names = "ahb", "mod";
++		};
++
+ 		spi2: spi@01c17000 {
+ 			compatible = "allwinner,sun4i-a10-spi";
+ 			reg = <0x01c17000 0x1000>;
+@@ -1159,6 +1251,19 @@
+ 			status = "disabled";
+ 		};
+ 
++		codec: codec@01c22c00 {
++			#sound-dai-cells = <0>;
++			compatible = "allwinner,sun7i-a20-codec";
++			reg = <0x01c22c00 0x40>;
++			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&apb0_gates 0>, <&codec_clk>;
++			clock-names = "apb", "codec";
++			dmas = <&dma SUN4I_DMA_NORMAL 19>,
++			       <&dma SUN4I_DMA_NORMAL 19>;
++			dma-names = "rx", "tx";
++			status = "disabled";
++		};
++
+ 		sid: eeprom@01c23800 {
+ 			compatible = "allwinner,sun7i-a20-sid";
+ 			reg = <0x01c23800 0x200>;
+diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
+index 9c4a55c..7e05e09 100644
+--- a/arch/arm/dts/sun8i-a23-a33.dtsi
++++ b/arch/arm/dts/sun8i-a23-a33.dtsi
+@@ -56,7 +56,7 @@
+ 		#size-cells = <1>;
+ 		ranges;
+ 
+-		framebuffer@0 {
++		simplefb_lcd: framebuffer@0 {
+ 			compatible = "allwinner,simple-framebuffer",
+ 				     "simple-framebuffer";
+ 			allwinner,pipeline = "de_be0-lcd0";
+@@ -175,27 +175,13 @@
+ 			clock-output-names = "apb1";
+ 		};
+ 
+-		ahb1_gates: clk@01c20060 {
+-			#clock-cells = <1>;
+-			compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
+-			reg = <0x01c20060 0x8>;
+-			clocks = <&ahb1>;
+-			clock-output-names = "ahb1_mipidsi", "ahb1_dma",
+-					"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
+-					"ahb1_nand", "ahb1_sdram",
+-					"ahb1_hstimer", "ahb1_spi0",
+-					"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
+-					"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
+-					"ahb1_csi", "ahb1_be",	"ahb1_fe",
+-					"ahb1_gpu", "ahb1_spinlock",
+-					"ahb1_drc";
+-		};
+-
+ 		apb1_gates: clk@01c20068 {
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun8i-a23-apb1-gates-clk";
+ 			reg = <0x01c20068 0x4>;
+ 			clocks = <&apb1>;
++			clock-indices = <0>, <5>,
++					<12>, <13>;
+ 			clock-output-names = "apb1_codec", "apb1_pio",
+ 					"apb1_daudio0",	"apb1_daudio1";
+ 		};
+@@ -213,6 +199,10 @@
+ 			compatible = "allwinner,sun8i-a23-apb2-gates-clk";
+ 			reg = <0x01c2006c 0x4>;
+ 			clocks = <&apb2>;
++			clock-indices = <0>, <1>,
++					<2>, <16>,
++					<17>, <18>,
++					<19>, <20>;
+ 			clock-output-names = "apb2_i2c0", "apb2_i2c1",
+ 					"apb2_i2c2", "apb2_uart0",
+ 					"apb2_uart1", "apb2_uart2",
+@@ -391,12 +381,19 @@
+ 				allwinner,pins = "PC5", "PC6", "PC8",
+ 						 "PC9", "PC10", "PC11",
+ 						 "PC12", "PC13", "PC14",
+-						 "PC15";
++						 "PC15", "PC16";
+ 				allwinner,function = "mmc2";
+ 				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+ 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 			};
+ 
++			pwm0_pins: pwm0 {
++				allwinner,pins = "PH0";
++				allwinner,function = "pwm0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
+ 			i2c0_pins_a: i2c0@0 {
+ 				allwinner,pins = "PH2", "PH3";
+ 				allwinner,function = "i2c0";
+@@ -451,6 +448,14 @@
+ 			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
+ 
++		pwm: pwm@01c21400 {
++			compatible = "allwinner,sun7i-a20-pwm";
++			reg = <0x01c21400 0xc>;
++			clocks = <&osc24M>;
++			#pwm-cells = <3>;
++			status = "disabled";
++		};
++
+ 		lradc: lradc@01c22800 {
+ 			compatible = "allwinner,sun4i-a10-lradc-keys";
+ 			reg = <0x01c22800 0x100>;
+@@ -574,6 +579,14 @@
+ 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
+ 
++		nmi_intc: interrupt-controller@01f00c0c {
++			compatible = "allwinner,sun6i-a31-sc-nmi";
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			reg = <0x01f00c0c 0x38>;
++			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
++		};
++
+ 		prcm@01f01400 {
+ 			compatible = "allwinner,sun8i-a23-prcm";
+ 			reg = <0x01f01400 0x200>;
+@@ -642,10 +655,18 @@
+ 			resets = <&apb0_rst 0>;
+ 			gpio-controller;
+ 			interrupt-controller;
++			#interrupt-cells = <3>;
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+ 			#gpio-cells = <3>;
+ 
++			r_rsb_pins: r_rsb {
++				allwinner,pins = "PL0", "PL1";
++				allwinner,function = "s_rsb";
++				allwinner,drive = <SUN4I_PINCTRL_20_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++			};
++
+ 			r_uart_pins_a: r_uart@0 {
+ 				allwinner,pins = "PL2", "PL3";
+ 				allwinner,function = "s_uart";
+@@ -653,5 +674,19 @@
+ 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 			};
+ 		};
++
++		r_rsb: rsb@01f03400 {
++			compatible = "allwinner,sun8i-a23-rsb";
++			reg = <0x01f03400 0x400>;
++			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&apb0_gates 3>;
++			clock-frequency = <3000000>;
++			resets = <&apb0_rst 3>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&r_rsb_pins>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
+ 	};
+ };
+diff --git a/arch/arm/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/dts/sun8i-a23-gt90h-v4.dts
+index 1aeb06c..b2ce284 100644
+--- a/arch/arm/dts/sun8i-a23-gt90h-v4.dts
++++ b/arch/arm/dts/sun8i-a23-gt90h-v4.dts
+@@ -47,15 +47,26 @@
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
++#include <dt-bindings/pwm/pwm.h>
+ 
+ / {
+-	model = "Allwinner GT90H Quad Core Tablet (v4)";
+-	compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a33";
++	model = "Allwinner GT90H Dual Core Tablet (v4)";
++	compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a23";
+ 
+ 	aliases {
+ 		serial0 = &r_uart;
+ 	};
+ 
++	backlight: backlight {
++		compatible = "pwm-backlight";
++		pinctrl-names = "default";
++		pinctrl-0 = <&bl_en_pin_gt90h>;
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <8>;
++		enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+@@ -106,8 +117,7 @@
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>;
+-	/* FIXME this really is aldo1, correct once we've pmic support */
+-	vmmc-supply = <&reg_vcc3v0>;
++	vmmc-supply = <&reg_aldo1>;
+ 	bus-width = <4>;
+ 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+ 	cd-inverted;
+@@ -115,6 +125,13 @@
+ };
+ 
+ &pio {
++	bl_en_pin_gt90h: bl_en_pin@0 {
++		allwinner,pins = "PH6";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	mmc0_cd_pin_gt90h: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PB4";
+ 		allwinner,function = "gpio_in";
+@@ -123,12 +140,106 @@
+ 	};
+ };
+ 
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm0_pins>;
++	status = "okay";
++};
++
++&r_rsb {
++	status = "okay";
++
++	axp22x: pmic@3a3 {
++		compatible = "x-powers,axp223";
++		reg = <0x3a3>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++		eldoin-supply = <&reg_dcdc1>;
++	};
++};
++
+ &r_uart {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&r_uart_pins_a>;
+ 	status = "okay";
+ };
+ 
++#include "axp22x.dtsi"
++
++&reg_aldo1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-io";
++};
++
++&reg_aldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <2350000>;
++	regulator-max-microvolt = <2650000>;
++	regulator-name = "vdd-dll";
++};
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-pll-avcc";
++};
++
++&reg_dc1sw {
++	regulator-name = "vcc-lcd";
++};
++
++&reg_dc5ldo {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpus";
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-sys";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
++&reg_dldo1 {
++	regulator-min-microvolt = <3300000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-wifi";
++};
++
++&reg_rtc_ldo {
++	regulator-name = "vcc-rtc";
++};
++
++&simplefb_lcd {
++	vcc-lcd-supply = <&reg_dc1sw>;
++};
++
+ /*
+  * FIXME for now we only support host mode and rely on u-boot to have
+  * turned on Vbus which is controlled by the axp223 pmic on the board.
+@@ -141,5 +252,6 @@
+ };
+ 
+ &usbphy {
++	usb1_vbus-supply = <&reg_dldo1>;
+ 	status = "okay";
+ };
+diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi
+index 2cc27c7..92e6616 100644
+--- a/arch/arm/dts/sun8i-a23.dtsi
++++ b/arch/arm/dts/sun8i-a23.dtsi
+@@ -50,6 +50,31 @@
+ 	};
+ 
+ 	clocks {
++		ahb1_gates: clk@01c20060 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
++			reg = <0x01c20060 0x8>;
++			clocks = <&ahb1>;
++			clock-indices = <1>, <6>,
++					<8>, <9>, <10>,
++					<13>, <14>,
++					<19>, <20>,
++					<21>, <24>, <26>,
++					<29>, <32>, <36>,
++					<40>, <44>, <46>,
++					<52>, <53>,
++					<54>, <57>;
++			clock-output-names = "ahb1_mipidsi", "ahb1_dma",
++					"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
++					"ahb1_nand", "ahb1_sdram",
++					"ahb1_hstimer", "ahb1_spi0",
++					"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
++					"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
++					"ahb1_csi", "ahb1_be",	"ahb1_fe",
++					"ahb1_gpu", "ahb1_msgbox",
++					"ahb1_spinlock", "ahb1_drc";
++		};
++
+ 		mbus_clk: clk@01c2015c {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun8i-a23-mbus-clk";
+diff --git a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
+index 1d5390d..fef6abc 100644
+--- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
++++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
+@@ -68,7 +68,7 @@
+ };
+ 
+ &lradc {
+-	vref-supply = <&reg_vcc3v0>;
++	vref-supply = <&reg_dcdc1>;
+ 	status = "okay";
+ 
+ 	button@200 {
+@@ -96,7 +96,7 @@
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>;
+-	vmmc-supply = <&reg_vcc3v0>;
++	vmmc-supply = <&reg_dcdc1>;
+ 	bus-width = <4>;
+ 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+ 	cd-inverted;
+@@ -106,13 +106,16 @@
+ &mmc2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc2_8bit_pins>;
+-	vmmc-supply = <&reg_vcc3v0>;
++	vmmc-supply = <&reg_dcdc1>;
+ 	bus-width = <8>;
+ 	non-removable;
++	cap-mmc-hw-reset;
+ 	status = "okay";
+ };
+ 
+ &mmc2_8bit_pins {
++	/* Increase drive strength for DDR modes */
++	allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+ 	/* eMMC is missing pull-ups */
+ 	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ };
+@@ -130,6 +133,80 @@
+ 	};
+ };
+ 
++&r_rsb {
++	status = "okay";
++
++	axp22x: pmic@3a3 {
++		compatible = "x-powers,axp223";
++		reg = <0x3a3>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++		eldoin-supply = <&reg_dcdc1>;
++	};
++};
++
++#include "axp22x.dtsi"
++
++&reg_aldo1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-io";
++};
++
++&reg_aldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <2350000>;
++	regulator-max-microvolt = <2650000>;
++	regulator-name = "vdd-dll";
++};
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-pll-avcc";
++};
++
++&reg_dc5ldo {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpus";
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-sys";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
++&reg_rtc_ldo {
++	regulator-name = "vcc-rtc";
++};
++
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_pins_b>;
+diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi
+index faa7d3c..001d840 100644
+--- a/arch/arm/dts/sun8i-a33.dtsi
++++ b/arch/arm/dts/sun8i-a33.dtsi
+@@ -72,6 +72,41 @@
+ 			clock-output-names = "pll11";
+ 		};
+ 
++		ahb1_gates: clk@01c20060 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun8i-a33-ahb1-gates-clk";
++			reg = <0x01c20060 0x8>;
++			clocks = <&ahb1>;
++			clock-indices = <1>, <5>,
++				        <6>, <8>, <9>,
++				        <10>, <13>, <14>,
++					<19>, <20>,
++					<21>, <24>, <26>,
++					<29>, <32>, <36>,
++					<40>, <44>, <46>,
++					<52>, <53>,
++					<54>, <57>,
++					<58>;
++			clock-output-names = "ahb1_mipidsi", "ahb1_ss",
++					"ahb1_dma","ahb1_mmc0", "ahb1_mmc1",
++					"ahb1_mmc2", "ahb1_nand", "ahb1_sdram",
++					"ahb1_hstimer", "ahb1_spi0",
++					"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
++					"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
++					"ahb1_csi", "ahb1_be",	"ahb1_fe",
++					"ahb1_gpu", "ahb1_msgbox",
++					"ahb1_spinlock", "ahb1_drc",
++					"ahb1_sat";
++		};
++
++		ss_clk: clk@01c2009c {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c2009c 0x4>;
++			clocks = <&osc24M>, <&pll6 0>;
++			clock-output-names = "ss";
++		};
++
+ 		mbus_clk: clk@01c2015c {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun8i-a23-mbus-clk";
+@@ -82,6 +117,16 @@
+ 	};
+ 
+ 	soc@01c00000 {
++		crypto: crypto-engine@01c15000 {
++			compatible = "allwinner,sun4i-a10-crypto";
++			reg = <0x01c15000 0x1000>;
++			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&ahb1_gates 5>, <&ss_clk>;
++			clock-names = "ahb", "mod";
++			resets = <&ahb1_rst 5>;
++			reset-names = "ahb";
++		};
++
+ 		usb_otg: usb@01c19000 {
+ 			compatible = "allwinner,sun8i-a33-musb";
+ 			reg = <0x01c19000 0x0400>;
+diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
+new file mode 100644
+index 0000000..88b1e09
+--- /dev/null
++++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
+@@ -0,0 +1,65 @@
++/*
++ * Copyright 2015 Chen-Yu Tsai
++ *
++ * Chen-Yu Tsai <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun8i-a83t.dtsi"
++
++/ {
++	model = "Cubietech Cubietruck Plus";
++	compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
++
++	aliases {
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_b>;
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
+index 245b819..d3473f8 100644
+--- a/arch/arm/dts/sun8i-a83t.dtsi
++++ b/arch/arm/dts/sun8i-a83t.dtsi
+@@ -52,12 +52,6 @@
+ / {
+ 	interrupt-parent = <&gic>;
+ 
+-	chosen {
+-		#address-cells = <1>;
+-		#size-cells = <1>;
+-		ranges;
+-	};
+-
+ 	cpus {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+@@ -85,6 +79,7 @@
+ 			device_type = "cpu";
+ 			reg = <3>;
+ 		};
++
+ 		cpu@100 {
+ 			compatible = "arm,cortex-a7";
+ 			device_type = "cpu";
+@@ -96,6 +91,7 @@
+ 			device_type = "cpu";
+ 			reg = <0x101>;
+ 		};
++
+ 		cpu@102 {
+ 			compatible = "arm,cortex-a7";
+ 			device_type = "cpu";
+@@ -109,18 +105,12 @@
+ 		};
+ 	};
+ 
+-	memory {
+-		reg = <0x40000000 0x80000000>;
+-	};
+-
+ 	timer {
+ 		compatible = "arm,armv7-timer";
+-		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+-		clock-frequency = <24000000>;
+-		arm,cpu-registers-not-fw-configured;
++		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
++			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
++			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
++			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ 	};
+ 
+ 	clocks {
+@@ -128,6 +118,7 @@
+ 		#size-cells = <1>;
+ 		ranges;
+ 
++		/* TODO: PRCM block has a mux for this. */
+ 		osc24M: osc24M_clk {
+ 			#clock-cells = <0>;
+ 			compatible = "fixed-clock";
+@@ -135,36 +126,39 @@
+ 			clock-output-names = "osc24M";
+ 		};
+ 
+-		osc32k: osc32k_clk {
++		/*
++		 * This is called "internal OSC" in some places.
++		 * It is an internal RC-based oscillator.
++		 * TODO: Its controls are in the PRCM block.
++		 */
++		osc16M: osc16M_clk {
+ 			#clock-cells = <0>;
+ 			compatible = "fixed-clock";
+-			clock-frequency = <32768>;
+-			clock-output-names = "osc32k";
++			clock-frequency = <16000000>;
++			clock-output-names = "osc16M";
++		};
++
++		osc16Md512: osc16Md512_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-factor-clock";
++			clock-div = <512>;
++			clock-mult = <1>;
++			clocks = <&osc16M>;
++			clock-output-names = "osc16M-d512";
+ 		};
+ 	};
+ 
+-	soc@01c00000 {
++	soc {
+ 		compatible = "simple-bus";
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+ 		ranges;
+ 
+-		gic: interrupt-controller@01c81000 {
+-			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+-			reg = <0x01c81000 0x1000>,
+-			      <0x01c82000 0x1000>,
+-			      <0x01c84000 0x2000>,
+-			      <0x01c86000 0x2000>;
+-			interrupt-controller;
+-			#interrupt-cells = <3>;
+-			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+-		};
+-
+ 		pio: pinctrl@01c20800 {
+ 			compatible = "allwinner,sun8i-a83t-pinctrl";
+ 			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+-			<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+-			<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
++				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ 			reg = <0x01c20800 0x400>;
+ 			clocks = <&osc24M>;
+ 			gpio-controller;
+@@ -172,27 +166,6 @@
+ 			#interrupt-cells = <3>;
+ 			#gpio-cells = <3>;
+ 
+-			i2c0_pins_a: i2c0@0 {
+-				allwinner,pins = "PH0", "PH1";
+-				allwinner,function = "i2c0";
+-				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+-				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+-			};
+-
+-			i2c1_pins_a: i2c1@0 {
+-				allwinner,pins = "PH2", "PH3";
+-				allwinner,function = "i2c1";
+-				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+-				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+-			};
+-
+-			i2c2_pins_a: i2c2@0 {
+-				allwinner,pins = "PH4", "PH5";
+-				allwinner,function = "i2c2";
+-				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+-				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+-			};
+-
+ 			mmc0_pins_a: mmc0@0 {
+ 				allwinner,pins = "PF0", "PF1", "PF2",
+ 						 "PF3", "PF4", "PF5";
+@@ -201,24 +174,6 @@
+ 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ 			};
+ 
+-			mmc1_pins_a: mmc1@0 {
+-				allwinner,pins = "PG0", "PG1", "PG2",
+-						 "PG3", "PG4", "PG5";
+-				allwinner,function = "mmc1";
+-				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+-				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+-			};
+-
+-			mmc2_8bit_pins: mmc2_8bit {
+-				allwinner,pins = "PC5", "PC6", "PC8",
+-						 "PC9", "PC10", "PC11",
+-						 "PC12", "PC13", "PC14",
+-						 "PC15";
+-				allwinner,function = "mmc2";
+-				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+-				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+-			};
+-
+ 			uart0_pins_a: uart0@0 {
+ 				allwinner,pins = "PF2", "PF4";
+ 				allwinner,function = "uart0";
+@@ -234,6 +189,21 @@
+ 			};
+ 		};
+ 
++		timer@01c20c00 {
++			compatible = "allwinner,sun4i-a10-timer";
++			reg = <0x01c20c00 0xa0>;
++			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&osc24M>;
++		};
++
++		watchdog@01c20ca0 {
++			compatible = "allwinner,sun6i-a31-wdt";
++			reg = <0x01c20ca0 0x20>;
++			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&osc24M>;
++		};
++
+ 		uart0: serial@01c28000 {
+ 			compatible = "snps,dw-apb-uart";
+ 			reg = <0x01c28000 0x400>;
+@@ -243,5 +213,16 @@
+ 			clocks = <&osc24M>;
+ 			status = "disabled";
+ 		};
++
++		gic: interrupt-controller@01c81000 {
++			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
++			reg = <0x01c81000 0x1000>,
++			      <0x01c82000 0x1000>,
++			      <0x01c84000 0x2000>,
++			      <0x01c86000 0x2000>;
++			interrupt-controller;
++			#interrupt-cells = <3>;
++			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
++		};
+ 	};
+ };
+diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
+index 4b25dcc..30ccca0 100644
+--- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts
++++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
+@@ -45,6 +45,7 @@
+ #include "sunxi-common-regulators.dtsi"
+ 
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+ / {
+@@ -58,6 +59,43 @@
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&leds_opc>;
++
++		status_led {
++			label = "status:red:user";
++			gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
++		};
++	};
++
++	r_leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&leds_r_opc>;
++
++		tx {
++			label = "pwr:green:user";
++			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++		};
++	};
++
++	r_gpio_keys {
++		compatible = "gpio-keys";
++		input-name = "sw4";
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&sw_r_opc>;
++
++		sw4@0 {
++			label = "sw4";
++			linux,code = <BTN_0>;
++			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
++		};
++	};
+ };
+ 
+ &ehci1 {
+@@ -72,6 +110,12 @@
+ 	status = "okay";
+ };
+ 
++&ir {
++	pinctrl-names = "default";
++	pinctrl-0 = <&ir_pins_a>;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+@@ -94,6 +138,31 @@
+ 	status = "okay";
+ };
+ 
++&pio {
++	leds_opc: led_pins@0 {
++		allwinner,pins = "PA15";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&r_pio {
++	leds_r_opc: led_pins@0 {
++		allwinner,pins = "PL10";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	sw_r_opc: key_pins@0 {
++		allwinner,pins = "PL03";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_pins_a>;
+diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
+index 1cb6c66..900ec4f 100644
+--- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts
++++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
+@@ -45,6 +45,7 @@
+ #include "sunxi-common-regulators.dtsi"
+ 
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
+ 
+ / {
+@@ -70,6 +71,68 @@
+ 		enable-active-high;
+ 		gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ 	};
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&leds_opc>;
++
++		status_led {
++			label = "status:red:user";
++			gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
++		};
++	};
++
++	r_leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&leds_r_opc>;
++
++		tx {
++			label = "pwr:green:user";
++			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++		};
++	};
++
++	r_gpio_keys {
++		compatible = "gpio-keys";
++		input-name = "sw4";
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&sw_r_opc>;
++
++		sw4@0 {
++			label = "sw4";
++			linux,code = <BTN_0>;
++			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
++		};
++	};
++};
++
++&pio {
++	leds_opc: led_pins@0 {
++		allwinner,pins = "PA15";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&r_pio {
++	leds_r_opc: led_pins@0 {
++		allwinner,pins = "PL10";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
++	sw_r_opc: key_pins@0 {
++		allwinner,pins = "PL03";
++		allwinner,function = "gpio_in";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
+ };
+ 
+ &ehci1 {
+diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi
+index 0faa38a..c2f63c5 100644
+--- a/arch/arm/dts/sun8i-h3.dtsi
++++ b/arch/arm/dts/sun8i-h3.dtsi
+@@ -83,12 +83,6 @@
+ 			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ 			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ 			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+-		clock-frequency = <24000000>;
+-		arm,cpu-registers-not-fw-configured;
+-	};
+-
+-	memory {
+-		reg = <0x40000000 0x80000000>;
+ 	};
+ 
+ 	clocks {
+@@ -131,15 +125,24 @@
+ 			compatible = "allwinner,sun6i-a31-pll6-clk";
+ 			reg = <0x01c20028 0x4>;
+ 			clocks = <&osc24M>;
+-			clock-output-names = "pll6", "pll6x2", "pll6d2";
++			clock-output-names = "pll6", "pll6x2";
+ 		};
+ 
+-		pll8: clk@01c20044 {
+-			#clock-cells = <1>;
+-			compatible = "allwinner,sun6i-a31-pll6-clk";
+-			reg = <0x01c20044 0x4>;
+-			clocks = <&osc24M>;
+-			clock-output-names = "pll8", "pll8x2";
++		pll6d2: pll6d2_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-factor-clock";
++			clock-div = <2>;
++			clock-mult = <1>;
++			clocks = <&pll6 0>;
++			clock-output-names = "pll6d2";
++		};
++
++		/* dummy clock until pll6 can be reused */
++		pll8: pll8_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <1>;
++			clock-output-names = "pll8";
+ 		};
+ 
+ 		cpu: cpu_clk@01c20050 {
+@@ -170,7 +173,7 @@
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun8i-h3-ahb2-clk";
+ 			reg = <0x01c2005c 0x4>;
+-			clocks = <&ahb1>, <&pll6 2>;
++			clocks = <&ahb1>, <&pll6d2>;
+ 			clock-output-names = "ahb2";
+ 		};
+ 
+@@ -213,34 +216,34 @@
+ 					<76>, <77>, <78>,
+ 					<96>, <97>, <98>,
+ 					<112>, <113>,
+-					<114>, <115>, <116>,
+-					<128>, <135>;
+-			clock-output-names = "ahb1_ce", "ahb1_dma", "ahb1_mmc0",
+-					"ahb1_mmc1", "ahb1_mmc2", "ahb1_nand",
+-					"ahb1_sdram", "ahb2_gmac", "ahb1_ts",
+-					"ahb1_hstimer", "ahb1_spi0",
+-					"ahb1_spi1", "ahb1_otg",
+-					"ahb1_otg_ehci0", "ahb1_ehic1",
+-					"ahb1_ehic2", "ahb1_ehic3",
+-					"ahb1_otg_ohci0", "ahb2_ohic1",
+-					"ahb2_ohic2", "ahb2_ohic3", "ahb1_ve",
+-					"ahb1_lcd0", "ahb1_lcd1", "ahb1_deint",
+-					"ahb1_csi", "ahb1_tve", "ahb1_hdmi",
+-					"ahb1_de", "ahb1_gpu", "ahb1_msgbox",
+-					"ahb1_spinlock", "apb1_codec",
+-					"apb1_spdif", "apb1_pio", "apb1_ths",
+-					"apb1_i2s0", "apb1_i2s1", "apb1_i2s2",
+-					"apb2_i2c0", "apb2_i2c1", "apb2_i2c2",
+-					"apb2_uart0", "apb2_uart1",
+-					"apb2_uart2", "apb2_uart3", "apb2_scr",
+-					"ahb1_ephy", "ahb1_dbg";
++					<114>, <115>,
++					<116>, <128>, <135>;
++			clock-output-names = "bus_ce", "bus_dma", "bus_mmc0",
++					     "bus_mmc1", "bus_mmc2", "bus_nand",
++					     "bus_sdram", "bus_gmac", "bus_ts",
++					     "bus_hstimer", "bus_spi0",
++					     "bus_spi1", "bus_otg",
++					     "bus_otg_ehci0", "bus_ehci1",
++					     "bus_ehci2", "bus_ehci3",
++					     "bus_otg_ohci0", "bus_ohci1",
++					     "bus_ohci2", "bus_ohci3", "bus_ve",
++					     "bus_lcd0", "bus_lcd1", "bus_deint",
++					     "bus_csi", "bus_tve", "bus_hdmi",
++					     "bus_de", "bus_gpu", "bus_msgbox",
++					     "bus_spinlock", "bus_codec",
++					     "bus_spdif", "bus_pio", "bus_ths",
++					     "bus_i2s0", "bus_i2s1", "bus_i2s2",
++					     "bus_i2c0", "bus_i2c1", "bus_i2c2",
++					     "bus_uart0", "bus_uart1",
++					     "bus_uart2", "bus_uart3",
++					     "bus_scr", "bus_ephy", "bus_dbg";
+ 		};
+ 
+ 		mmc0_clk: clk@01c20088 {
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c20088 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+ 			clock-output-names = "mmc0",
+ 					     "mmc0_output",
+ 					     "mmc0_sample";
+@@ -250,7 +253,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c2008c 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+ 			clock-output-names = "mmc1",
+ 					     "mmc1_output",
+ 					     "mmc1_sample";
+@@ -260,7 +263,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c20090 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+ 			clock-output-names = "mmc2",
+ 					     "mmc2_output",
+ 					     "mmc2_sample";
+@@ -285,6 +288,33 @@
+ 			clocks = <&osc24M>, <&pll6 1>, <&pll5>;
+ 			clock-output-names = "mbus";
+ 		};
++
++		apb0: apb0_clk {
++			compatible = "fixed-factor-clock";
++			#clock-cells = <0>;
++			clock-div = <1>;
++			clock-mult = <1>;
++			clocks = <&osc24M>;
++			clock-output-names = "apb0";
++		};
++
++		apb0_gates: clk@01f01428 {
++			compatible = "allwinner,sun8i-h3-apb0-gates-clk",
++				     "allwinner,sun4i-a10-gates-clk";
++			reg = <0x01f01428 0x4>;
++			#clock-cells = <1>;
++			clocks = <&apb0>;
++			clock-indices = <0>, <1>;
++			clock-output-names = "apb0_pio", "apb0_ir";
++		};
++
++		ir_clk: ir_clk@01f01454 {
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01f01454 0x4>;
++			#clock-cells = <0>;
++			clocks = <&osc32k>, <&osc24M>;
++			clock-output-names = "ir";
++		};
+ 	};
+ 
+ 	soc {
+@@ -298,7 +328,7 @@
+ 			reg = <0x01c02000 0x1000>;
+ 			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 6>;
+-			resets = <&bus_rst 6>;
++			resets = <&ahb_rst 6>;
+ 			#dma-cells = <1>;
+ 		};
+ 
+@@ -313,7 +343,7 @@
+ 				      "mmc",
+ 				      "output",
+ 				      "sample";
+-			resets = <&bus_rst 8>;
++			resets = <&ahb_rst 8>;
+ 			reset-names = "ahb";
+ 			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ 			status = "disabled";
+@@ -332,7 +362,7 @@
+ 				      "mmc",
+ 				      "output",
+ 				      "sample";
+-			resets = <&bus_rst 9>;
++			resets = <&ahb_rst 9>;
+ 			reset-names = "ahb";
+ 			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ 			status = "disabled";
+@@ -351,7 +381,7 @@
+ 				      "mmc",
+ 				      "output",
+ 				      "sample";
+-			resets = <&bus_rst 10>;
++			resets = <&ahb_rst 10>;
+ 			reset-names = "ahb";
+ 			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ 			status = "disabled";
+@@ -396,7 +426,7 @@
+ 			reg = <0x01c1b000 0x100>;
+ 			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 25>, <&bus_gates 29>;
+-			resets = <&bus_rst 25>, <&bus_rst 29>;
++			resets = <&ahb_rst 25>, <&ahb_rst 29>;
+ 			phys = <&usbphy 1>;
+ 			phy-names = "usb";
+ 			status = "disabled";
+@@ -408,7 +438,7 @@
+ 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 29>, <&bus_gates 25>,
+ 				 <&usb_clk 17>;
+-			resets = <&bus_rst 29>, <&bus_rst 25>;
++			resets = <&ahb_rst 29>, <&ahb_rst 25>;
+ 			phys = <&usbphy 1>;
+ 			phy-names = "usb";
+ 			status = "disabled";
+@@ -419,7 +449,7 @@
+ 			reg = <0x01c1c000 0x100>;
+ 			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 26>, <&bus_gates 30>;
+-			resets = <&bus_rst 26>, <&bus_rst 30>;
++			resets = <&ahb_rst 26>, <&ahb_rst 30>;
+ 			phys = <&usbphy 2>;
+ 			phy-names = "usb";
+ 			status = "disabled";
+@@ -431,7 +461,7 @@
+ 			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 30>, <&bus_gates 26>,
+ 				 <&usb_clk 18>;
+-			resets = <&bus_rst 30>, <&bus_rst 26>;
++			resets = <&ahb_rst 30>, <&ahb_rst 26>;
+ 			phys = <&usbphy 2>;
+ 			phy-names = "usb";
+ 			status = "disabled";
+@@ -442,7 +472,7 @@
+ 			reg = <0x01c1d000 0x100>;
+ 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 27>, <&bus_gates 31>;
+-			resets = <&bus_rst 27>, <&bus_rst 31>;
++			resets = <&ahb_rst 27>, <&ahb_rst 31>;
+ 			phys = <&usbphy 3>;
+ 			phy-names = "usb";
+ 			status = "disabled";
+@@ -454,7 +484,7 @@
+ 			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&bus_gates 31>, <&bus_gates 27>,
+ 				 <&usb_clk 19>;
+-			resets = <&bus_rst 31>, <&bus_rst 27>;
++			resets = <&ahb_rst 31>, <&ahb_rst 27>;
+ 			phys = <&usbphy 3>;
+ 			phy-names = "usb";
+ 			status = "disabled";
+@@ -469,7 +499,7 @@
+ 			gpio-controller;
+ 			#gpio-cells = <3>;
+ 			interrupt-controller;
+-			#interrupt-cells = <2>;
++			#interrupt-cells = <3>;
+ 
+ 			uart0_pins_a: uart0@0 {
+ 				allwinner,pins = "PA4", "PA5";
+@@ -502,10 +532,22 @@
+ 			};
+ 		};
+ 
+-		bus_rst: reset@01c202c0 {
++		ahb_rst: reset@01c202c0 {
+ 			#reset-cells = <1>;
+-			compatible = "allwinner,sun8i-h3-bus-reset";
+-			reg = <0x01c202c0 0x1c>;
++			compatible = "allwinner,sun6i-a31-ahb1-reset";
++			reg = <0x01c202c0 0xc>;
++		};
++
++		apb1_rst: reset@01c202d0 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202d0 0x4>;
++		};
++
++		apb2_rst: reset@01c202d8 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202d8 0x4>;
+ 		};
+ 
+ 		timer@01c20c00 {
+@@ -529,7 +571,7 @@
+ 			reg-shift = <2>;
+ 			reg-io-width = <4>;
+ 			clocks = <&bus_gates 112>;
+-			resets = <&bus_rst 144>;
++			resets = <&apb2_rst 16>;
+ 			dmas = <&dma 6>, <&dma 6>;
+ 			dma-names = "rx", "tx";
+ 			status = "disabled";
+@@ -542,7 +584,7 @@
+ 			reg-shift = <2>;
+ 			reg-io-width = <4>;
+ 			clocks = <&bus_gates 113>;
+-			resets = <&bus_rst 145>;
++			resets = <&apb2_rst 17>;
+ 			dmas = <&dma 7>, <&dma 7>;
+ 			dma-names = "rx", "tx";
+ 			status = "disabled";
+@@ -555,7 +597,7 @@
+ 			reg-shift = <2>;
+ 			reg-io-width = <4>;
+ 			clocks = <&bus_gates 114>;
+-			resets = <&bus_rst 146>;
++			resets = <&apb2_rst 18>;
+ 			dmas = <&dma 8>, <&dma 8>;
+ 			dma-names = "rx", "tx";
+ 			status = "disabled";
+@@ -568,7 +610,7 @@
+ 			reg-shift = <2>;
+ 			reg-io-width = <4>;
+ 			clocks = <&bus_gates 115>;
+-			resets = <&bus_rst 147>;
++			resets = <&apb2_rst 19>;
+ 			dmas = <&dma 9>, <&dma 9>;
+ 			dma-names = "rx", "tx";
+ 			status = "disabled";
+@@ -591,5 +633,40 @@
+ 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
++
++		apb0_reset: reset@01f014b0 {
++			reg = <0x01f014b0 0x4>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			#reset-cells = <1>;
++		};
++
++		ir: ir@01f02000 {
++			compatible = "allwinner,sun5i-a13-ir";
++			clocks = <&apb0_gates 1>, <&ir_clk>;
++			clock-names = "apb", "ir";
++			resets = <&apb0_reset 1>;
++			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++			reg = <0x01f02000 0x40>;
++			status = "disabled";
++		};
++
++		r_pio: pinctrl@01f02c00 {
++			compatible = "allwinner,sun8i-h3-r-pinctrl";
++			reg = <0x01f02c00 0x400>;
++			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&apb0_gates 0>;
++			resets = <&apb0_reset 0>;
++			gpio-controller;
++			#gpio-cells = <3>;
++			interrupt-controller;
++			#interrupt-cells = <3>;
++
++			ir_pins_a: ir@0 {
++				allwinner,pins = "PL11";
++				allwinner,function = "s_cir_rx";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++		};
+ 	};
+ };
+diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi
+index 07cd268..346a49d 100644
+--- a/arch/arm/dts/sun8i-q8-common.dtsi
++++ b/arch/arm/dts/sun8i-q8-common.dtsi
+@@ -41,11 +41,23 @@
+  */
+ #include "sunxi-q8-common.dtsi"
+ 
++#include <dt-bindings/pwm/pwm.h>
++
+ / {
+ 	aliases {
+ 		serial0 = &r_uart;
+ 	};
+ 
++	backlight: backlight {
++		compatible = "pwm-backlight";
++		pinctrl-names = "default";
++		pinctrl-0 = <&bl_en_pin_q8>;
++		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
++		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
++		default-brightness-level = <8>;
++		enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
++	};
++
+ 	chosen {
+ 		stdout-path = "serial0:115200n8";
+ 	};
+@@ -54,7 +66,7 @@
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>;
+-	vmmc-supply = <&reg_vcc3v0>;
++	vmmc-supply = <&reg_dcdc1>;
+ 	bus-width = <4>;
+ 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+ 	cd-inverted;
+@@ -77,8 +89,90 @@
+ 	};
+ };
+ 
++&r_rsb {
++	status = "okay";
++
++	axp22x: pmic@3a3 {
++		compatible = "x-powers,axp223";
++		reg = <0x3a3>;
++		interrupt-parent = <&nmi_intc>;
++		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++		eldoin-supply = <&reg_dcdc1>;
++	};
++};
++
++#include "axp22x.dtsi"
++
++&reg_aldo1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-io";
++};
++
++&reg_aldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <2350000>;
++	regulator-max-microvolt = <2650000>;
++	regulator-name = "vdd-dll";
++};
++
++&reg_aldo3 {
++	regulator-always-on;
++	regulator-min-microvolt = <2700000>;
++	regulator-max-microvolt = <3300000>;
++	regulator-name = "vcc-pll-avcc";
++};
++
++&reg_dc1sw {
++	regulator-name = "vcc-lcd";
++};
++
++&reg_dc5ldo {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpus";
++};
++
++&reg_dcdc1 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "vcc-3v0";
++};
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-sys";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <900000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc5 {
++	regulator-always-on;
++	regulator-min-microvolt = <1500000>;
++	regulator-max-microvolt = <1500000>;
++	regulator-name = "vcc-dram";
++};
++
++&reg_rtc_ldo {
++	regulator-name = "vcc-rtc";
++};
++
+ &r_uart {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&r_uart_pins_a>;
+ 	status = "okay";
+ };
++
++&simplefb_lcd {
++	vcc-lcd-supply = <&reg_dc1sw>;
++};
+diff --git a/arch/arm/dts/sun9i-a80-cubieboard4.dts b/arch/arm/dts/sun9i-a80-cubieboard4.dts
+index 6484dcf..eb2ccd0 100644
+--- a/arch/arm/dts/sun9i-a80-cubieboard4.dts
++++ b/arch/arm/dts/sun9i-a80-cubieboard4.dts
+@@ -62,9 +62,31 @@
+ 		stdout-path = "serial0:115200n8";
+ 	};
+ 
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&led_pins_cubieboard4>;
++
++		green {
++			label = "cubieboard4:green:usr";
++			gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
++		};
++
++		red {
++			label = "cubieboard4:red:usr";
++			gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
++		};
++	};
+ };
+ 
+ &pio {
++	led_pins_cubieboard4: led-pins@0 {
++		allwinner,pins = "PH6", "PH17";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++
+ 	mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {
+ 		allwinner,pins = "PH18";
+ 		allwinner,function = "gpio_in";
+@@ -89,6 +111,20 @@
+ 	vmmc-supply = <&reg_vcc3v0>;
+ 	bus-width = <8>;
+ 	non-removable;
++	cap-mmc-hw-reset;
++	status = "okay";
++};
++
++&mmc2_8bit_pins {
++	/* Increase drive strength for DDR modes */
++	allwinner,drive = <SUN4I_PINCTRL_40_MA>;
++};
++
++&r_ir {
++	status = "okay";
++};
++
++&r_rsb {
+ 	status = "okay";
+ };
+ 
+diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts
+index 6ce4b5e..d7a20d9 100644
+--- a/arch/arm/dts/sun9i-a80-optimus.dts
++++ b/arch/arm/dts/sun9i-a80-optimus.dts
+@@ -65,7 +65,7 @@
+ 	leds {
+ 		compatible = "gpio-leds";
+ 		pinctrl-names = "default";
+-		pinctrl-0 = <&led_pins_optimus>;
++		pinctrl-0 = <&led_pins_optimus>, <&led_r_pins_optimus>;
+ 
+ 		/* The LED names match those found on the board */
+ 
+@@ -74,7 +74,10 @@
+ 			gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
+ 		};
+ 
+-		/* led3 is on PM15, in R_PIO */
++		led3 {
++			label = "optimus:led3:usr";
++			gpios = <&r_pio 1 15 GPIO_ACTIVE_HIGH>; /* PM15 */
++		};
+ 
+ 		led4 {
+ 			label = "optimus:led4:usr";
+@@ -106,17 +109,6 @@
+ 	status = "okay";
+ };
+ 
+-&i2c3 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&i2c3_pins_a>;
+-	status = "okay";
+-};
+-
+-&i2c3_pins_a {
+-	/* Enable internal pull-up */
+-	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+-};
+-
+ &ohci0 {
+ 	status = "okay";
+ };
+@@ -171,30 +163,42 @@
+ 	vmmc-supply = <&reg_vcc3v0>;
+ 	bus-width = <8>;
+ 	non-removable;
++	cap-mmc-hw-reset;
+ 	status = "okay";
+ };
+ 
++&mmc2_8bit_pins {
++	/* Increase drive strength for DDR modes */
++	allwinner,drive = <SUN4I_PINCTRL_40_MA>;
++};
++
+ &reg_usb1_vbus {
+ 	pinctrl-0 = <&usb1_vbus_pin_optimus>;
+ 	gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+ 	status = "okay";
+ };
+ 
+-&uart0 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&uart0_pins_a>;
++&r_ir {
+ 	status = "okay";
+ };
+ 
+-&uart4 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&uart4_pins_a>;
++&r_pio {
++	led_r_pins_optimus: led-pins@1 {
++		allwinner,pins = "PM15";
++		allwinner,function = "gpio_out";
++		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++	};
++};
++
++&r_rsb {
+ 	status = "okay";
+ };
+ 
+-&uart4_pins_a {
+-	/* Enable internal pull-up */
+-	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
+ };
+ 
+ &usbphy1 {
+diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi
+index a43ad77..f68b324 100644
+--- a/arch/arm/dts/sun9i-a80.dtsi
++++ b/arch/arm/dts/sun9i-a80.dtsi
+@@ -128,6 +128,17 @@
+ 		 */
+ 		ranges = <0 0 0 0x20000000>;
+ 
++		/*
++		 * This clock is actually configurable from the PRCM address
++		 * space. The external 24M oscillator can be turned off, and
++		 * the clock switched to an internal 16M RC oscillator. Under
++		 * normal operation there's no reason to do this, and the
++		 * default is to use the external good one, so just model this
++		 * as a fixed clock. Also it is not entirely clear if the
++		 * osc24M mux in the PRCM affects the entire clock tree, which
++		 * would also throw all the PLL clock rates off, or just the
++		 * downstream clocks in the PRCM.
++		 */
+ 		osc24M: osc24M_clk {
+ 			#clock-cells = <0>;
+ 			compatible = "fixed-clock";
+@@ -135,6 +146,13 @@
+ 			clock-output-names = "osc24M";
+ 		};
+ 
++		/*
++		 * The 32k clock is from an external source, normally the
++		 * AC100 codec/RTC chip. This clock is by default enabled
++		 * and clocked at 32768 Hz, from the oscillator connected
++		 * to the AC100. It is configurable, but no such driver or
++		 * bindings exist yet.
++		 */
+ 		osc32k: osc32k_clk {
+ 			#clock-cells = <0>;
+ 			compatible = "fixed-clock";
+@@ -164,6 +182,14 @@
+ 					     "usb_phy2", "usb_hsic_12M";
+ 		};
+ 
++		pll3: clk@06000008 {
++			/* placeholder until implemented */
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-rate = <0>;
++			clock-output-names = "pll3";
++		};
++
+ 		pll4: clk@0600000c {
+ 			#clock-cells = <0>;
+ 			compatible = "allwinner,sun9i-a80-pll4-clk";
+@@ -277,9 +303,12 @@
+ 			compatible = "allwinner,sun9i-a80-ahb0-gates-clk";
+ 			reg = <0x06000580 0x4>;
+ 			clocks = <&ahb0>;
+-			clock-indices = <0>, <1>, <3>, <5>, <8>, <12>, <13>,
+-					<14>, <15>, <16>, <18>, <20>, <21>,
+-					<22>, <23>;
++			clock-indices = <0>, <1>, <3>,
++					<5>, <8>, <12>,
++					<13>, <14>,
++					<15>, <16>, <18>,
++					<20>, <21>, <22>,
++					<23>;
+ 			clock-output-names = "ahb0_fd", "ahb0_ve", "ahb0_gpu",
+ 					"ahb0_ss", "ahb0_sd", "ahb0_nand1",
+ 					"ahb0_nand0", "ahb0_sdram",
+@@ -293,7 +322,10 @@
+ 			compatible = "allwinner,sun9i-a80-ahb1-gates-clk";
+ 			reg = <0x06000584 0x4>;
+ 			clocks = <&ahb1>;
+-			clock-indices = <0>, <1>, <17>, <21>, <22>, <23>, <24>;
++			clock-indices = <0>, <1>,
++					<17>, <21>,
++					<22>, <23>,
++					<24>;
+ 			clock-output-names = "ahb1_usbotg", "ahb1_usbhci",
+ 					"ahb1_gmac", "ahb1_msgbox",
+ 					"ahb1_spinlock", "ahb1_hstimer",
+@@ -305,8 +337,9 @@
+ 			compatible = "allwinner,sun9i-a80-ahb2-gates-clk";
+ 			reg = <0x06000588 0x4>;
+ 			clocks = <&ahb2>;
+-			clock-indices = <0>, <1>, <2>, <4>, <5>, <7>, <8>,
+-					<11>;
++			clock-indices = <0>, <1>,
++					<2>, <4>, <5>,
++					<7>, <8>, <11>;
+ 			clock-output-names = "ahb2_lcd0", "ahb2_lcd1",
+ 					"ahb2_edp", "ahb2_csi", "ahb2_hdmi",
+ 					"ahb2_de", "ahb2_mp", "ahb2_mipi_dsi";
+@@ -317,8 +350,10 @@
+ 			compatible = "allwinner,sun9i-a80-apb0-gates-clk";
+ 			reg = <0x06000590 0x4>;
+ 			clocks = <&apb0>;
+-			clock-indices = <1>, <5>, <11>, <12>, <13>, <15>,
+-					<17>, <18>, <19>;
++			clock-indices = <1>, <5>,
++					<11>, <12>, <13>,
++					<15>, <17>, <18>,
++					<19>;
+ 			clock-output-names = "apb0_spdif", "apb0_pio",
+ 					"apb0_ac97", "apb0_i2s0", "apb0_i2s1",
+ 					"apb0_lradc", "apb0_gpadc", "apb0_twd",
+@@ -330,14 +365,79 @@
+ 			compatible = "allwinner,sun9i-a80-apb1-gates-clk";
+ 			reg = <0x06000594 0x4>;
+ 			clocks = <&apb1>;
+-			clock-indices = <0>, <1>, <2>, <3>, <4>,
+-					<16>, <17>, <18>, <19>, <20>, <21>;
++			clock-indices = <0>, <1>,
++					<2>, <3>, <4>,
++					<16>, <17>,
++					<18>, <19>,
++					<20>, <21>;
+ 			clock-output-names = "apb1_i2c0", "apb1_i2c1",
+ 					"apb1_i2c2", "apb1_i2c3", "apb1_i2c4",
+ 					"apb1_uart0", "apb1_uart1",
+ 					"apb1_uart2", "apb1_uart3",
+ 					"apb1_uart4", "apb1_uart5";
+ 		};
++
++		cpus_clk: clk@08001410 {
++			compatible = "allwinner,sun9i-a80-cpus-clk";
++			reg = <0x08001410 0x4>;
++			#clock-cells = <0>;
++			clocks = <&osc32k>, <&osc24M>, <&pll4>, <&pll3>;
++			clock-output-names = "cpus";
++		};
++
++		ahbs: ahbs_clk {
++			compatible = "fixed-factor-clock";
++			#clock-cells = <0>;
++			clock-div = <1>;
++			clock-mult = <1>;
++			clocks = <&cpus_clk>;
++			clock-output-names = "ahbs";
++		};
++
++		apbs: clk@0800141c {
++			compatible = "allwinner,sun8i-a23-apb0-clk";
++			reg = <0x0800141c 0x4>;
++			#clock-cells = <0>;
++			clocks = <&ahbs>;
++			clock-output-names = "apbs";
++		};
++
++		apbs_gates: clk@08001428 {
++			compatible = "allwinner,sun9i-a80-apbs-gates-clk";
++			reg = <0x08001428 0x4>;
++			#clock-cells = <1>;
++			clocks = <&apbs>;
++			clock-indices = <0>, <1>,
++					<2>, <3>,
++					<4>, <5>,
++					<6>, <7>,
++					<12>, <13>,
++					<16>, <17>,
++					<18>, <20>;
++			clock-output-names = "apbs_pio", "apbs_ir",
++					"apbs_timer", "apbs_rsb",
++					"apbs_uart", "apbs_1wire",
++					"apbs_i2c0", "apbs_i2c1",
++					"apbs_ps2_0", "apbs_ps2_1",
++					"apbs_dma", "apbs_i2s0",
++					"apbs_i2s1", "apbs_twd";
++		};
++
++		r_1wire_clk: clk@08001450 {
++			reg = <0x08001450 0x4>;
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			clocks = <&osc32k>, <&osc24M>;
++			clock-output-names = "r_1wire";
++		};
++
++		r_ir_clk: clk@08001454 {
++			reg = <0x08001454 0x4>;
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			clocks = <&osc32k>, <&osc24M>;
++			clock-output-names = "r_ir";
++		};
+ 	};
+ 
+ 	soc {
+@@ -443,7 +543,7 @@
+ 		};
+ 
+ 		mmc0: mmc@01c0f000 {
+-			compatible = "allwinner,sun5i-a13-mmc";
++			compatible = "allwinner,sun9i-a80-mmc";
+ 			reg = <0x01c0f000 0x1000>;
+ 			clocks = <&mmc_config_clk 0>, <&mmc0_clk 0>,
+ 				 <&mmc0_clk 1>, <&mmc0_clk 2>;
+@@ -457,7 +557,7 @@
+ 		};
+ 
+ 		mmc1: mmc@01c10000 {
+-			compatible = "allwinner,sun5i-a13-mmc";
++			compatible = "allwinner,sun9i-a80-mmc";
+ 			reg = <0x01c10000 0x1000>;
+ 			clocks = <&mmc_config_clk 1>, <&mmc1_clk 0>,
+ 				 <&mmc1_clk 1>, <&mmc1_clk 2>;
+@@ -471,7 +571,7 @@
+ 		};
+ 
+ 		mmc2: mmc@01c11000 {
+-			compatible = "allwinner,sun5i-a13-mmc";
++			compatible = "allwinner,sun9i-a80-mmc";
+ 			reg = <0x01c11000 0x1000>;
+ 			clocks = <&mmc_config_clk 2>, <&mmc2_clk 0>,
+ 				 <&mmc2_clk 1>, <&mmc2_clk 2>;
+@@ -485,7 +585,7 @@
+ 		};
+ 
+ 		mmc3: mmc@01c12000 {
+-			compatible = "allwinner,sun5i-a13-mmc";
++			compatible = "allwinner,sun9i-a80-mmc";
+ 			reg = <0x01c12000 0x1000>;
+ 			clocks = <&mmc_config_clk 3>, <&mmc3_clk 0>,
+ 				 <&mmc3_clk 1>, <&mmc3_clk 2>;
+@@ -582,7 +682,7 @@
+ 			clocks = <&apb0_gates 5>;
+ 			gpio-controller;
+ 			interrupt-controller;
+-			#interrupt-cells = <2>;
++			#interrupt-cells = <3>;
+ 			#size-cells = <0>;
+ 			#gpio-cells = <3>;
+ 
+@@ -604,7 +704,8 @@
+ 			mmc2_8bit_pins: mmc2_8bit {
+ 				allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+ 						 "PC10", "PC11", "PC12",
+-						 "PC13", "PC14", "PC15";
++						 "PC13", "PC14", "PC15",
++						 "PC16";
+ 				allwinner,function = "mmc2";
+ 				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+ 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+@@ -752,14 +853,83 @@
+ 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
+ 
++		apbs_rst: reset@080014b0 {
++			reg = <0x080014b0 0x4>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			#reset-cells = <1>;
++		};
++
++		nmi_intc: interrupt-controller@080015a0 {
++			compatible = "allwinner,sun9i-a80-nmi";
++			interrupt-controller;
++			#interrupt-cells = <2>;
++			reg = <0x080015a0 0xc>;
++			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
++		};
++
++		r_ir: ir@08002000 {
++			compatible = "allwinner,sun5i-a13-ir";
++			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&r_ir_pins>;
++			clocks = <&apbs_gates 1>, <&r_ir_clk>;
++			clock-names = "apb", "ir";
++			resets = <&apbs_rst 1>;
++			reg = <0x08002000 0x40>;
++			status = "disabled";
++		};
++
+ 		r_uart: serial@08002800 {
+ 			compatible = "snps,dw-apb-uart";
+ 			reg = <0x08002800 0x400>;
+ 			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ 			reg-shift = <2>;
+ 			reg-io-width = <4>;
+-			clocks = <&osc24M>;
++			clocks = <&apbs_gates 4>;
++			resets = <&apbs_rst 4>;
+ 			status = "disabled";
+ 		};
++
++		r_pio: pinctrl@08002c00 {
++			compatible = "allwinner,sun9i-a80-r-pinctrl";
++			reg = <0x08002c00 0x400>;
++			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&apbs_gates 0>;
++			resets = <&apbs_rst 0>;
++			gpio-controller;
++			interrupt-controller;
++			#address-cells = <1>;
++			#size-cells = <0>;
++			#gpio-cells = <3>;
++
++			r_ir_pins: r_ir {
++				allwinner,pins = "PL6";
++				allwinner,function = "s_cir_rx";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			r_rsb_pins: r_rsb {
++				allwinner,pins = "PN0", "PN1";
++				allwinner,function = "s_rsb";
++				allwinner,drive = <SUN4I_PINCTRL_20_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++			};
++		};
++
++		r_rsb: i2c@08003400 {
++			compatible = "allwinner,sun8i-a23-rsb";
++			reg = <0x08003400 0x400>;
++			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&apbs_gates 3>;
++			clock-frequency = <3000000>;
++			resets = <&apbs_rst 3>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&r_rsb_pins>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
+ 	};
+ };
+diff --git a/arch/arm/dts/sunxi-itead-core-common.dtsi b/arch/arm/dts/sunxi-itead-core-common.dtsi
+new file mode 100644
+index 0000000..2565d51
+--- /dev/null
++++ b/arch/arm/dts/sunxi-itead-core-common.dtsi
+@@ -0,0 +1,136 @@
++/*
++ * Copyright 2015 - Marcus Cooper <[email protected]>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include "sunxi-common-regulators.dtsi"
++
++/ {
++	aliases {
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++};
++
++&cpu0 {
++	cpu-supply = <&reg_dcdc2>;
++};
++
++&ehci0 {
++	status = "okay";
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&i2c0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c0_pins_a>;
++	status = "okay";
++
++	axp209: pmic@34 {
++		reg = <0x34>;
++	};
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins_a>;
++	status = "okay";
++};
++
++&ohci0 {
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++#include "axp209.dtsi"
++
++&reg_dcdc2 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-cpu";
++};
++
++&reg_dcdc3 {
++	regulator-always-on;
++	regulator-min-microvolt = <1000000>;
++	regulator-max-microvolt = <1400000>;
++	regulator-name = "vdd-int-dll";
++};
++
++&reg_ldo1 {
++	regulator-name = "vdd-rtc";
++};
++
++&reg_ldo2 {
++	regulator-always-on;
++	regulator-min-microvolt = <3000000>;
++	regulator-max-microvolt = <3000000>;
++	regulator-name = "avcc";
++};
++
++&reg_usb1_vbus {
++	status = "okay";
++};
++
++&reg_usb2_vbus {
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&usbphy {
++	usb1_vbus-supply = <&reg_usb1_vbus>;
++	usb2_vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
+diff --git a/arch/arm/dts/sunxi-q8-common.dtsi b/arch/arm/dts/sunxi-q8-common.dtsi
+index 17b26ff..b824146 100644
+--- a/arch/arm/dts/sunxi-q8-common.dtsi
++++ b/arch/arm/dts/sunxi-q8-common.dtsi
+@@ -75,3 +75,9 @@
+ 		voltage = <400000>;
+ 	};
+ };
++
++&pwm {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pwm0_pins>;
++	status = "okay";
++};

+ 0 - 83
package/boot/uboot-sunxi/patches/011-sunxi-support-h3-ccu.patch

@@ -1,83 +0,0 @@
-diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
-index 47fb70f..5cc5d25 100644
---- a/arch/arm/cpu/armv7/sunxi/clock.c
-+++ b/arch/arm/cpu/armv7/sunxi/clock.c
-@@ -14,12 +14,17 @@
- #include <asm/arch/gpio.h>
- #include <asm/arch/sys_proto.h>
- 
-+__weak void clock_init_sec(void)
-+{
-+}
-+
- int clock_init(void)
- {
- #ifdef CONFIG_SPL_BUILD
- 	clock_init_safe();
- #endif
- 	clock_init_uart();
-+	clock_init_sec();
- 
- 	return 0;
- }
-diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
-index 4501884..d0085e8 100644
---- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
-+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
-@@ -45,6 +45,19 @@ void clock_init_safe(void)
- }
- #endif
- 
-+void clock_init_sec(void)
-+{
-+	struct sunxi_ccm_reg * const ccm =
-+		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-+
-+#ifdef CONFIG_MACH_SUN8I_H3
-+	setbits_le32(&ccm->ccu_sec_switch,
-+		     CCM_SEC_SWITCH_MBUS_NONSEC |
-+		     CCM_SEC_SWITCH_BUS_NONSEC |
-+		     CCM_SEC_SWITCH_PLL_NONSEC);
-+#endif
-+}
-+
- void clock_init_uart(void)
- {
- #if CONFIG_CONS_INDEX < 5
-diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h
-index 8ca58ae..6c0573f 100644
---- a/arch/arm/include/asm/arch-sunxi/clock.h
-+++ b/arch/arm/include/asm/arch-sunxi/clock.h
-@@ -30,6 +30,7 @@ int clock_init(void);
- int clock_twi_onoff(int port, int state);
- void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz);
- void clock_init_safe(void);
-+void clock_init_sec(void);
- void clock_init_uart(void);
- #endif
- 
-diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
-index 5c76275..554d858 100644
---- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
-+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
-@@ -137,6 +137,8 @@ struct sunxi_ccm_reg {
- 	u32 apb1_reset_cfg;	/* 0x2d0 APB1 Reset config */
- 	u32 reserved24;
- 	u32 apb2_reset_cfg;	/* 0x2d8 APB2 Reset config */
-+	u32 reserved25[5];
-+	u32 ccu_sec_switch;	/* 0x2f0 CCU Security Switch, H3 only */
- };
- 
- /* apb2 bit field */
-@@ -375,6 +377,11 @@ struct sunxi_ccm_reg {
- #define CCM_DE_CTRL_PLL10		(5 << 24)
- #define CCM_DE_CTRL_GATE		(1 << 31)
- 
-+/* CCU security switch, H3 only */
-+#define CCM_SEC_SWITCH_MBUS_NONSEC	(1 << 2)
-+#define CCM_SEC_SWITCH_BUS_NONSEC	(1 << 1)
-+#define CCM_SEC_SWITCH_PLL_NONSEC	(1 << 0)
-+
- #ifndef __ASSEMBLY__
- void clock_set_pll1(unsigned int hz);
- void clock_set_pll3(unsigned int hz);

+ 40 - 0
package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch

@@ -0,0 +1,40 @@
+From 730d2f3a41c5ccae71b5008fffdf697d143be68c Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Wed, 16 Mar 2016 20:44:51 +0100
+Subject: [PATCH] sunxi: Fix clock_twi_onoff for sun6i
+
+The clock_sun6i.c implementation was not deasserting the reset for
+the regular i2c controllers, this commit fixes this.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+index 700b605..4e1e1a4 100644
+--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
++++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+@@ -100,13 +100,18 @@ int clock_twi_onoff(int port, int state)
+ 		return 0;
+ 	}
+ 
+-	/* set the apb clock gate for twi */
+-	if (state)
++	/* set the apb clock gate and reset for twi */
++	if (state) {
+ 		setbits_le32(&ccm->apb2_gate,
+ 			     CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
+-	else
++		setbits_le32(&ccm->apb2_reset_cfg,
++			     1 << (APB2_RESET_TWI_SHIFT + port));
++	} else {
++		clrbits_le32(&ccm->apb2_reset_cfg,
++			     1 << (APB2_RESET_TWI_SHIFT + port));
+ 		clrbits_le32(&ccm->apb2_gate,
+ 			     CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
++	}
+ 
+ 	return 0;
+ }

+ 0 - 22
package/boot/uboot-sunxi/patches/012-sunxi-support-psci-on-h3.patch

@@ -1,22 +0,0 @@
-diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
-index 4ff46e4..90b5bfd 100644
---- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
-+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
-@@ -106,7 +106,7 @@ psci_fiq_enter:
- 	str	r10, [r8, #0x100]
- 	timer_wait r10, ONE_MS
- 
--#ifdef CONFIG_MACH_SUN6I
-+#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I_H3)
- 	@ Activate power clamp
- 	lsl	r12, r9, #2		@ x4
- 	add	r12, r12, r8
-@@ -170,7 +170,7 @@ psci_cpu_on:
- 	movw	r0, #(SUNXI_PRCM_BASE & 0xffff)
- 	movt	r0, #(SUNXI_PRCM_BASE >> 16)
- 
--#ifdef CONFIG_MACH_SUN6I
-+#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I_H3)
- 	@ Release power clamp
- 	lsl	r5, r1, #2	@ 1 register per CPU
- 	add	r5, r5, r0	@ PRCM

+ 26 - 0
package/boot/uboot-sunxi/patches/013-enable-realtek-phy.patch

@@ -0,0 +1,26 @@
+From 1eae8f66ff749409eb96e2f3f3387c56232d0b8a Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Wed, 16 Mar 2016 13:46:22 +0100
+Subject: [PATCH] sunxi: Enable realtek phy support
+
+Enable building of drivers/net/phy/realtek.c so that realtek phys
+get properly initialized.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ include/configs/sunxi-common.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
+index b26363d..ea15e37 100644
+--- a/include/configs/sunxi-common.h
++++ b/include/configs/sunxi-common.h
+@@ -310,6 +310,7 @@ extern int soft_i2c_gpio_scl;
+ #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
+ #define CONFIG_PHY_ADDR		1
+ #define CONFIG_MII			/* MII PHY management		*/
++#define CONFIG_PHY_REALTEK
+ #endif
+ 
+ #ifdef CONFIG_USB_EHCI_HCD

+ 0 - 16
package/boot/uboot-sunxi/patches/013-sunxi-enable-booting-nonsec_HYP-on-h3.patch

@@ -1,16 +0,0 @@
-diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
-index 9d67847..28e6bb4 100644
---- a/board/sunxi/Kconfig
-+++ b/board/sunxi/Kconfig
-@@ -71,8 +71,11 @@ config MACH_SUN8I_A33
- config MACH_SUN8I_H3
- 	bool "sun8i (Allwinner H3)"
- 	select CPU_V7
-+	select CPU_V7_HAS_NONSEC
-+	select CPU_V7_HAS_VIRT
- 	select SUNXI_GEN_SUN6I
- 	select SUPPORT_SPL
-+	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- 
- config MACH_SUN8I_A83T
- 	bool "sun8i (Allwinner A83T)"

+ 135 - 0
package/boot/uboot-sunxi/patches/014-fix-gmac-init.patch

@@ -0,0 +1,135 @@
+From fc8991c61c393ce6a9d3dfc97cb56dbbd9e8cbba Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Thu, 17 Mar 2016 13:53:03 +0100
+Subject: [PATCH] sunxi: Fix gmac not working due to cpu_eth_init no longer
+ being called
+
+cpu_eth_init is no longer called for dm enabled eth drivers, this
+was causing the sunxi gmac eth controller to no longer work in u-boot.
+
+This commit fixes this by calling the clock, reset and pinmux setup
+function from s_init() and enabling the phy power pin (if any) from
+board_init().
+
+The enabling of phy power cannot be done from s_init because it uses dm
+and dm is not ready yet at this point.
+
+Note that the mdelay is dropped as the phy gets enabled much earlier
+now, so it is no longer needed.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+Tested-by: Karsten Merker <[email protected]>
+Tested-by: Michael Haas <[email protected]>
+---
+ arch/arm/cpu/armv7/sunxi/board.c            | 28 +---------------------------
+ arch/arm/include/asm/arch-sunxi/sys_proto.h |  6 +++++-
+ board/sunxi/board.c                         |  5 +++++
+ board/sunxi/gmac.c                          | 14 +-------------
+ 4 files changed, 12 insertions(+), 41 deletions(-)
+
+diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
+index e80785b..7653148 100644
+--- a/arch/arm/cpu/armv7/sunxi/board.c
++++ b/arch/arm/cpu/armv7/sunxi/board.c
+@@ -152,6 +152,7 @@ void s_init(void)
+ 	timer_init();
+ 	gpio_init();
+ 	i2c_init_board();
++	eth_init_board();
+ }
+ 
+ #ifdef CONFIG_SPL_BUILD
+@@ -259,30 +260,3 @@ void enable_caches(void)
+ 	dcache_enable();
+ }
+ #endif
+-
+-#ifdef CONFIG_CMD_NET
+-/*
+- * Initializes on-chip ethernet controllers.
+- * to override, implement board_eth_init()
+- */
+-int cpu_eth_init(bd_t *bis)
+-{
+-	__maybe_unused int rc;
+-
+-#ifdef CONFIG_MACPWR
+-	gpio_request(CONFIG_MACPWR, "macpwr");
+-	gpio_direction_output(CONFIG_MACPWR, 1);
+-	mdelay(200);
+-#endif
+-
+-#ifdef CONFIG_SUNXI_GMAC
+-	rc = sunxi_gmac_initialize(bis);
+-	if (rc < 0) {
+-		printf("sunxi: failed to initialize gmac\n");
+-		return rc;
+-	}
+-#endif
+-
+-	return 0;
+-}
+-#endif
+diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h
+index 9df3744..a373319 100644
+--- a/arch/arm/include/asm/arch-sunxi/sys_proto.h
++++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h
+@@ -24,6 +24,10 @@ void sdelay(unsigned long);
+ void return_to_fel(uint32_t lr, uint32_t sp);
+ 
+ /* Board / SoC level designware gmac init */
+-int sunxi_gmac_initialize(bd_t *bis);
++#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUNXI_GMAC
++void eth_init_board(void);
++#else
++static inline void eth_init_board(void) {}
++#endif
+ 
+ #endif
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index 80eae9c..e16718f 100644
+--- a/board/sunxi/board.c
++++ b/board/sunxi/board.c
+@@ -90,6 +90,11 @@ int board_init(void)
+ 	if (ret)
+ 		return ret;
+ 
++#ifdef CONFIG_MACPWR
++	gpio_request(CONFIG_MACPWR, "macpwr");
++	gpio_direction_output(CONFIG_MACPWR, 1);
++#endif
++
+ 	/* Uses dm gpio code so do this here and not in i2c_init_board() */
+ 	return soft_i2c_board_init();
+ }
+diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
+index 4e222d8..69eb8ff 100644
+--- a/board/sunxi/gmac.c
++++ b/board/sunxi/gmac.c
+@@ -6,7 +6,7 @@
+ #include <asm/arch/clock.h>
+ #include <asm/arch/gpio.h>
+ 
+-int sunxi_gmac_initialize(bd_t *bis)
++void eth_init_board(void)
+ {
+ 	int pin;
+ 	struct sunxi_ccm_reg *const ccm =
+@@ -79,16 +79,4 @@ int sunxi_gmac_initialize(bd_t *bis)
+ 	for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
+ 		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
+ #endif
+-
+-#ifdef CONFIG_DM_ETH
+-	return 0;
+-#else
+-# ifdef CONFIG_RGMII
+-	return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
+-# elif defined CONFIG_GMII
+-	return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII);
+-# else
+-	return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
+-# endif
+-#endif
+ }

+ 82 - 0
package/boot/uboot-sunxi/patches/015-fix-2nd-usb-ctrler-on-sun47i.patch

@@ -0,0 +1,82 @@
+From 948603d4d637a0e04a3214253b911cfc4ed11220 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Mon, 21 Mar 2016 14:44:35 +0100
+Subject: [PATCH] sunxi: Fix 2nd usb controller on sun4i/sun7i no longer
+ working
+
+The 2nd usb controller on sun4i/sun7i has its base address 0x8000
+bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
+are interleaved with the ohci clk-gates introducing a hole between
+the clks for usb1 and usb2.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ drivers/usb/host/ehci-sunxi.c | 13 +++++++++++--
+ drivers/usb/host/ohci-sunxi.c | 15 ++++++++++++---
+ 2 files changed, 23 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
+index cf3dcc4..677a5d3 100644
+--- a/drivers/usb/host/ehci-sunxi.c
++++ b/drivers/usb/host/ehci-sunxi.c
+@@ -17,6 +17,14 @@
+ #include <dm.h>
+ #include "ehci.h"
+ 
++#ifdef CONFIG_SUNXI_GEN_SUN4I
++#define BASE_DIST		0x8000
++#define AHB_CLK_DIST		2
++#else
++#define BASE_DIST		0x1000
++#define AHB_CLK_DIST		1
++#endif
++
+ struct ehci_sunxi_priv {
+ 	struct ehci_ctrl ehci;
+ 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
+@@ -39,8 +47,9 @@ static int ehci_usb_probe(struct udevice *dev)
+ #ifdef CONFIG_MACH_SUN8I_H3
+ 	priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
+ #endif
+-	priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / 0x1000 + 1;
+-	priv->ahb_gate_mask <<= priv->phy_index - 1;
++	priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
++	priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
++	priv->phy_index++; /* Non otg phys start at 1 */
+ 
+ 	setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+ #ifdef CONFIG_SUNXI_GEN_SUN6I
+diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
+index 1b1f651..d4fb95a 100644
+--- a/drivers/usb/host/ohci-sunxi.c
++++ b/drivers/usb/host/ohci-sunxi.c
+@@ -17,6 +17,14 @@
+ #include <usb.h>
+ #include "ohci.h"
+ 
++#ifdef CONFIG_SUNXI_GEN_SUN4I
++#define BASE_DIST		0x8000
++#define AHB_CLK_DIST		2
++#else
++#define BASE_DIST		0x1000
++#define AHB_CLK_DIST		1
++#endif
++
+ struct ohci_sunxi_priv {
+ 	ohci_t ohci;
+ 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
+@@ -42,9 +50,10 @@ static int ohci_usb_probe(struct udevice *dev)
+ 	priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
+ #endif
+ 	priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
+-	priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / 0x1000 + 1;
+-	priv->ahb_gate_mask <<= priv->phy_index - 1;
+-	priv->usb_gate_mask <<= priv->phy_index - 1;
++	priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST;
++	priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
++	priv->usb_gate_mask <<= priv->phy_index;
++	priv->phy_index++; /* Non otg phys start at 1 */
+ 
+ 	setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+ 	setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);

+ 33 - 0
package/boot/uboot-sunxi/patches/016-spl-print-mmc-slot.patch

@@ -0,0 +1,33 @@
+From 8f10b5c65611e6c15a113bf63289b6696452f90d Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Sun, 20 Mar 2016 14:17:10 +0100
+Subject: [PATCH] spl: Print from which mmc slot spl is trying to boot
+
+On some sunxi boards (and presumably also non sunxi boards) u-boot can
+be either loaded from a sdcard in a micro-sd slot, or from eMMC.
+
+Print which MMC spl tries to boot from, to help debugging.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Reviewed-by: Tom Rini <[email protected]>
+---
+ common/spl/spl.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/common/spl/spl.c b/common/spl/spl.c
+index e5167bf..82e7f58 100644
+--- a/common/spl/spl.c
++++ b/common/spl/spl.c
+@@ -210,9 +210,9 @@ struct boot_device_name boot_name_table[] = {
+ 	{ BOOT_DEVICE_RAM, "RAM" },
+ #endif
+ #ifdef CONFIG_SPL_MMC_SUPPORT
+-	{ BOOT_DEVICE_MMC1, "MMC" },
+-	{ BOOT_DEVICE_MMC2, "MMC" },
+-	{ BOOT_DEVICE_MMC2_2, "MMC" },
++	{ BOOT_DEVICE_MMC1, "MMC1" },
++	{ BOOT_DEVICE_MMC2, "MMC2" },
++	{ BOOT_DEVICE_MMC2_2, "MMC2_2" },
+ #endif
+ #ifdef CONFIG_SPL_NAND_SUPPORT
+ 	{ BOOT_DEVICE_NAND, "NAND" },

+ 43 - 0
package/boot/uboot-sunxi/patches/017-usb-add-support-for-usb3-vbus-pin.patch

@@ -0,0 +1,43 @@
+From 60fa63012fcdc3c4ec1497bf5e358f0a90b40949 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Fri, 18 Mar 2016 08:42:01 +0100
+Subject: [PATCH] sunxi: Add support for USB vbus pin for USB3
+
+The H3 has USB0 - USB3, add support for having a USB vbus pin for USB3.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ arch/arm/cpu/armv7/sunxi/usb_phy.c | 1 +
+ board/sunxi/Kconfig                | 6 ++++++
+ 2 files changed, 7 insertions(+)
+
+diff --git a/arch/arm/cpu/armv7/sunxi/usb_phy.c b/arch/arm/cpu/armv7/sunxi/usb_phy.c
+index 6ac96cc..0749fbd 100644
+--- a/arch/arm/cpu/armv7/sunxi/usb_phy.c
++++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c
+@@ -76,6 +76,7 @@ static int get_vbus_gpio(int index)
+ 	case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN);
+ 	case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
+ 	case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
++	case 3: return sunxi_name_to_gpio(CONFIG_USB3_VBUS_PIN);
+ 	}
+ 	return -EINVAL;
+ }
+diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
+index 5e9d3af..5e72fac 100644
+--- a/board/sunxi/Kconfig
++++ b/board/sunxi/Kconfig
+@@ -342,6 +342,12 @@ config USB2_VBUS_PIN
+ 	---help---
+ 	See USB1_VBUS_PIN help text.
+ 
++config USB3_VBUS_PIN
++	string "Vbus enable pin for usb3 (ehci2)"
++	default ""
++	---help---
++	See USB1_VBUS_PIN help text.
++
+ config I2C0_ENABLE
+ 	bool "Enable I2C/TWI controller 0"
+ 	default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I

+ 35 - 0
package/boot/uboot-sunxi/patches/018-usb-specify-vbus-pins-on-orangepis.patch

@@ -0,0 +1,35 @@
+From ce0d0926758f631fdd655d438acd32d5935d43a4 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <[email protected]>
+Date: Fri, 18 Mar 2016 08:45:21 +0100
+Subject: [PATCH] sunxi: Specify USB vbus pins for orangepi boards
+
+This fixes the USB ports not working on the orangepi_plus and stops us
+from messing with gpio-s which we should not touch on the orangepi_pc.
+
+Signed-off-by: Hans de Goede <[email protected]>
+Acked-by: Ian Campbell <[email protected]>
+---
+ configs/orangepi_pc_defconfig   | 3 +++
+ configs/orangepi_plus_defconfig | 1 +
+ 2 files changed, 4 insertions(+)
+
+diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
+index aaf0f68..4e9051d 100644
+--- a/configs/orangepi_pc_defconfig
++++ b/configs/orangepi_pc_defconfig
+@@ -14,3 +14,6 @@ CONFIG_SPL=y
+ CONFIG_CMD_GPIO=y
+ CONFIG_SY8106A_POWER=y
+ CONFIG_USB_EHCI_HCD=y
++CONFIG_USB1_VBUS_PIN=""
++CONFIG_USB2_VBUS_PIN=""
++CONFIG_USB3_VBUS_PIN=""
+diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
+index e52dcfc..6ecb30e 100644
+--- a/configs/orangepi_plus_defconfig
++++ b/configs/orangepi_plus_defconfig
+@@ -14,3 +14,4 @@ CONFIG_SPL=y
+ CONFIG_CMD_GPIO=y
+ CONFIG_SY8106A_POWER=y
+ CONFIG_USB_EHCI_HCD=y
++CONFIG_USB1_VBUS_PIN="PG13"

+ 35 - 0
package/boot/uboot-sunxi/patches/019-sid-add-efuse-support-for-h3-a83t.patch

@@ -0,0 +1,35 @@
+From 70fe24ed93fa90eb407d18a5fc9d9ad85ac9184c Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <[email protected]>
+Date: Wed, 27 Jan 2016 16:34:43 +0800
+Subject: [PATCH] sunxi: Support SID e-fuses on A83T and H3
+
+On the A83T and H3, the SID block is at a different address.
+Furthurmore, the e-fuses are at an offset of 0x200 within the
+hardware's address space.
+
+Signed-off-by: Chen-Yu Tsai <[email protected]>
+Acked-by: Hans de Goede <[email protected]>
+Signed-off-by: Hans de Goede <[email protected]>
+---
+ arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+index b6e11eb..65c0441 100644
+--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
++++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+@@ -82,7 +82,14 @@
+ #define SUNXI_AD_DA_BASE		0x01c22c00
+ #define SUNXI_KEYPAD_BASE		0x01c23000
+ #define SUNXI_TZPC_BASE			0x01c23400
++
++#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3)
++/* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
++#define SUNXI_SID_BASE			0x01c14200
++#else
+ #define SUNXI_SID_BASE			0x01c23800
++#endif
++
+ #define SUNXI_SJTAG_BASE		0x01c23c00
+ 
+ #define SUNXI_TP_BASE			0x01c25000

+ 25 - 0
package/boot/uboot-sunxi/patches/020-boot-display-board-model-on-startup.patch

@@ -0,0 +1,25 @@
+From 2af25b747340c6c8f6a6b9e27632db577bf4da52 Mon Sep 17 00:00:00 2001
+From: Simon Glass <[email protected]>
+Date: Mon, 22 Feb 2016 22:55:46 -0700
+Subject: [PATCH] sunxi: Display the board model on start-up
+
+It is useful to know which sunxi board you are booting. Display this on
+start-up to avoid confusion.
+
+Signed-off-by: Simon Glass <[email protected]>
+---
+ include/configs/sunxi-common.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
+index ff356e3..b26363d 100644
+--- a/include/configs/sunxi-common.h
++++ b/include/configs/sunxi-common.h
+@@ -174,6 +174,7 @@
+ 
+ #define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
+ #define CONFIG_IDENT_STRING		" Allwinner Technology"
++#define CONFIG_DISPLAY_BOARDINFO
+ 
+ #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
+ #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */

+ 0 - 25
package/boot/uboot-sunxi/patches/020-fix-bananapro-sata-LDO4.patch

@@ -1,25 +0,0 @@
-From 54be0f057825b886af008d8d43a97802e5537ab6 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <[email protected]>
-Date: Fri, 22 Jan 2016 14:55:47 +0100
-Subject: [PATCH] sunxi: Bananapro: Set LDO4 to 2.5V
-
-According to the Bananapro schematic VDD25-SATA either comes from a
-dedicated WL2003E25-5 LTO, or it is connected to LDO4 via a
-0 Ohm resistor.
-
-In practice it seems that LDO4 is used, so enable it and set it to 2.5V.
-
-Signed-off-by: Hans de Goede <[email protected]>
----
- configs/Bananapro_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
-index 40588b9..4f4a07b 100644
---- a/configs/Bananapro_defconfig
-+++ b/configs/Bananapro_defconfig
-@@ -17,3 +17,4 @@ CONFIG_CMD_GPIO=y
- CONFIG_NETCONSOLE=y
- CONFIG_ETH_DESIGNWARE=y
- CONFIG_USB_EHCI_HCD=y
-+CONFIG_AXP_ALDO4_VOLT=2500

+ 37 - 0
package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch

@@ -0,0 +1,37 @@
+From a58eb20fb80f478038243e9e0f30f6984725e265 Mon Sep 17 00:00:00 2001
+From: Philipp Tomsich <[email protected]>
+Date: Tue, 6 Jan 2015 15:47:18 +0100
+Subject: sun6i: Sync PLL1 multipliers/dividers with Boot1
+
+This change syncs up the multipliers and dividers used to initialize
+PLL1 (i.e. the fast clock driving the ARM cores) with the values used
+in Allwinner's Boot1 on sun6i.
+
+More specifically, the following settings are now used:
+ * up to 768MHz:  mul=2, div=2 (was: mul=1, div=1)
+ * up to 1152MHz: mul=3, div=2 (unchanged)
+ * above 1152MHz: mul=4, div=2 (was: mul=2, div=1)
+
+diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+index cfb32b4..2986539 100644
+--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
++++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+@@ -102,11 +102,12 @@ void clock_set_pll1(unsigned int clk)
+ 	struct sunxi_ccm_reg * const ccm =
+ 		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ 	const int p = 0;
+-	int k = 1;
+-	int m = 1;
++	int k = 2;
++	int m = 2;
+ 
+ 	if (clk > 1152000000) {
+-		k = 2;
++		k = 4;
++		m = 2;
+ 	} else if (clk > 768000000) {
+ 		k = 3;
+ 		m = 2;
+-- 
+cgit v0.10.2
+

+ 77 - 0
package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch

@@ -0,0 +1,77 @@
+From b2b385df5095fff80b4655142f58a2a6801e6c80 Mon Sep 17 00:00:00 2001
+From: Philipp Tomsich <[email protected]>
+Date: Tue, 6 Jan 2015 21:26:44 +0100
+Subject: sun6i: Fix and document PLL LDO voltage selection
+
+The PRCM_PLL_CTRL_LDO_OUT_L and PRCM_PLL_CTRL_LDO_OUT_H macros had
+their meaning reversed. This is fixed by this change-set. With this
+changed, the PRCM_PLL_CTRL_LDO_OUT_L(1370) now becomes self-evident
+as setting the voltage to 1.37v (which it had done all along, even
+though stating a different target voltage).
+
+After changing the PLL LDO setting, it will take a little while for
+the voltage output to settle. A sdelay()-based loop waits the same
+order of magnitude as Boot1.
+
+Furthermore, a bit of documentation is added to clarify that the
+required setting for the PLL LDO is 1.37v as per the A31 manual.
+
+diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+index fa7ebd8..3a6e56e 100644
+--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
++++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+@@ -24,14 +24,27 @@ void clock_init_safe(void)
+ 	struct sunxi_prcm_reg * const prcm =
+ 		(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+ 
+-	/* Set PLL ldo voltage without this PLL6 does not work properly */
++	/* Set PLL ldo voltage without this PLL6 does not work properly.
++	 *
++	 * As the A31 manual states, that "before enable PLL, PLLVDD
++	 * LDO should be set to 1.37v", we need to configure this to 2.5v
++	 * in the "PLL Input Power Select" (0 << 15) and (7 << 16).
++	 */
+ 	clrsetbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK,
+ 			PRCM_PLL_CTRL_LDO_KEY);
+ 	clrsetbits_le32(&prcm->pll_ctrl1, ~PRCM_PLL_CTRL_LDO_KEY_MASK,
+ 		PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN |
+-		PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140));
++		PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1370) );
+ 	clrbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK);
+ 
++	/* Give the PLL LDO voltage setting some time to take hold.
++	 * Notes:
++	 *   1) We need to use sdelay() as the timers aren't set up yet.
++	 *   2) The 100k iterations come from Boot1, which spin's for 100k
++	 *      iterations through a loop.
++	 */
++	sdelay(100000);
++
+ 	clock_set_pll1(408000000);
+ 
+ 	writel(AHB1_ABP1_DIV_DEFAULT, &ccm->ahb1_apb1_div);
+diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h
+index 82ed541..41a62a4 100644
+--- a/arch/arm/include/asm/arch-sunxi/prcm.h
++++ b/arch/arm/include/asm/arch-sunxi/prcm.h
+@@ -111,13 +111,13 @@
+ #define PRCM_PLL_CTRL_LDO_OUT_MASK \
+ 	__PRCM_PLL_CTRL_LDO_OUT(0x7)
+ /* When using the low voltage 20 mV steps, and high voltage 30 mV steps */
+-#define PRCM_PLL_CTRL_LDO_OUT_L(n) \
+-	__PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1000) / 20) & 0x7)
+ #define PRCM_PLL_CTRL_LDO_OUT_H(n) \
++	__PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1000) / 20) & 0x7)
++#define PRCM_PLL_CTRL_LDO_OUT_L(n) \
+ 	__PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1160) / 30) & 0x7)
+-#define PRCM_PLL_CTRL_LDO_OUT_LV(n) \
+-	__PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 20) + 1000)
+ #define PRCM_PLL_CTRL_LDO_OUT_HV(n) \
++	__PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 20) + 1000)
++#define PRCM_PLL_CTRL_LDO_OUT_LV(n) \
+ 	__PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 30) + 1160)
+ #define PRCM_PLL_CTRL_LDO_KEY (0xa7 << 24)
+ #define PRCM_PLL_CTRL_LDO_KEY_MASK (0xff << 24)
+-- 
+cgit v0.10.2
+

+ 21 - 0
package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch

@@ -0,0 +1,21 @@
+From d7311b6e7cdd1fc0e92665188e650934718cb2b1 Mon Sep 17 00:00:00 2001
+From: Philipp Tomsich <[email protected]>
+Date: Tue, 16 Jun 2015 10:52:01 +0200
+Subject: sun6i: define alternate-function for UART2 on GPG
+
+
+diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
+index 8e67b3b..1fbf494 100644
+--- a/arch/arm/include/asm/arch-sunxi/gpio.h
++++ b/arch/arm/include/asm/arch-sunxi/gpio.h
+@@ -177,6 +177,7 @@ enum sunxi_gpio_number {
+ #define SUN6I_GPG_SDC1		2
+ #define SUN8I_GPG_SDC1		2
+ #define SUN6I_GPG_TWI3		2
++#define SUN6I_GPG_UART2         2
+ #define SUN5I_GPG_UART1		4
+ 
+ #define SUN4I_GPH_SDC1		5
+-- 
+cgit v0.10.2
+

+ 37 - 0
package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch

@@ -0,0 +1,37 @@
+From c058dfb69136d62f88ae8b121104bdb7ce2df03f Mon Sep 17 00:00:00 2001
+From: Philipp Tomsich <[email protected]>
+Date: Tue, 16 Jun 2015 10:53:11 +0200
+Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7)
+
+
+diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
+index 5f39aa0..99675c3 100644
+--- a/arch/arm/cpu/armv7/sunxi/board.c
++++ b/arch/arm/cpu/armv7/sunxi/board.c
+@@ -76,6 +76,10 @@ static int gpio_init(void)
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
+ 	sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
++#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN6I)
++	sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN6I_GPG_UART2);
++	sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN6I_GPG_UART2);
++	sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);
+ #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
+ 	sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
+diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
+index 9576bc1..bda4059 100644
+--- a/include/configs/sunxi-common.h
++++ b/include/configs/sunxi-common.h
+@@ -260,6 +260,8 @@ extern int soft_i2c_gpio_scl;
+ #endif
+ #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
+ #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
++#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN6I)
++#define OF_STDOUT_PATH          "/soc@01c00000/serial@01c28800:115200"
+ #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
+ #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
+ #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
+-- 
+cgit v0.10.2
+

+ 28 - 0
package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch

@@ -0,0 +1,28 @@
+From 78d5fab8e345b1273ec8c22d06f1a1d27670b518 Mon Sep 17 00:00:00 2001
+From: Philipp Tomsich <[email protected]>
+Date: Tue, 16 Jun 2015 10:59:38 +0200
+Subject: ARM: sunxi: Make CONS_INDEX configurable
+
+
+diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
+index 2a1cd3c..e155c4c 100644
+--- a/board/sunxi/Kconfig
++++ b/board/sunxi/Kconfig
+@@ -209,6 +209,14 @@ config SYS_BOARD
+ config SYS_SOC
+ 	default "sunxi"
+ 
++config CONS_INDEX
++        int "UART used for console"
++        range 1 5
++        default 1
++        ---help---
++        Defines the UART port used for serial output. It starts at 1 so UART0 is 1,
++        UART1 is 2 and so on.
++
+ config UART0_PORT_F
+ 	bool "UART0 on MicroSD breakout board"
+ 	default n
+-- 
+cgit v0.10.2
+

+ 0 - 0
package/boot/uboot-sunxi/uEnv.txt → package/boot/uboot-sunxi/uEnv-default.txt


+ 6 - 0
package/boot/uboot-sunxi/uEnv-pangolin.txt

@@ -0,0 +1,6 @@
+setenv fdt_high ffffffff
+setenv loadkernel fatload mmc 0 \$kernel_addr_r uImage
+setenv loaddtb fatload mmc 0 \$fdt_addr_r dtb
+setenv bootargs console=ttyS2,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
+setenv uenvcmd run loadkernel \&\& run loaddtb \&\& bootm \$kernel_addr_r - \$fdt_addr_r
+run uenvcmd