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@@ -11,21 +11,6 @@
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/* ============================= */
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/* Global Defines */
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/* ============================= */
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---- a/src/drv_vmmc_bbd.c
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-+++ b/src/drv_vmmc_bbd.c
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-@@ -1072,7 +1072,11 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
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- IFX_uint8_t padBytes = 0;
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- #endif
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- IFX_uint16_t cram_offset, cram_crc,
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-- pCmd [MAX_CMD_WORD] = {0};
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-+ pCmd [MAX_CMD_WORD]
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-+#if defined (__GNUC__) || defined (__GNUG__)
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-+ __attribute__ ((aligned(4)))
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-+#endif
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-+ = {0};
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-
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- /* read offset */
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- cpb2w (&cram_offset, &bbd_cram->pData[0], sizeof (IFX_uint16_t));
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--- a/src/drv_vmmc_danube.h
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+++ b/src/drv_vmmc_danube.h
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@@ -15,56 +15,18 @@
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@@ -88,7 +73,7 @@
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} while(0);
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/**
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-@@ -72,11 +34,6 @@ do { \
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+@@ -72,11 +34,6 @@
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*/
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#define VMMC_DRIVER_UNLOAD_HOOK(ret) \
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do { \
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@@ -117,6 +102,15 @@
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/* ============================= */
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/* Local Macros & Definitions */
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+@@ -1591,7 +1599,7 @@
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+ #ifdef VMMC_DRIVER_UNLOAD_HOOK
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+ if (VDevices[0].nDevState & DS_GPIO_RESERVED)
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+ {
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+- IFX_int32_t ret;
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++ IFX_int32_t ret = 0;
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+ VMMC_DRIVER_UNLOAD_HOOK(ret);
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+ if (!VMMC_SUCCESS(ret))
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+ {
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--- a/src/drv_vmmc_init_cap.c
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+++ b/src/drv_vmmc_init_cap.c
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@@ -22,6 +22,11 @@
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@@ -141,7 +135,7 @@
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#undef USE_PLAIN_VOICE_FIRMWARE
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#undef PRINT_ON_ERR_INTERRUPT
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-@@ -35,8 +36,22 @@
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+@@ -39,8 +40,32 @@
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#include "ifxos_interrupt.h"
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#include "ifxos_time.h"
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@@ -158,15 +152,25 @@
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+# define ifx_gptu_timer_free lq_free_timer
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+
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+
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++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39))
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+# define bsp_mask_and_ack_irq ltq_mask_and_ack_irq
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+#else
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++extern void ltq_mask_and_ack_irq(struct irq_data *d);
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++static void inline bsp_mask_and_ack_irq(int x)
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++{
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++ struct irq_data d;
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++ d.irq = x;
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++ ltq_mask_and_ack_irq(&d);
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++}
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++#endif
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++#else
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+# include <asm/ifx/ifx_regs.h>
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+# include <asm/ifx/ifx_gptu.h>
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+#endif
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#include "drv_mps_vmmc.h"
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#include "drv_mps_vmmc_dbg.h"
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-@@ -98,6 +113,9 @@ extern IFX_void_t bsp_mask_and_ack_irq (
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+@@ -104,6 +129,9 @@
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extern IFX_void_t mask_and_ack_danube_irq (IFX_uint32_t irq_nr);
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#endif /* */
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@@ -176,7 +180,7 @@
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extern IFXOS_event_t fw_ready_evt;
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/* callback function to free all data buffers currently used by voice FW */
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IFX_void_t (*ifx_mps_bufman_freeall)(IFX_void_t) = IFX_NULL;
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-@@ -201,7 +219,8 @@ IFX_boolean_t ifx_mps_ext_bufman ()
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+@@ -207,7 +235,8 @@
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*/
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IFX_void_t *ifx_mps_fastbuf_malloc (IFX_size_t size, IFX_int32_t priority)
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{
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@@ -186,7 +190,7 @@
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IFX_int32_t index = fastbuf_index;
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if (fastbuf_initialized == 0)
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-@@ -255,7 +274,7 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
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+@@ -261,7 +290,7 @@
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*/
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IFX_void_t ifx_mps_fastbuf_free (const IFX_void_t * ptr)
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{
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@@ -195,7 +199,7 @@
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IFX_int32_t index = fastbuf_index;
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IFXOS_LOCKINT (flags);
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-@@ -451,7 +470,7 @@ static mps_buffer_state_e ifx_mps_bufman
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+@@ -457,7 +486,7 @@
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*/
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static IFX_int32_t ifx_mps_bufman_inc_level (IFX_uint32_t value)
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{
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@@ -204,7 +208,7 @@
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if (mps_buffer.buf_level + value > MPS_BUFFER_MAX_LEVEL)
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{
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-@@ -478,7 +497,7 @@ static IFX_int32_t ifx_mps_bufman_inc_le
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+@@ -484,7 +513,7 @@
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*/
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static IFX_int32_t ifx_mps_bufman_dec_level (IFX_uint32_t value)
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{
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@@ -213,7 +217,7 @@
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if (mps_buffer.buf_level < value)
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{
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-@@ -630,7 +649,7 @@ IFX_int32_t ifx_mps_bufman_buf_provide (
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+@@ -636,7 +665,7 @@
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mem_seg_ptr[i] =
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(IFX_uint32_t *) CPHYSADDR ((IFX_uint32_t) mps_buffer.
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malloc (segment_size, FASTBUF_FW_OWNED));
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@@ -222,7 +226,7 @@
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{
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TRACE (MPS, DBG_LEVEL_HIGH,
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("%s(): cannot allocate buffer\n", __FUNCTION__));
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-@@ -946,7 +965,7 @@ IFX_int32_t ifx_mps_common_open (mps_com
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+@@ -952,7 +981,7 @@
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mps_mbx_dev * pMBDev, IFX_int32_t bcommand,
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IFX_boolean_t from_kernel)
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{
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@@ -231,7 +235,7 @@
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IFXOS_LOCKINT (flags);
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-@@ -1062,7 +1081,7 @@ IFX_int32_t ifx_mps_common_close (mps_mb
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+@@ -1068,7 +1097,7 @@
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IFX_void_t ifx_mps_release_structures (mps_comm_dev * pDev)
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{
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IFX_int32_t count;
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@@ -240,7 +244,7 @@
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IFXOS_LOCKINT (flags);
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IFXOS_BlockFree (pFW_img_data);
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-@@ -1111,7 +1130,7 @@ IFX_uint32_t ifx_mps_init_structures (mp
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+@@ -1117,7 +1146,7 @@
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/* Initialize MPS main structure */
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memset ((IFX_void_t *) pDev, 0, sizeof (mps_comm_dev));
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@@ -249,7 +253,7 @@
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pDev->flags = 0x00000000;
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MBX_Memory = pDev->base_global;
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-@@ -1119,9 +1138,11 @@ IFX_uint32_t ifx_mps_init_structures (mp
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+@@ -1125,9 +1154,11 @@
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for MBX communication. These are: mailbox base address, mailbox size, *
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mailbox read index and mailbox write index. for command and voice
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mailbox, * upstream and downstream direction. */
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@@ -264,7 +268,7 @@
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MBX_Memory->MBX_UPSTR_CMD_BASE =
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(IFX_uint32_t *) CPHYSADDR ((IFX_uint32_t) MBX_UPSTRM_CMD_FIFO_BASE);
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MBX_Memory->MBX_UPSTR_CMD_SIZE = MBX_CMD_FIFO_SIZE;
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-@@ -1558,7 +1579,7 @@ IFX_int32_t ifx_mps_mbx_read_message (mp
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+@@ -1564,7 +1595,7 @@
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IFX_uint32_t * bytes)
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{
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IFX_int32_t i, ret;
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@@ -273,7 +277,7 @@
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IFXOS_LOCKINT (flags);
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-@@ -1768,7 +1789,7 @@ IFX_int32_t ifx_mps_mbx_write_message (m
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+@@ -1774,7 +1805,7 @@
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{
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mps_fifo *mbx;
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IFX_uint32_t i;
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@@ -282,7 +286,7 @@
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IFX_int32_t retval = -EAGAIN;
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IFX_int32_t retries = 0;
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IFX_uint32_t word = 0;
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-@@ -2163,6 +2184,7 @@ IFX_int32_t ifx_mps_mbx_write_cmd (mps_m
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+@@ -2169,6 +2200,7 @@
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TRACE (MPS, DBG_LEVEL_HIGH,
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("%s(): Invalid device ID %d !\n", __FUNCTION__, pMBDev->devID));
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}
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@@ -290,7 +294,7 @@
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return retval;
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}
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-@@ -2186,7 +2208,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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+@@ -2192,7 +2224,7 @@
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mps_mbx_dev *mbx_dev;
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MbxMsg_s msg;
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IFX_uint32_t bytes_read = 0;
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@@ -299,7 +303,7 @@
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IFX_int32_t ret;
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/* set pointer to data upstream mailbox, no matter if 0,1,2 or 3 because
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-@@ -2277,7 +2299,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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+@@ -2283,7 +2315,7 @@
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{
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ifx_mps_bufman_dec_level (1);
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if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
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@@ -308,7 +312,7 @@
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{
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IFXOS_LockRelease (pMPSDev->provide_buffer);
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}
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-@@ -2320,7 +2342,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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+@@ -2326,7 +2358,7 @@
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#endif /* CONFIG_PROC_FS */
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ifx_mps_bufman_dec_level (1);
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if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
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@@ -317,7 +321,7 @@
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{
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IFXOS_LockRelease (pMPSDev->provide_buffer);
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}
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-@@ -2350,7 +2372,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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+@@ -2356,7 +2388,7 @@
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IFX_void_t ifx_mps_mbx_cmd_upstream (IFX_ulong_t dummy)
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{
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mps_fifo *mbx;
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@@ -326,7 +330,7 @@
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/* set pointer to upstream command mailbox */
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mbx = &(pMPSDev->cmd_upstrm_fifo);
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-@@ -2398,7 +2420,7 @@ IFX_void_t ifx_mps_mbx_event_upstream (I
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+@@ -2404,7 +2436,7 @@
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mps_event_msg msg;
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IFX_int32_t length = 0;
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IFX_int32_t read_length = 0;
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@@ -335,7 +339,7 @@
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/* set pointer to upstream event mailbox */
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mbx = &(pMPSDev->event_upstrm_fifo);
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-@@ -2613,6 +2635,7 @@ IFX_void_t ifx_mps_enable_mailbox_int ()
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+@@ -2619,6 +2651,7 @@
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#endif
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*IFX_MPS_AD0ENR = Ad0Reg.val;
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@@ -343,7 +347,7 @@
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}
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/**
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-@@ -2641,7 +2664,7 @@ IFX_void_t ifx_mps_disable_mailbox_int (
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+@@ -2647,7 +2680,7 @@
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*/
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IFX_void_t ifx_mps_dd_mbx_int_enable (IFX_void_t)
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{
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@@ -352,7 +356,7 @@
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MPS_Ad0Reg_u Ad0Reg;
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IFXOS_LOCKINT (flags);
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-@@ -2667,7 +2690,7 @@ IFX_void_t ifx_mps_dd_mbx_int_enable (IF
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+@@ -2673,7 +2706,7 @@
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*/
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IFX_void_t ifx_mps_dd_mbx_int_disable (IFX_void_t)
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{
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@@ -361,7 +365,7 @@
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MPS_Ad0Reg_u Ad0Reg;
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IFXOS_LOCKINT (flags);
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-@@ -2732,7 +2755,6 @@ irqreturn_t ifx_mps_ad0_irq (IFX_int32_t
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+@@ -2738,7 +2771,6 @@
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#else /* */
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mask_and_ack_danube_irq (irq);
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#endif /* */
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@@ -369,7 +373,7 @@
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/* FW is up and ready to process commands */
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if (MPS_Ad0StatusReg.fld.dl_end)
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{
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-@@ -2794,6 +2816,7 @@ irqreturn_t ifx_mps_ad0_irq (IFX_int32_t
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+@@ -2800,6 +2832,7 @@
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}
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}
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@@ -377,7 +381,7 @@
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if (MPS_Ad0StatusReg.fld.du_mbx)
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{
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#ifdef CONFIG_PROC_FS
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-@@ -2938,12 +2961,12 @@ irqreturn_t ifx_mps_vc_irq (IFX_int32_t
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+@@ -2944,12 +2977,12 @@
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IFX_MPS_CVC0SR[chan] = MPS_VCStatusReg.val;
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/* handle only enabled interrupts */
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MPS_VCStatusReg.val &= IFX_MPS_VC0ENR[chan];
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@@ -391,7 +395,7 @@
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pMPSDev->event.MPS_VCStatReg[chan].val = MPS_VCStatusReg.val;
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#ifdef PRINT_ON_ERR_INTERRUPT
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if (MPS_VCStatusReg.fld.rcv_ov)
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-@@ -3087,7 +3110,8 @@ IFX_int32_t ifx_mps_get_fw_version (IFX_
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+@@ -3093,7 +3126,8 @@
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*/
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IFX_return_t ifx_mps_init_gpt ()
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{
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@@ -401,7 +405,7 @@
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IFX_ulong_t count;
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#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
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timer = TIMER1A;
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-@@ -3160,6 +3184,7 @@ IFX_void_t ifx_mps_shutdown_gpt (IFX_voi
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+@@ -3166,6 +3200,7 @@
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#else /* Danube */
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timer = TIMER1B;
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#endif /* SYSTEM_AR9 || SYSTEM_VR9 */
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@@ -411,7 +415,15 @@
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--- a/src/mps/drv_mps_vmmc_danube.c
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+++ b/src/mps/drv_mps_vmmc_danube.c
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-@@ -32,9 +32,21 @@
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+@@ -16,6 +16,7 @@
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+ /* ============================= */
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+ /* Includes */
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+ /* ============================= */
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++#include "linux/version.h"
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+ #include "drv_config.h"
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+
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+ #ifdef SYSTEM_DANUBE /* defined in drv_mps_vmmc_config.h */
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+@@ -36,9 +37,22 @@
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#include "ifxos_select.h"
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#include "ifxos_interrupt.h"
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@@ -425,6 +437,7 @@
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+# include <linux/dma-mapping.h>
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+
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+
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++#define LQ_RCU_BASE_ADDR (KSEG1 + LTQ_RCU_BASE_ADDR)
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+# define LQ_RCU_RST ((u32 *)(LQ_RCU_BASE_ADDR + 0x0010))
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+#define IFX_RCU_RST_REQ_CPU1 (1 << 3)
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+# define IFX_RCU_RST_REQ LQ_RCU_RST
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@@ -436,7 +449,7 @@
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#include "drv_mps_vmmc.h"
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#include "drv_mps_vmmc_dbg.h"
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-@@ -71,6 +83,20 @@ IFX_void_t ifx_mps_release (IFX_void_t);
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+@@ -75,6 +89,20 @@
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/* Local function definition */
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/* ============================= */
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@@ -457,7 +470,7 @@
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|
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/******************************************************************************
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|
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* DANUBE Specific Routines
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|
|
******************************************************************************/
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-@@ -130,6 +156,15 @@ IFX_int32_t ifx_mps_download_firmware (m
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|
|
+@@ -134,6 +162,15 @@
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|
}
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|
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|
|
/* check if FW image fits in available memory space */
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|
|
@@ -473,7 +486,7 @@
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|
|
if (mem > ifx_get_cp1_size())
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|
{
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|
|
TRACE (MPS, DBG_LEVEL_HIGH,
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|
|
-@@ -137,6 +172,7 @@ IFX_int32_t ifx_mps_download_firmware (m
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|
|
+@@ -141,6 +178,7 @@
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|
|
__FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()));
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|
return IFX_ERROR;
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}
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@@ -481,7 +494,7 @@
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/* reset the driver */
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ifx_mps_reset ();
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-@@ -357,7 +393,7 @@ IFX_void_t ifx_mps_release (IFX_void_t)
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+@@ -361,7 +399,7 @@
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*/
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IFX_void_t ifx_mps_wdog_expiry()
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{
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@@ -647,56 +660,20 @@
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{
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--- a/src/mps/drv_mps_vmmc_linux.c
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+++ b/src/mps/drv_mps_vmmc_linux.c
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-@@ -19,11 +19,16 @@
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- #include "drv_config.h"
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-
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- #include "drv_mps_version.h"
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-+#include <linux/version.h>
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-
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- #ifdef CONFIG_DEBUG_MINI_BOOT
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- #define IKOS_MINI_BOOT
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- #endif /* */
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-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
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-+#include <linux/autoconf.h>
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-+#else
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- #include <generated/autoconf.h>
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-+#endif
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- #include <linux/module.h>
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- #include <linux/init.h>
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- #include <linux/poll.h>
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-@@ -34,16 +39,27 @@
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- #include <linux/delay.h>
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- #include <linux/interrupt.h>
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- #ifdef LINUX_2_6
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-+#ifndef UTS_RELEASE
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-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33)
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-+#include <linux/utsrelease.h>
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-+#else
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- #include <generated/utsrelease.h>
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-+#endif
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-+#endif /* UTC_RELEASE */
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- #else /* */
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- #include <linux/uts.h>
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+@@ -57,10 +57,11 @@
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#include <linux/moduleparam.h>
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#endif /* */
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-
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--#include <asm/ifx/irq.h>
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--#include <asm/ifx/ifx_regs.h>
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--#include <asm/ifx_vpe.h>
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-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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-+#include "drv_vmmc_init.h"
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-+# include <lantiq.h>
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-+# include <irq.h>
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-+#else
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-+# include <asm/ifx/irq.h>
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-+# include <asm/ifx/ifx_regs.h>
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-+# include <asm/ifx_vpe.h>
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++#if !defined CONFIG_LANTIQ
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+ #include <asm/ifx/irq.h>
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+ #include <asm/ifx/ifx_regs.h>
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+ #include <asm/ifx_vpe.h>
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+#endif
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/* lib_ifxos headers */
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#include "ifx_types.h"
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-@@ -915,7 +931,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
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+@@ -959,7 +960,7 @@
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#endif /* MPS_FIFO_BLOCKING_WRITE */
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case FIO_MPS_GET_STATUS:
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{
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@@ -705,7 +682,7 @@
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/* get the status of the channel */
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if (!from_kernel)
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-@@ -949,7 +965,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
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+@@ -993,7 +994,7 @@
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#if CONFIG_MPS_HISTORY_SIZE > 0
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case FIO_MPS_GET_CMD_HISTORY:
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{
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@@ -714,7 +691,7 @@
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if (from_kernel)
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{
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-@@ -1641,6 +1657,7 @@ IFX_int32_t ifx_mps_get_status_proc (IFX
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+@@ -1685,6 +1686,7 @@
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sprintf (buf + len, " minLv: \t %8d\n",
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ifx_mps_dev.voice_mb[i].upstrm_fifo->min_space);
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}
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@@ -722,7 +699,7 @@
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return len;
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}
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-@@ -2247,9 +2264,11 @@ IFX_int32_t __init ifx_mps_init_module (
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+@@ -2291,9 +2293,11 @@
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return result;
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}
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@@ -735,7 +712,7 @@
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/* enable mailbox interrupts */
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ifx_mps_enable_mailbox_int ();
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/* init FW ready event */
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-@@ -2377,9 +2396,11 @@ ifx_mps_cleanup_module (IFX_void_t)
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+@@ -2421,9 +2425,11 @@
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/* disable mailbox interrupts */
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ifx_mps_disable_mailbox_int ();
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John Crispin