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@@ -0,0 +1,436 @@
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+From b7f492ca20e480ea3402692e165f919f20145935 Mon Sep 17 00:00:00 2001
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+From: Oliver Schinagl <[email protected]>
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+Date: Tue, 3 Dec 2013 12:07:01 +0100
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+Subject: [PATCH] ARM: sunxi: Add an ahci-platform compatible AHCI driver for
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+ the Allwinner SUNXi series of SoCs
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+
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+This patch adds support for the sunxi series of SoC's by allwinner. It
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+plugs into the ahci-platform framework.
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+
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+Note: Currently it uses a somewhat hackish approach that probably needs
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+a lot more work, but does the same as the IMX SoC's.
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+
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+Signed-off-by: Olliver Schinagl <[email protected]>
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+---
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+ .../devicetree/bindings/ata/ahci-sunxi.txt | 24 ++
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+ drivers/ata/Kconfig | 9 +
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+ drivers/ata/Makefile | 1 +
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+ drivers/ata/ahci_platform.c | 12 +
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+ drivers/ata/ahci_sunxi.c | 305 +++++++++++++++++++++
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+ 5 files changed, 351 insertions(+)
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+ create mode 100644 Documentation/devicetree/bindings/ata/ahci-sunxi.txt
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+ create mode 100644 drivers/ata/ahci_sunxi.c
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+
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+diff --git a/Documentation/devicetree/bindings/ata/ahci-sunxi.txt b/Documentation/devicetree/bindings/ata/ahci-sunxi.txt
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+new file mode 100644
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+index 0000000..0792fa5
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+--- /dev/null
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++++ b/Documentation/devicetree/bindings/ata/ahci-sunxi.txt
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+@@ -0,0 +1,24 @@
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++Allwinner SUNXI AHCI SATA Controller
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++
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++SATA nodes are defined to describe on-chip Serial ATA controllers.
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++Each SATA controller should have its own node.
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++
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++Required properties:
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++- compatible : compatible list, contains "allwinner,sun4i-a10-ahci"
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++- reg : <registers mapping>
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++- interrupts : <interrupt mapping for AHCI IRQ>
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++- clocks : clocks for ACHI
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++- clock-names : clock names for AHCI
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++
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++Optional properties:
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++- pwr-supply : regulator to control the power supply GPIO
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++
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++Example:
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++ ahci@01c18000 {
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++ compatible = "allwinner,sun4i-a10-ahci";
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++ reg = <0x01c18000 0x1000>;
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++ interrupts = <0 56 1>;
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++ clocks = <&ahb_gates 25>, <&pll6 0>;
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++ clock-names = "ahb_sata", "pll6_sata";
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++ pwr-supply = <®_ahci_5v>;
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++ };
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+diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
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+index 4e73772..b87e2ba 100644
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+--- a/drivers/ata/Kconfig
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++++ b/drivers/ata/Kconfig
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+@@ -106,6 +106,15 @@ config AHCI_IMX
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+
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+ If unsure, say N.
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+
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++config AHCI_SUNXI
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++ tristate "Allwinner sunxi AHCI SATA support"
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++ depends on SATA_AHCI_PLATFORM && ARCH_SUNXI
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++ help
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++ This option enables support for the Allwinner sunxi SoC's
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++ onboard AHCI SATA.
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++
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++ If unsure, say N.
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++
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+ config SATA_FSL
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+ tristate "Freescale 3.0Gbps SATA support"
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+ depends on FSL_SOC
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+diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
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+index 46518c6..246050b 100644
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+--- a/drivers/ata/Makefile
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++++ b/drivers/ata/Makefile
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+@@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24) += sata_sil24.o
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+ obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
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+ obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o
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+ obj-$(CONFIG_AHCI_IMX) += ahci_imx.o
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++obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o
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+
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+ # SFF w/ custom DMA
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+ obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
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+diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
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+index 4b231ba..1046b44 100644
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+--- a/drivers/ata/ahci_platform.c
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++++ b/drivers/ata/ahci_platform.c
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+@@ -31,6 +31,7 @@ enum ahci_type {
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+ AHCI, /* standard platform ahci */
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+ IMX53_AHCI, /* ahci on i.mx53 */
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+ STRICT_AHCI, /* delayed DMA engine start */
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++ SUNXI_AHCI, /* ahci on sunxi */
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+ };
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+
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+ static struct platform_device_id ahci_devtype[] = {
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+@@ -44,6 +45,9 @@ enum ahci_type {
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+ .name = "strict-ahci",
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+ .driver_data = STRICT_AHCI,
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+ }, {
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++ .name = "sunxi-ahci",
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++ .driver_data = SUNXI_AHCI,
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++ }, {
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+ /* sentinel */
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+ }
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+ };
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+@@ -81,6 +85,14 @@ struct ata_port_operations ahci_platform_ops = {
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+ .udma_mask = ATA_UDMA6,
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+ .port_ops = &ahci_platform_ops,
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+ },
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++ [SUNXI_AHCI] = {
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++ AHCI_HFLAGS (AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI |
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++ AHCI_HFLAG_NO_PMP | AHCI_HFLAG_YES_NCQ),
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++ .flags = AHCI_FLAG_COMMON,
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++ .pio_mask = ATA_PIO4,
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++ .udma_mask = ATA_UDMA6,
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++ .port_ops = &ahci_platform_ops,
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++ },
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+ };
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+
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+ static struct scsi_host_template ahci_platform_sht = {
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+diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
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+new file mode 100644
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+index 0000000..982641f
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+--- /dev/null
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++++ b/drivers/ata/ahci_sunxi.c
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+@@ -0,0 +1,305 @@
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++/*
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++ * Allwinner sunxi AHCI SATA platform driver
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++ * Copyright 2013 Olliver Schinagl <[email protected]>
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++ *
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++ * Based on the AHCI SATA platform driver by Freescale and Allwinner
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++ * Based on code from
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++ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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++ * Daniel Wang <[email protected]>
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++ *
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++ * This program is free software; you can redistribute it and/or modify it
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++ * under the terms and conditions of the GNU General Public License,
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++ * version 2, as published by the Free Software Foundation.
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++ *
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++ * This program is distributed in the hope it will be useful, but WITHOUT
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++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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++ * more details.
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++ *
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++ * You should have received a copy of the GNU General Public License along with
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++ * this program. If not, see <http://www.gnu.org/licenses/>.
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++ */
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++
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++#include <linux/kernel.h>
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++#include <linux/regulator/consumer.h>
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++#include <linux/module.h>
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++#include <linux/platform_device.h>
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++#include <linux/mod_devicetable.h>
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++#include <linux/of_device.h>
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++#include <linux/ioport.h>
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++#include <linux/device.h>
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++#include <linux/gfp.h>
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++#include <linux/clk.h>
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++#include <linux/clk-provider.h>
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++#include <linux/errno.h>
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++#include <linux/ahci_platform.h>
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++#include "ahci.h"
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++
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++#define DRV_NAME "sunxi-sata"
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++
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++#define AHCI_BISTAFR 0x00a0
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++#define AHCI_BISTCR 0x00a4
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++#define AHCI_BISTFCTR 0x00a8
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++#define AHCI_BISTSR 0x00ac
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++#define AHCI_BISTDECR 0x00b0
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++#define AHCI_DIAGNR0 0x00b4
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++#define AHCI_DIAGNR1 0x00b8
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++#define AHCI_OOBR 0x00bc
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++#define AHCI_PHYCS0R 0x00c0
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++#define AHCI_PHYCS1R 0x00c4
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++#define AHCI_PHYCS2R 0x00c8
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++#define AHCI_TIMER1MS 0x00e0
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++#define AHCI_GPARAM1R 0x00e8
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++#define AHCI_GPARAM2R 0x00ec
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++#define AHCI_PPARAMR 0x00f0
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++#define AHCI_TESTR 0x00f4
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++#define AHCI_VERSIONR 0x00f8
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++#define AHCI_IDR 0x00fc
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++#define AHCI_RWCR 0x00fc
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++#define AHCI_P0DMACR 0x0170
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++#define AHCI_P0PHYCR 0x0178
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++#define AHCI_P0PHYSR 0x017c
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++
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++struct sunxi_ahci_data {
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++ struct platform_device *ahci_pdev;
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++ struct regulator *regulator;
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++ struct clk *sata_clk;
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++ struct clk *ahb_clk;
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++};
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++
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++static void sunxi_clrbits(void __iomem *reg, u32 clr_val)
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++{
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++ u32 reg_val;
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++
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++ reg_val = readl(reg);
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++ reg_val &= ~(clr_val);
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++ writel(reg_val, reg);
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++}
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++
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++static void sunxi_setbits(void __iomem *reg, u32 set_val)
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++{
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++ u32 reg_val;
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++
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++ reg_val = readl(reg);
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++ reg_val |= set_val;
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++ writel(reg_val, reg);
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++}
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++
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++static void sunxi_clrsetbits(void __iomem *reg, u32 clr_val, u32 set_val)
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++{
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++ u32 reg_val;
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++
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++ reg_val = readl(reg);
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++ reg_val &= ~(clr_val);
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++ reg_val |= set_val;
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++ writel(reg_val, reg);
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++}
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++
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++static u32 sunxi_getbits(void __iomem *reg, u8 mask, u8 shift)
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++{
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++ return (readl(reg) >> shift) & mask;
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++}
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++
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++static int sunxi_ahci_phy_init(struct device *dev, void __iomem *reg_base)
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++{
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++ u32 reg_val;
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++ int timeout;
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++
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++ /* This magic is from the original code */
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++ writel(0, reg_base + AHCI_RWCR);
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++ mdelay(5);
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++
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++ sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
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++ sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
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++ (0x7 << 24),
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++ (0x5 << 24) | BIT(23) | BIT(18));
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++ sunxi_clrsetbits(reg_base + AHCI_PHYCS1R,
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++ (0x3 << 16) | (0x1f << 8) | (0x3 << 6),
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++ (0x2 << 16) | (0x6 << 8) | (0x2 << 6));
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++ sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
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++ sunxi_clrbits(reg_base + AHCI_PHYCS1R, BIT(19));
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++ sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
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++ (0x7 << 20), (0x3 << 20));
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++ sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
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++ (0x1f << 5), (0x19 << 5));
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++ mdelay(5);
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++
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++ sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
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++
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++ timeout = 0x100000;
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++ do {
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++ reg_val = sunxi_getbits(reg_base + AHCI_PHYCS0R, 0x7, 28);
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++ } while (--timeout && (reg_val != 0x2));
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++ if (!timeout)
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++ dev_err(dev, "PHY power up failed.\n");
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++
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++ sunxi_setbits(reg_base + AHCI_PHYCS2R, (0x1 << 24));
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++
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++ timeout = 0x100000;
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++ do {
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++ reg_val = sunxi_getbits(reg_base + AHCI_PHYCS2R, 0x1, 24);
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++ } while (--timeout && reg_val);
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++ if (!timeout)
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++ dev_err(dev, "PHY calibration failed.\n");
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++ mdelay(15);
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++
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++ writel(0x7, reg_base + AHCI_RWCR);
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++
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++ return 0;
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++}
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++
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++static int sunxi_ahci_init(struct device *dev, void __iomem *reg_base)
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++{
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++ struct sunxi_ahci_data *ahci_data;
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++ int ret;
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++
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++ ahci_data = dev_get_drvdata(dev->parent);
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++
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++ ret = clk_prepare_enable(ahci_data->sata_clk);
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++ if (ret < 0)
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++ return ret;
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++
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++ ret = clk_prepare_enable(ahci_data->ahb_clk);
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++ if (ret < 0)
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++ return ret;
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++
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++ ret = regulator_enable(ahci_data->regulator);
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++ if (ret)
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++ return ret;
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++
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++ return sunxi_ahci_phy_init(dev, reg_base);
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++}
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++
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++static void sunxi_ahci_exit(struct device *dev)
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++{
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++ struct sunxi_ahci_data *ahci_data;
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++
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++ ahci_data = dev_get_drvdata(dev->parent);
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++
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++ regulator_disable(ahci_data->regulator);
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++
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++ clk_disable_unprepare(ahci_data->ahb_clk);
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++ clk_disable_unprepare(ahci_data->sata_clk);
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++}
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++
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++static struct ahci_platform_data sunxi_ahci_pdata = {
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++ .init = sunxi_ahci_init,
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++ .exit = sunxi_ahci_exit,
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++};
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++
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++static int sunxi_ahci_remove(struct platform_device *pdev)
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++{
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++ struct sunxi_ahci_data *ahci_data;
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++
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++ ahci_data = platform_get_drvdata(pdev);
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++ platform_device_unregister(ahci_data->ahci_pdev);
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++
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++ dev_dbg(&pdev->dev, "driver unloaded\n");
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++
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++ return 0;
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++}
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++
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++static const struct of_device_id sunxi_ahci_of_match[] = {
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++ { .compatible = "allwinner,sun4i-a10-ahci", .data = &sunxi_ahci_pdata},
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++ {/* sentinel */},
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++};
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++MODULE_DEVICE_TABLE(of, sunxi_ahci_of_match);
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++
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++static int sunxi_ahci_probe(struct platform_device *pdev)
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++{
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++ const struct ahci_platform_data *pdata;
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++ const struct of_device_id *of_dev_id;
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++ struct resource *mem, *irq, res[2];
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++ struct platform_device *ahci_pdev;
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++ struct sunxi_ahci_data *ahci_data;
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++ struct regulator *regulator;
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++ int ret;
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++
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++ regulator = devm_regulator_get(&pdev->dev, "pwr");
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++ if (IS_ERR(regulator)) {
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++ ret = PTR_ERR(regulator);
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++ if (ret != -EPROBE_DEFER)
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++ dev_err(&pdev->dev, "no regulator found (%d)\n", ret);
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++ return ret;
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++ }
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++
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++ ahci_data = devm_kzalloc(&pdev->dev, sizeof(*ahci_data), GFP_KERNEL);
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++ if (!ahci_data)
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++ return -ENOMEM;
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++
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++ ahci_pdev = platform_device_alloc("sunxi-ahci", -1);
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++ if (!ahci_pdev)
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++ return -ENODEV;
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++
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++ ahci_pdev->dev.parent = &pdev->dev;
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++
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++ ahci_data->regulator = regulator;
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++ ahci_data->ahb_clk = devm_clk_get(&pdev->dev, "ahb_sata");
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++ if (IS_ERR(ahci_data->ahb_clk)) {
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++ ret = PTR_ERR(ahci_data->ahb_clk);
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++ goto err_out;
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++ }
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++
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++ ahci_data->sata_clk = devm_clk_get(&pdev->dev, "pll6_sata");
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++ if (IS_ERR(ahci_data->sata_clk)) {
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++ ret = PTR_ERR(ahci_data->sata_clk);
|
|
|
++ goto err_out;
|
|
|
++ }
|
|
|
++
|
|
|
++ ahci_data->ahci_pdev = ahci_pdev;
|
|
|
++ platform_set_drvdata(pdev, ahci_data);
|
|
|
++
|
|
|
++ ahci_pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
|
|
++ ahci_pdev->dev.dma_mask = &ahci_pdev->dev.coherent_dma_mask;
|
|
|
++ ahci_pdev->dev.of_node = pdev->dev.of_node;
|
|
|
++
|
|
|
++ of_dev_id = of_match_device(sunxi_ahci_of_match, &pdev->dev);
|
|
|
++ if (of_dev_id) {
|
|
|
++ pdata = of_dev_id->data;
|
|
|
++ } else {
|
|
|
++ ret = -EINVAL;
|
|
|
++ goto err_out;
|
|
|
++ }
|
|
|
++
|
|
|
++ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
++ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
++ if (!mem || !irq) {
|
|
|
++ ret = -ENOMEM;
|
|
|
++ goto err_out;
|
|
|
++ }
|
|
|
++ res[0] = *mem;
|
|
|
++ res[1] = *irq;
|
|
|
++ ret = platform_device_add_resources(ahci_pdev, res, 2);
|
|
|
++ if (ret)
|
|
|
++ goto err_out;
|
|
|
++
|
|
|
++ ret = platform_device_add_data(ahci_pdev, pdata, sizeof(*pdata));
|
|
|
++ if (ret)
|
|
|
++ goto err_out;
|
|
|
++
|
|
|
++ ret = platform_device_add(ahci_pdev);
|
|
|
++ if (ret)
|
|
|
++ goto err_out;
|
|
|
++
|
|
|
++ return 0;
|
|
|
++
|
|
|
++err_out:
|
|
|
++ platform_device_put(ahci_pdev);
|
|
|
++ return ret;
|
|
|
++}
|
|
|
++
|
|
|
++static struct platform_driver sunxi_ahci_driver = {
|
|
|
++ .probe = sunxi_ahci_probe,
|
|
|
++ .remove = sunxi_ahci_remove,
|
|
|
++ .driver = {
|
|
|
++ .name = DRV_NAME,
|
|
|
++ .owner = THIS_MODULE,
|
|
|
++ .of_match_table = sunxi_ahci_of_match,
|
|
|
++ },
|
|
|
++};
|
|
|
++module_platform_driver(sunxi_ahci_driver);
|
|
|
++
|
|
|
++MODULE_DESCRIPTION("Allwinner sunxi AHCI SATA platform driver");
|
|
|
++MODULE_AUTHOR("Olliver Schinagl <[email protected]>");
|
|
|
++MODULE_LICENSE("GPL");
|
|
|
++MODULE_ALIAS("ahci:sunxi");
|
|
|
+--
|
|
|
+1.8.5.1
|
|
|
+
|
Zoltan Herpai