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@@ -14,11 +14,9 @@ Signed-off-by: John Crispin <[email protected]>
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6 files changed, 385 insertions(+), 19 deletions(-)
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create mode 100644 drivers/pinctrl/pinctrl-rt2880.c
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-Index: linux-3.10.17/arch/mips/Kconfig
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/Kconfig 2013-10-26 17:19:49.094708911 +0200
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-+++ linux-3.10.17/arch/mips/Kconfig 2013-10-26 17:19:49.926708932 +0200
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-@@ -446,6 +446,8 @@
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+--- a/arch/mips/Kconfig
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++++ b/arch/mips/Kconfig
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+@@ -446,6 +446,8 @@ config RALINK
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select HAVE_MACH_CLKDEV
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select CLKDEV_LOOKUP
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select ARCH_REQUIRE_GPIOLIB
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@@ -27,11 +25,9 @@ Index: linux-3.10.17/arch/mips/Kconfig
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config SGI_IP22
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bool "SGI IP22 (Indy/Indigo2)"
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-Index: linux-3.10.17/drivers/pinctrl/Kconfig
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-===================================================================
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---- linux-3.10.17.orig/drivers/pinctrl/Kconfig 2013-10-18 19:44:19.000000000 +0200
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-+++ linux-3.10.17/drivers/pinctrl/Kconfig 2013-10-26 17:19:49.930708931 +0200
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-@@ -114,6 +114,11 @@
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+--- a/drivers/pinctrl/Kconfig
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++++ b/drivers/pinctrl/Kconfig
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+@@ -114,6 +114,11 @@ config PINCTRL_LANTIQ
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select PINMUX
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select PINCONF
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@@ -43,11 +39,9 @@ Index: linux-3.10.17/drivers/pinctrl/Kconfig
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config PINCTRL_FALCON
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bool
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depends on SOC_FALCON
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-Index: linux-3.10.17/drivers/pinctrl/Makefile
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-===================================================================
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---- linux-3.10.17.orig/drivers/pinctrl/Makefile 2013-10-18 19:44:19.000000000 +0200
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-+++ linux-3.10.17/drivers/pinctrl/Makefile 2013-10-26 17:19:49.930708931 +0200
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-@@ -45,6 +45,7 @@
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+--- a/drivers/pinctrl/Makefile
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++++ b/drivers/pinctrl/Makefile
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+@@ -45,6 +45,7 @@ obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinc
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obj-$(CONFIG_PINCTRL_S3C64XX) += pinctrl-s3c64xx.o
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obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
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obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
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@@ -55,10 +49,8 @@ Index: linux-3.10.17/drivers/pinctrl/Makefile
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obj-$(CONFIG_PLAT_ORION) += mvebu/
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obj-$(CONFIG_ARCH_SHMOBILE) += sh-pfc/
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-Index: linux-3.10.17/drivers/pinctrl/pinctrl-rt2880.c
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-===================================================================
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---- /dev/null 1970-01-01 00:00:00.000000000 +0000
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-+++ linux-3.10.17/drivers/pinctrl/pinctrl-rt2880.c 2013-10-27 16:22:50.132754888 +0100
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+--- /dev/null
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++++ b/drivers/pinctrl/pinctrl-rt2880.c
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@@ -0,0 +1,466 @@
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+/*
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+ * linux/drivers/pinctrl/pinctrl-rt2880.c
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@@ -526,10 +518,8 @@ Index: linux-3.10.17/drivers/pinctrl/pinctrl-rt2880.c
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+}
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+
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+core_initcall_sync(rt2880_pinmux_init);
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-Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/pinmux.h
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-===================================================================
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---- /dev/null 1970-01-01 00:00:00.000000000 +0000
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-+++ linux-3.10.17/arch/mips/include/asm/mach-ralink/pinmux.h 2013-10-27 07:28:38.999991133 +0100
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+--- /dev/null
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++++ b/arch/mips/include/asm/mach-ralink/pinmux.h
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@@ -0,0 +1,53 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify
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@@ -584,10 +574,8 @@ Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/pinmux.h
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+extern struct rt2880_pmx_group *rt2880_pinmux_data;
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+
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+#endif
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-Index: linux-3.10.17/arch/mips/ralink/mt7620.c
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/ralink/mt7620.c 2013-10-26 17:19:49.462708921 +0200
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-+++ linux-3.10.17/arch/mips/ralink/mt7620.c 2013-10-27 13:33:02.148512122 +0100
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+--- a/arch/mips/ralink/mt7620.c
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++++ b/arch/mips/ralink/mt7620.c
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@@ -17,6 +17,7 @@
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#include <asm/mipsregs.h>
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#include <asm/mach-ralink/ralink_regs.h>
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@@ -596,7 +584,7 @@ Index: linux-3.10.17/arch/mips/ralink/mt7620.c
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#include "common.h"
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-@@ -48,118 +49,58 @@
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+@@ -48,118 +49,58 @@ static int dram_type;
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/* the pll dividers */
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static u32 mt7620_clk_divider[] = { 2, 3, 4, 8 };
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@@ -764,17 +752,15 @@ Index: linux-3.10.17/arch/mips/ralink/mt7620.c
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};
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void __init ralink_clk_init(void)
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-@@ -281,4 +222,6 @@
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+@@ -281,4 +222,6 @@ void prom_soc_init(struct ralink_soc_inf
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(pmu0 & PMU_SW_SET) ? ("sw") : ("hw"));
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pr_info("Digital PMU set to %s control\n",
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(pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
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+
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+ rt2880_pinmux_data = mt7620a_pinmux_data;
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}
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-Index: linux-3.10.17/arch/mips/ralink/rt305x.c
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/ralink/rt305x.c 2013-10-26 17:19:49.722708926 +0200
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-+++ linux-3.10.17/arch/mips/ralink/rt305x.c 2013-10-27 16:23:29.836755834 +0100
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+--- a/arch/mips/ralink/rt305x.c
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++++ b/arch/mips/ralink/rt305x.c
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@@ -17,90 +17,71 @@
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#include <asm/mipsregs.h>
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#include <asm/mach-ralink/ralink_regs.h>
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@@ -924,7 +910,7 @@ Index: linux-3.10.17/arch/mips/ralink/rt305x.c
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};
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static void rt305x_wdt_reset(void)
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-@@ -114,14 +95,6 @@
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+@@ -114,14 +95,6 @@ static void rt305x_wdt_reset(void)
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rt_sysc_w32(t, SYSC_REG_SYSTEM_CONFIG);
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}
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@@ -939,7 +925,7 @@ Index: linux-3.10.17/arch/mips/ralink/rt305x.c
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static unsigned long rt5350_get_mem_size(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
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-@@ -291,11 +264,14 @@
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+@@ -291,11 +264,14 @@ void prom_soc_init(struct ralink_soc_inf
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soc_info->mem_base = RT305X_SDRAM_BASE;
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if (soc_is_rt5350()) {
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soc_info->mem_size = rt5350_get_mem_size();
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@@ -954,11 +940,9 @@ Index: linux-3.10.17/arch/mips/ralink/rt305x.c
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+ rt2880_pinmux_data = rt3352_pinmux_data;
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}
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}
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-Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/rt305x.h
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/include/asm/mach-ralink/rt305x.h 2013-10-18 19:44:19.000000000 +0200
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-+++ linux-3.10.17/arch/mips/include/asm/mach-ralink/rt305x.h 2013-10-26 17:19:49.934708931 +0200
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-@@ -125,24 +125,28 @@
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+--- a/arch/mips/include/asm/mach-ralink/rt305x.h
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++++ b/arch/mips/include/asm/mach-ralink/rt305x.h
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+@@ -125,24 +125,28 @@ static inline int soc_is_rt5350(void)
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#define RT305X_GPIO_GE0_TXD0 40
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#define RT305X_GPIO_GE0_RXCLK 51
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@@ -1002,10 +986,8 @@ Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/rt305x.h
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#define RT3352_SYSC_REG_SYSCFG0 0x010
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#define RT3352_SYSC_REG_SYSCFG1 0x014
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-Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/mt7620.h
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2013-10-26 17:19:49.250708916 +0200
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-+++ linux-3.10.17/arch/mips/include/asm/mach-ralink/mt7620.h 2013-10-27 13:13:24.892484072 +0100
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+--- a/arch/mips/include/asm/mach-ralink/mt7620.h
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++++ b/arch/mips/include/asm/mach-ralink/mt7620.h
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@@ -59,7 +59,6 @@
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#define MT7620_DDR2_SIZE_MIN 32
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#define MT7620_DDR2_SIZE_MAX 256
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@@ -1060,10 +1042,8 @@ Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/mt7620.h
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+#define MT7620_GPIO_MODE_PA 20
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#endif
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-Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/rt3883.h
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/include/asm/mach-ralink/rt3883.h 2013-10-18 19:44:19.000000000 +0200
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-+++ linux-3.10.17/arch/mips/include/asm/mach-ralink/rt3883.h 2013-10-26 17:19:49.934708931 +0200
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+--- a/arch/mips/include/asm/mach-ralink/rt3883.h
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++++ b/arch/mips/include/asm/mach-ralink/rt3883.h
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@@ -112,8 +112,6 @@
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#define RT3883_CLKCFG1_PCI_CLK_EN BIT(19)
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#define RT3883_CLKCFG1_UPHY0_CLK_EN BIT(18)
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@@ -1094,10 +1074,8 @@ Index: linux-3.10.17/arch/mips/include/asm/mach-ralink/rt3883.h
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#define RT3883_GPIO_MODE_PCI_SHIFT 11
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#define RT3883_GPIO_MODE_PCI_MASK 0x7
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#define RT3883_GPIO_MODE_PCI (RT3883_GPIO_MODE_PCI_MASK << RT3883_GPIO_MODE_PCI_SHIFT)
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-Index: linux-3.10.17/arch/mips/ralink/common.h
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/ralink/common.h 2013-10-26 17:19:49.094708911 +0200
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-+++ linux-3.10.17/arch/mips/ralink/common.h 2013-10-26 17:19:49.934708931 +0200
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+--- a/arch/mips/ralink/common.h
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++++ b/arch/mips/ralink/common.h
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@@ -11,25 +11,6 @@
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#define RAMIPS_SYS_TYPE_LEN 32
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@@ -1124,10 +1102,8 @@ Index: linux-3.10.17/arch/mips/ralink/common.h
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struct ralink_soc_info {
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unsigned char sys_type[RAMIPS_SYS_TYPE_LEN];
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unsigned char *compatible;
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-Index: linux-3.10.17/arch/mips/ralink/rt3883.c
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-===================================================================
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---- linux-3.10.17.orig/arch/mips/ralink/rt3883.c 2013-10-18 19:44:19.000000000 +0200
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-+++ linux-3.10.17/arch/mips/ralink/rt3883.c 2013-10-27 16:23:36.824756002 +0100
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+--- a/arch/mips/ralink/rt3883.c
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++++ b/arch/mips/ralink/rt3883.c
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@@ -17,132 +17,50 @@
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#include <asm/mipsregs.h>
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#include <asm/mach-ralink/ralink_regs.h>
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@@ -1299,7 +1275,7 @@ Index: linux-3.10.17/arch/mips/ralink/rt3883.c
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};
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static void rt3883_wdt_reset(void)
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-@@ -155,17 +73,6 @@
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+@@ -155,17 +73,6 @@ static void rt3883_wdt_reset(void)
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rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);
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}
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@@ -1317,7 +1293,7 @@ Index: linux-3.10.17/arch/mips/ralink/rt3883.c
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void __init ralink_clk_init(void)
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{
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unsigned long cpu_rate, sys_rate;
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-@@ -243,4 +150,6 @@
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+@@ -243,4 +150,6 @@ void prom_soc_init(struct ralink_soc_inf
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soc_info->mem_base = RT3883_SDRAM_BASE;
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soc_info->mem_size_min = RT3883_MEM_SIZE_MIN;
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soc_info->mem_size_max = RT3883_MEM_SIZE_MAX;
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