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@@ -35,17 +35,9 @@
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#define RTL821X_PAGE_PATCH 0x0b82
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#define RTL821X_MAC_SDS_PAGE(sds, page) (0x404 + (sds) * 0x20 + (page))
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-/* Using the special page 0xfff with the MDIO controller found in
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- * RealTek SoCs allows to access the PHY in RAW mode, ie. bypassing
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- * the cache and paging engine of the MDIO controller.
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- */
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-#define RTL838X_PAGE_RAW 0x0fff
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-
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#define RTL821X_PHYCR2 0x19
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#define RTL821X_PHYCR2_PHY_EEE_ENABLE BIT(5)
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-#define RTL821X_CHIP_ID 0x6276
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-
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#define RTL821X_MEDIA_PAGE_AUTO 0
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#define RTL821X_MEDIA_PAGE_COPPER 1
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#define RTL821X_MEDIA_PAGE_FIBRE 3
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