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@@ -0,0 +1,402 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+
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+/dts-v1/;
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+
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+#include "ipq6018-512m.dtsi"
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+#include "ipq6018-ess.dtsi"
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+#include "ipq6018-cp-cpu.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/leds/common.h>
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+
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+/ {
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+ model = "ALFA Network AP120C-AX";
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+ compatible = "alfa-network,ap120c-ax", "qcom,ipq6018";
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+
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+ aliases {
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+ serial0 = &blsp1_uart3;
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+ serial1 = &blsp1_uart2;
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+ led-boot = &led_status_green;
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+ led-failsafe = &led_status_green;
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+ led-running = &led_status_green;
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+ led-upgrade = &led_status_green;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ bootargs-append = " root=/dev/ubiblock0_1";
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+ pinctrl-0 = <&button_pins>;
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+ pinctrl-names = "default";
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+
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+ reset {
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+ label = "reset";
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+ linux,code = <KEY_RESTART>;
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+ gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-0 = <&led_pins>;
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+ pinctrl-names = "default";
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+
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+ led_status_green: status {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_STATUS;
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+ gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wlan2g {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_WLAN_2GHZ;
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+ gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "phy1radio";
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+ };
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+
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+ wlan5g {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_WLAN_5GHZ;
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+ gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "phy0radio";
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+ };
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+ };
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+};
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+
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+&tlmm {
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+ btcoex_pins: btcoex_pinmux {
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+ mux_0 {
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+ pins = "gpio51";
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+ function = "pta1_1";
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+ drive-strength = <6>;
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+ bias-pull-down;
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+ };
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+
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+ mux_1 {
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+ pins = "gpio52";
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+ function = "pta1_2";
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+ drive-strength = <6>;
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+ bias-pull-down;
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+ };
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+
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+ mux_2 {
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+ pins = "gpio53";
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+ function = "pta1_0";
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+ drive-strength = <6>;
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+ bias-pull-down;
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+ };
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+ };
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+
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+ btrstint_pins: btrstint_pinmux {
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+ pins = "gpio78", "gpio79";
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+ function = "gpio";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+
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+ button_pins: button_pinmux {
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+ pins = "gpio9";
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+ function = "gpio";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+
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+ hsuart_pins: hsuart_pinmux {
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+ pins = "gpio71", "gpio72", "gpio69", "gpio70";
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+ function = "blsp1_uart";
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+ drive-strength = <8>;
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+ bias-disable;
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+ };
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+
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+ led_pins: led_pinmux {
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+ pins = "gpio35", "gpio37", "gpio55";
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+ function = "gpio";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+
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+ mdio_pins: mdio_pinmux {
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+ mdc {
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+ pins = "gpio64";
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+ function = "mdc";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+
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+ mdio {
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+ pins = "gpio65";
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+ function = "mdio";
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+ drive-strength = <8>;
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+ bias-pull-up;
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+ };
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+ };
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+
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+ spi_pins: spi_pinmux {
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+ pins = "gpio38", "gpio39", "gpio40", "gpio41";
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+ function = "blsp0_spi";
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+ drive-strength = <8>;
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+ bias-pull-down;
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+ };
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+};
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+
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+&blsp1_uart3 {
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+ status = "okay";
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+
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+ pinctrl-0 = <&serial_3_pins>;
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+ pinctrl-names = "default";
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+};
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+
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+&blsp1_uart2 {
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+ status = "okay";
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+
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+ pinctrl-0 = <&hsuart_pins &btcoex_pins &btrstint_pins>;
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+ pinctrl-names = "default";
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+
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+ dmas = <&blsp_dma 2>, <&blsp_dma 3>;
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+ dma-names = "tx", "rx";
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+};
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+
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+&blsp1_spi1 {
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+ status = "okay";
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+
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+ pinctrl-0 = <&spi_pins>;
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+ pinctrl-names = "default";
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+
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0>;
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+ compatible = "jedec,spi-nor";
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+ spi-max-frequency = <25000000>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "0:SBL1";
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+ reg = <0x00000000 0x000c0000>;
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+ read-only;
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+ };
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+
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+ partition@c0000 {
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+ label = "0:MIBIB";
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+ reg = <0x000c0000 0x00010000>;
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+ read-only;
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+ };
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+
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+ partition@d0000 {
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+ label = "0:BOOTCONFIG";
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+ reg = <0x000d0000 0x00020000>;
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+ };
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+
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+ partition@f0000 {
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+ label = "0:BOOTCONFIG1";
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+ reg = <0x000f0000 0x00020000>;
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+ };
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+
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+ partition@110000 {
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+ label = "0:QSEE";
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+ reg = <0x00110000 0x001a0000>;
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+ read-only;
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+ };
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+
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+ partition@2b0000 {
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+ label = "0:QSEE_1";
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+ reg = <0x002b0000 0x001a0000>;
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+ read-only;
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+ };
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+
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+ partition@450000 {
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+ label = "0:DEVCFG";
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+ reg = <0x00450000 0x00010000>;
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+ read-only;
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+ };
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+
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+ partition@460000 {
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+ label = "0:DEVCFG_1";
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+ reg = <0x00460000 0x00010000>;
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+ read-only;
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+ };
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+
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+ partition@470000 {
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+ label = "0:RPM";
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+ reg = <0x00470000 0x00040000>;
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+ read-only;
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+ };
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+
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+ partition@4b0000 {
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+ label = "0:RPM_1";
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+ reg = <0x004b0000 0x00040000>;
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+ read-only;
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+ };
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+
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+ partition@4f0000 {
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+ label = "0:CDT";
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+ reg = <0x004f0000 0x00010000>;
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+ read-only;
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+ };
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+
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+ partition@500000 {
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+ label = "0:CDT_1";
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+ reg = <0x00500000 0x00010000>;
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+ read-only;
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+ };
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+
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+ partition@510000 {
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+ label = "0:APPSBLENV";
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+ reg = <0x00510000 0x00010000>;
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+ };
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+
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+ partition@520000 {
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+ label = "0:APPSBL";
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+ reg = <0x00520000 0x000a0000>;
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+ read-only;
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+ };
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+
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+ partition@5c0000 {
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+ label = "0:APPSBL_1";
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+ reg = <0x005c0000 0x000a0000>;
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+ read-only;
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+ };
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+
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+ partition@660000 {
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+ label = "0:ART";
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+ reg = <0x00660000 0x00040000>;
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+
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+ nvmem-layout {
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+ compatible = "fixed-layout";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ macaddr_lan: macaddr@6 {
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+ reg = <0x6 0x6>;
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+ };
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+
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+ macaddr_wan: macaddr@0 {
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+ reg = <0x0 0x6>;
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+ };
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+ };
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+ };
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+ };
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+ };
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+};
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+
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+&qpic_bam {
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+ status = "okay";
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+};
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+
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+&qpic_nand {
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+ status = "okay";
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+
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+ /*
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+ * This board uses NOR+NAND configuration which is currently not
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+ * supported by 'qcomsmem' MTD parser. Let U-Boot find the NAND
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+ * dt node and populate MTD partitions from SMEM partition table.
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+ *
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+ * This makes it possible to use QCA 'runtime failsafe' and rotate
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+ * 'rootfs'/'rootfs_1' partitions between subsequent updates.
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+ */
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+ compatible = "qcom,ipq6018-nand", "qcom,ebi2-nandc-bam-v1.5.0";
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+
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+ nand@0 {
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+ reg = <0>;
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+ nand-bus-width = <8>;
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+ };
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+};
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+
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+&qusb_phy_0 {
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+ status = "okay";
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+};
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+
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+&ssphy_0 {
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+ status = "okay";
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+};
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+
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+&usb3 {
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+ status = "okay";
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+};
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+
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+&mdio {
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+ status = "okay";
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+
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+ pinctrl-0 = <&mdio_pins>;
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+ pinctrl-names = "default";
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+ reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
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+ reset-delay-us = <10000>;
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+ reset-post-delay-us = <50000>;
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+
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+ ethernet-phy-package@0 {
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+ compatible = "qcom,qca8075-package";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0>;
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+
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+ qcom,package-mode = "psgmii";
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+
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+ qca8072_3: ethernet-phy@3 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <3>;
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+ };
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+
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+ qca8072_4: ethernet-phy@4 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <4>;
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+ };
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+ };
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+};
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+
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+&switch {
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+ status = "okay";
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+
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+ switch_lan_bmp = <ESS_PORT4>;
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+ switch_wan_bmp = <ESS_PORT5>;
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+
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+ switch_mac_mode = <MAC_MODE_PSGMII>;
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+
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+ qcom,port_phyinfo {
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+ port@4 {
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+ port_id = <4>;
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+ phy_address = <3>;
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+ };
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+
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+ port@5 {
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+ port_id = <5>;
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+ phy_address = <4>;
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+ };
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+ };
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+};
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+
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+&edma {
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+ status = "okay";
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+};
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+
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+&dp4 {
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+ status = "okay";
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+
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+ phy-handle = <&qca8072_3>;
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+ label = "lan";
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+ nvmem-cells = <&macaddr_lan>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&dp5 {
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+ status = "okay";
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+
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+ phy-handle = <&qca8072_4>;
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+ label = "wan";
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+ nvmem-cells = <&macaddr_wan>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&wifi {
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+ status = "okay";
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+
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+ qcom,ath11k-fw-memory-mode = <1>;
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+ qcom,ath11k-calibration-variant = "ALFA-Network-AP120C-AX";
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+};
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