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@@ -1,6 +1,6 @@
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-openrb.c
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-@@ -0,0 +1,79 @@
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+@@ -0,0 +1,94 @@
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+/*
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+ * Old U-boot compatibility for OpenRB boards
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+ *
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@@ -60,6 +60,20 @@
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+#undef CF_CS1_BASE
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+}
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+
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++static void fixup_isp116x(void)
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++{
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++#define ISP116X_CS_BASE 0xf0000000
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++
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++ /* PerCS3 (ISP1160's CS): base 0xf0000000, size 32MB, 16-bit, rw */
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++ mtdcr(DCRN_EBC0_CFGADDR, EBC_B3CR);
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++ mtdcr(DCRN_EBC0_CFGDATA, ISP116X_CS_BASE | EBC_BXCR_BS_32M |
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++ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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++ mtdcr(DCRN_EBC0_CFGADDR, EBC_B3AP);
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++ mtdcr(DCRN_EBC0_CFGDATA, 0x03016600);
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++
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++#undef ISP116X_CS_BASE
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++}
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++
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+static void openrb_fixups(void)
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+{
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+ ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
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@@ -67,6 +81,7 @@
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+
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+ fixup_perwe();
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+ fixup_cf_card();
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++ fixup_isp116x();
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+
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+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
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+}
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@@ -82,7 +97,7 @@
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+}
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--- /dev/null
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+++ b/arch/powerpc/boot/dts/openrb.dts
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-@@ -0,0 +1,280 @@
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+@@ -0,0 +1,291 @@
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+/*
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+ * Device Tree Source for OpenRB boards
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+ *
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@@ -286,6 +301,17 @@
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+ */
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+ clock-frequency = <0>; /* Filled in by zImage */
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+
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++ isp116x@f0000000 {
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++ compatible = "isp116x-hcd";
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++ oc_enable;
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++ int_act_high;
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++ int_edge_triggered;
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++ reg = <0x00000000 0xf0000000 0x00000002 /* data */
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++ 0x00000000 0xf1000000 0x00000002 /* addr */ >;
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++ interrupt-parent = <&UIC0>;
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++ interrupts = <0x1b 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
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++ };
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++
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+ cf_card@ff100000 {
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+ compatible = "magicbox-cf", "pata-magicbox-cf";
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+ reg = <0x00000000 0xff100000 0x00001000
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Gabor Juhos