AR7240 requires different IRQ unmasking code

SVN-Revision: 16734

target/linux/ar71xx/files/arch/mips/ar71xx/irq.c

@@ -297,6 +297,22 @@ static void ar71xx_misc_irq_unmask(unsigned int irq)
 	ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
 }
 
+static void ar724x_misc_irq_unmask(unsigned int irq)
+{
+	irq -= AR71XX_MISC_IRQ_BASE;
+	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE,
+		ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) | (1 << irq));
+
+	/* flush write */
+	ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS,
+		ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) & ~(1 << irq));
+
+	/* flush write */
+	ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS);
+}
+
 static void ar71xx_misc_irq_mask(unsigned int irq)
 {
 	irq -= AR71XX_MISC_IRQ_BASE;
@@ -326,6 +342,9 @@ static void __init ar71xx_misc_irq_init(void)
 	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, 0);
 	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS, 0);
 
+	if (ar71xx_soc == AR71XX_SOC_AR7240)
+		ar71xx_misc_irq_chip.unmask = ar724x_misc_irq_unmask;
+
 	for (i = AR71XX_MISC_IRQ_BASE;
 	     i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
 		irq_desc[i].status = IRQ_DISABLED;