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@@ -0,0 +1,120 @@
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+From 08d194d881e10e09cba7551da8079734d89ed16d Mon Sep 17 00:00:00 2001
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+From: Icenowy Zheng <[email protected]>
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+Date: Thu, 16 Jun 2022 00:28:41 +0800
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+Subject: [PATCH 1/2] add USB support and PopStick support
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+
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+Signed-off-by: Icenowy Zheng <[email protected]>
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+---
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+ arch/arm/dts/Makefile | 3 +-
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+ arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 16 ++++
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+ arch/arm/dts/suniv-f1c100s.dtsi | 26 ++++++
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+ arch/arm/dts/suniv-f1c200s-popstick.dts | 89 ++++++++++++++++++++
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+ drivers/phy/allwinner/phy-sun4i-usb.c | 14 +++
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+ drivers/usb/musb-new/sunxi.c | 6 ++
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+ 6 files changed, 153 insertions(+), 1 deletion(-)
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+ create mode 100644 arch/arm/dts/suniv-f1c200s-popstick.dts
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+
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+--- a/arch/arm/dts/Makefile
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++++ b/arch/arm/dts/Makefile
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+@@ -647,7 +647,8 @@ dtb-$(CONFIG_STM32H7) += stm32h743i-disc
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+ stm32h750i-art-pi.dtb
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+
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+ dtb-$(CONFIG_MACH_SUNIV) += \
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+- suniv-f1c100s-licheepi-nano.dtb
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++ suniv-f1c100s-licheepi-nano.dtb \
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++ suniv-f1c200s-popstick.dtb
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+ dtb-$(CONFIG_MACH_SUN4I) += \
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+ sun4i-a10-a1000.dtb \
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+ sun4i-a10-ba10-tvbox.dtb \
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+--- /dev/null
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++++ b/arch/arm/dts/suniv-f1c200s-popstick.dts
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+@@ -0,0 +1,89 @@
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++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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++/*
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++ * Copyright 2022 Icenowy Zheng <[email protected]>
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++ */
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++
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++/dts-v1/;
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++#include "suniv-f1c100s.dtsi"
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++
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++#include <dt-bindings/gpio/gpio.h>
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++
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++/ {
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++ model = "Popcorn Computer PopStick";
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++ compatible = "sourceparts,popstick", "allwinner,suniv-f1c200s",
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++ "allwinner,suniv-f1c100s";
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++
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++ aliases {
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++ mmc0 = &mmc0;
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++ serial0 = &uart0;
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++ spi0 = &spi0;
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++ };
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++
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++ chosen {
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++ stdout-path = "serial0:115200n8";
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++ };
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++
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++ reg_vcc3v3: vcc3v3 {
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++ compatible = "regulator-fixed";
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++ regulator-name = "vcc3v3";
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++ regulator-min-microvolt = <3300000>;
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++ regulator-max-microvolt = <3300000>;
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++ };
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++};
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++
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++&mmc0 {
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++ broken-cd;
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++ bus-width = <4>;
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++ disable-wp;
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++ status = "okay";
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++ vmmc-supply = <®_vcc3v3>;
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++};
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++
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++&spi0 {
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++ pinctrl-names = "default";
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++ pinctrl-0 = <&spi0_pc_pins>;
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++ status = "okay";
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++
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++ flash@0 {
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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++ compatible = "spi-nand";
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++ reg = <0>;
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++ spi-max-frequency = <1000000>;
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++
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++ partitions {
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++ compatible = "fixed-partitions";
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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++
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++ partition@0 {
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++ label = "u-boot-with-spl";
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++ reg = <0x0 0x100000>;
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++ };
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++
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++ ubi@100000 {
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++ label = "ubi";
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++ reg = <0x100000 0x7f00000>;
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++ };
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++ };
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++ };
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++};
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++
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++&otg_sram {
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++ status = "okay";
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++};
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++
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++&uart0 {
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++ pinctrl-names = "default";
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++ pinctrl-0 = <&uart0_pe_pins>;
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++ status = "okay";
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++};
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++
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++&usb_otg {
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++ dr_mode = "peripheral";
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++ status = "okay";
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++};
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++
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++&usbphy {
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++ status = "okay";
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++};
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