nuke trailing whitespaces

SVN-Revision: 10872

target/linux/atheros/files/arch/mips/atheros/ar5312/irq.c

@@ -56,7 +56,7 @@ asmlinkage void ar5312_irq_dispatch(void)
 		} else if (ar531x_misc_intrs & AR531X_ISR_AHBPROC)
 			do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
                 else if (ar531x_misc_intrs & AR531X_ISR_GPIO)
-			ar5312_gpio_irq_dispatch(); 
+			ar5312_gpio_irq_dispatch();
 		else if ((ar531x_misc_intrs & AR531X_ISR_UART0))
 			do_IRQ(AR531X_MISC_IRQ_UART0);
 		else if (ar531x_misc_intrs & AR531X_ISR_WD)
@@ -140,7 +140,7 @@ static irqreturn_t ar5312_ahb_proc_handler(int cpl, void *dev_id)
 
 	printk("AHB interrupt: PROCADDR=0x%8.8x  PROC1=0x%8.8x  DMAADDR=0x%8.8x  DMA1=0x%8.8x\n",
 			procAddr, proc1, dmaAddr, dma1);
-		
+
 	machine_restart("AHB error"); /* Catastrophic failure */
 	return IRQ_HANDLED;
 }

target/linux/atheros/files/arch/mips/atheros/ar5315/irq.c

@@ -89,7 +89,7 @@ static void ar5315_gpio_intr_enable(unsigned int irq)
 
 	/* reconfigure GPIO line as input */
 	sysRegMask(AR5315_GPIO_CR, AR5315_GPIO_CR_M(gpio), AR5315_GPIO_CR_I(gpio));
-	
+
 	/* Enable interrupt with edge detection */
 	sysRegMask(AR5315_GPIO_INT, AR5315_GPIO_INT_M | AR5315_GPIO_INT_LVL_M, gpio | AR5315_GPIO_INT_LVL(3));
 }
@@ -203,7 +203,7 @@ ar5315_misc_intr_disable(unsigned int irq)
 	   case AR531X_MISC_IRQ_SPI:
 		 imr &= ~AR5315_ISR_SPI;
 		 break;
-		 
+
 	   case AR531X_MISC_IRQ_TIMER:
 	     imr &= (~AR5315_ISR_TIMER);
 	     break;

target/linux/atheros/files/arch/mips/atheros/board.c

@@ -51,7 +51,7 @@ static u8 *find_board_config(char *flash_limit)
 		printk("WARNING: No board configuration data found!\n");
 		addr = NULL;
 	}
-	
+
 	return addr;
 }
 
@@ -59,8 +59,8 @@ static u8 *find_radio_config(char *flash_limit, char *board_config)
 {
 	int dataFound;
 	u32 radio_config;
-	
-	/* 
+
+	/*
 	 * Now find the start of Radio Configuration data, using heuristics:
 	 * Search forward from Board Configuration data by 0x1000 bytes
 	 * at a time until we find non-0xffffffff.
@@ -123,14 +123,14 @@ int __init ar531x_find_config(char *flash_limit)
 	printk("Radio config found at offset 0x%x(0x%x)\n", rcfg - bcfg, radio_config - board_config);
 	rcfg_size = BOARD_CONFIG_BUFSZ - ((rcfg - bcfg) & (BOARD_CONFIG_BUFSZ - 1));
 	memcpy(radio_config, rcfg, rcfg_size);
-	
+
 	return 0;
 }
 
 void __init serial_setup(unsigned long mapbase, unsigned int uartclk)
 {
 	struct uart_port s;
-	
+
 	memset(&s, 0, sizeof(s));
 
 	s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
@@ -162,7 +162,7 @@ const char *get_system_type(void)
 
 	case MACH_ATHEROS_AR2312:
 		return "Atheros AR2312";
-		
+
 	case MACH_ATHEROS_AR2313:
 		return "Atheros AR2313";
 #endif
@@ -225,7 +225,7 @@ static int __init ar531x_register_gpiodev(void)
 	struct platform_device *pdev;
 
 	printk(KERN_INFO "ar531x: Registering GPIODEV device\n");
-	
+
 	pdev = platform_device_register_simple("GPIODEV", 0, &res, 1);
 
 	if (!pdev) {

target/linux/atheros/files/arch/mips/atheros/gpio.c

@@ -27,7 +27,7 @@
 #include <asm/irq_cpu.h>
 #include <asm/gpio.h>
 #include "ar531x.h"
-/* 
+/*
    GPIO Interrupt Support
       Make use of request_irq() and the function gpio_to_irq() to trap gpio events
  */
@@ -147,7 +147,7 @@ static void ar5315_gpio_intr_enable(unsigned int irq) {
 	sysRegWrite(AR5315_GPIO_CR, reg);
 	(void)sysRegRead(AR5315_GPIO_CR); /* flush write to hardware */
 
-	/* Locate a free register slot to enable gpio intr 
+	/* Locate a free register slot to enable gpio intr
 	   will fail silently if no more slots are available
 	 */
 	reg = sysRegRead(AR5315_GPIO_INT);

target/linux/atheros/files/arch/mips/atheros/prom.c

@@ -35,7 +35,7 @@ void __init prom_init(void)
 	DO_AR5315(ar5315_prom_init();)
 #if 0
 	argv = (char **)fw_arg1;
-	/* RedBoot desired command line is argv[1] */ 
+	/* RedBoot desired command line is argv[1] */
 	strcat(arcs_cmdline, argv[1]);
 #endif
 }

target/linux/atheros/files/arch/mips/atheros/reset.c

@@ -37,7 +37,7 @@ static void hotplug_button(struct work_struct *wq)
 	size_t len;
 	char *scratch, *s;
 	char buf[128];
-	
+
 	event = container_of(wq, struct event_t, wq);
 	if (!uevent_sock)
 		goto done;
@@ -48,7 +48,7 @@ static void hotplug_button(struct work_struct *wq)
 	skb = alloc_skb(len + 2048, GFP_KERNEL);
 	if (!skb)
 		goto done;
-	
+
 	/* add header */
 	scratch = skb_put(skb, len);
 	sprintf(scratch, "%s@",s);
@@ -80,7 +80,7 @@ static irqreturn_t button_handler(int irq, void *dev_id)
 	event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
 	if (!event)
 		return IRQ_NONE;
-	
+
 	pressed = !pressed;
 
 	DO_AR5315(gpio = sysRegRead(AR5315_GPIO_DI);)
@@ -99,7 +99,7 @@ static irqreturn_t button_handler(int irq, void *dev_id)
 
 void ar531x_disable_reset_button(void)
 {
-	disable_irq(AR531X_RESET_GPIO_IRQ);	
+	disable_irq(AR531X_RESET_GPIO_IRQ);
 }
 
 EXPORT_SYMBOL(ar531x_disable_reset_button);
@@ -109,7 +109,7 @@ int __init ar531x_init_reset(void)
 	bcfg = (struct ar531x_boarddata *) board_config;
 
 	seen = jiffies;
-	
+
 	request_irq(AR531X_RESET_GPIO_IRQ, &button_handler, IRQF_SAMPLE_RANDOM, "ar531x_reset", NULL);
 
 	return 0;

target/linux/atheros/files/drivers/mtd/devices/spiflash.c

@@ -69,7 +69,7 @@
 			spin_lock_bh(&spidata->mutex); \
 		} \
 	} while (0)
-		
+
 
 static __u32 spiflash_regread32(int reg);
 static void spiflash_regwrite32(int reg, __u32 data);
@@ -132,7 +132,7 @@ struct opcodes {
 
 /* Driver private data structure */
 struct spiflash_data {
-	struct 	mtd_info       *mtd;	
+	struct 	mtd_info       *mtd;
 	struct 	mtd_partition  *parsed_parts;     /* parsed partitions */
 	void 	*readaddr; /* memory mapped data for read  */
 	void 	*mmraddr;  /* memory mapped register space */
@@ -161,7 +161,7 @@ spiflash_regread32(int reg)
 	return (*data);
 }
 
-static void 
+static void
 spiflash_regwrite32(int reg, __u32 data)
 {
 	volatile __u32 *addr = (__u32 *)(spidata->mmraddr + reg);
@@ -171,7 +171,7 @@ spiflash_regwrite32(int reg, __u32 data)
 }
 
 
-static __u32 
+static __u32
 spiflash_sendcmd (int op, u32 addr)
 {
 	 u32 reg;
@@ -187,7 +187,7 @@ spiflash_sendcmd (int op, u32 addr)
 
 	spiflash_regwrite32(SPI_FLASH_CTL, reg);
 	busy_wait(spiflash_regread32(SPI_FLASH_CTL) & SPI_CTL_BUSY, 0);
- 
+
 	if (!ptr_opcode->rx_cnt)
 		return 0;
 
@@ -218,12 +218,12 @@ spiflash_sendcmd (int op, u32 addr)
  * Function returns 0 for failure.
  * and flashconfig_tbl array index for success.
  */
-static int 
+static int
 spiflash_probe_chip (void)
 {
 	__u32 sig;
    	int flash_size;
-	
+
    	/* Read the signature on the flash device */
 	spin_lock_bh(&spidata->mutex);
    	sig = spiflash_sendcmd(SPI_RD_SIG, 0);
@@ -267,7 +267,7 @@ retry:
 		spin_unlock_bh(&spidata->mutex);
 		schedule();
 		remove_wait_queue(&spidata->wq, &wait);
-		
+
 		if(signal_pending(current))
 			return 0;
 
@@ -285,7 +285,7 @@ static inline void spiflash_done(void)
 	wake_up(&spidata->wq);
 }
 
-static int 
+static int
 spiflash_erase (struct mtd_info *mtd,struct erase_info *instr)
 {
 	struct opcodes *ptr_opcode;
@@ -312,7 +312,7 @@ spiflash_erase (struct mtd_info *mtd,struct erase_info *instr)
 	spin_unlock_bh(&spidata->mutex);
 	msleep(800);
 	spin_lock_bh(&spidata->mutex);
-	
+
 	busy_wait(spiflash_sendcmd(SPI_RD_STATUS, 0) & SPI_STATUS_WIP, 20);
 	spiflash_done();
 
@@ -322,15 +322,15 @@ spiflash_erase (struct mtd_info *mtd,struct erase_info *instr)
    	return 0;
 }
 
-static int 
+static int
 spiflash_read (struct mtd_info *mtd, loff_t from,size_t len,size_t *retlen,u_char *buf)
 {
 	u8 *read_addr;
-	
+
    	/* sanity checks */
    	if (!len) return (0);
    	if (from + len > mtd->size) return (-EINVAL);
-	
+
    	/* we always read len bytes */
    	*retlen = len;
 
@@ -343,7 +343,7 @@ spiflash_read (struct mtd_info *mtd, loff_t from,size_t len,size_t *retlen,u_cha
    	return 0;
 }
 
-static int 
+static int
 spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf)
 {
 	u32 opcode, bytes_left;
@@ -353,10 +353,10 @@ spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u
    	/* sanity checks */
    	if (!len) return (0);
    	if (to + len > mtd->size) return (-EINVAL);
-	
+
 	opcode = stm_opcodes[SPI_PAGE_PROGRAM].code;
 	bytes_left = len;
-	
+
 	do {
 		u32 xact_len, reg, page_offset, spi_data = 0;
 
@@ -389,7 +389,7 @@ spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u
 				spi_data = (buf[2] << 16) | (buf[1] << 8) | buf[0];
 				break;
 			case 4:
-				spi_data = (buf[3] << 24) | (buf[2] << 16) | 
+				spi_data = (buf[3] << 24) | (buf[2] << 16) |
 							(buf[1] << 8) | buf[0];
 				break;
 			default:
@@ -439,7 +439,7 @@ static int spiflash_probe(struct platform_device *pdev)
 	spin_lock_init(&spidata->mutex);
 	init_waitqueue_head(&spidata->wq);
 	spidata->state = FL_READY;
-	
+
 	if (!spidata->mmraddr) {
   		printk (KERN_WARNING SPIFLASH "Failed to map flash device\n");
 		kfree(spidata);
@@ -451,7 +451,7 @@ static int spiflash_probe(struct platform_device *pdev)
 		kfree(spidata);
 		return -ENXIO;
 	}
-	
+
    	if (!(index = spiflash_probe_chip())) {
     	printk (KERN_WARNING SPIFLASH "Found no serial flash device\n");
 		goto error;
@@ -483,9 +483,9 @@ static int spiflash_probe(struct platform_device *pdev)
 
 	result = add_mtd_partitions(mtd, spidata->parsed_parts, num_parts);
 	spidata->mtd = mtd;
-	
+
    	return (result);
-	
+
 error:
 	kfree(mtd);
 	kfree(spidata);
@@ -505,7 +505,7 @@ struct platform_driver spiflash_driver = {
 	.remove = spiflash_remove,
 };
 
-int __init 
+int __init
 spiflash_init (void)
 {
    	spidata = kmalloc(sizeof(struct spiflash_data), GFP_KERNEL);
@@ -518,7 +518,7 @@ spiflash_init (void)
 	return 0;
 }
 
-void __exit 
+void __exit
 spiflash_exit (void)
 {
 	kfree(spidata);

target/linux/atheros/files/drivers/net/ar2313/ar2313.c

@@ -14,7 +14,7 @@
  * (at your option) any later version.
  *
  * Additional credits:
- * 	This code is taken from John Taylor's Sibyte driver and then 
+ * 	This code is taken from John Taylor's Sibyte driver and then
  * 	modified for the AR2313.
  */
 
@@ -134,7 +134,7 @@
 #define CRC_LEN                 4
 #define RX_OFFSET               2
 
-#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 
+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
 #define VLAN_HDR                4
 #else
 #define VLAN_HDR                0
@@ -232,8 +232,8 @@ int __init ar2313_probe(struct platform_device *pdev)
 		return (-ENXIO);
 	}
 
-	/* 
-	 * When there's only one MAC, PHY regs are typically on ENET0, 
+	/*
+	 * When there's only one MAC, PHY regs are typically on ENET0,
 	 * even though the MAC might be on ENET1.
 	 * Needto remap PHY regs separately in this case
 	 */
@@ -270,7 +270,7 @@ int __init ar2313_probe(struct platform_device *pdev)
 	sp->board_idx = BOARD_IDX_STATIC;
 
 	if (ar2313_init(dev)) {
-		/* 
+		/*
 		 * ar2313_init() calls ar2313_init_cleanup() on error.
 		 */
 		kfree(dev);
@@ -295,7 +295,7 @@ int __init ar2313_probe(struct platform_device *pdev)
 	sp->mii_bus.id = 0;
 	sp->mii_bus.irq = kmalloc(sizeof(int), GFP_KERNEL);
 	*sp->mii_bus.irq = PHY_POLL;
-	
+
 	mdiobus_register(&sp->mii_bus);
 
 	if (mdiobus_probe(dev) != 0) {
@@ -308,7 +308,7 @@ int __init ar2313_probe(struct platform_device *pdev)
 		/* start link poll timer */
 		ar2313_setup_timer(dev);
 	}
-	
+
 	return 0;
 }
 
@@ -379,9 +379,9 @@ static void printMcList(struct net_device *dev)
  */
 static void ar2313_multicast_list(struct net_device *dev)
 {
-	/* 
-	 * Always listen to broadcasts and 
-	 * treat IFF bits independently 
+	/*
+	 * Always listen to broadcasts and
+	 * treat IFF bits independently
 	 */
 	struct ar2313_private *sp = (struct ar2313_private *) dev->priv;
 	unsigned int recognise;
@@ -420,7 +420,7 @@ static void rx_tasklet_cleanup(struct net_device *dev)
 {
 	struct ar2313_private *sp = dev->priv;
 
-	/* 
+	/*
 	 * Tasklet may be scheduled. Need to get it removed from the list
 	 * since we're about to free the struct.
 	 */
@@ -442,7 +442,7 @@ static int __exit ar2313_remove(struct platform_device *pdev)
 
 
 /*
- * Restart the AR2313 ethernet controller. 
+ * Restart the AR2313 ethernet controller.
  */
 static int ar2313_restart(struct net_device *dev)
 {
@@ -606,7 +606,7 @@ static void ar2313_link_timer_fn(unsigned long data)
 	// autonegotiated value of half or full duplex.
 	ar2313_check_link(dev);
 
-	// Loop faster when we don't have link. 
+	// Loop faster when we don't have link.
 	// This was needed to speed up the AP bootstrap time.
 	if (sp->link == 0) {
 		mod_timer(&sp->link_timer, jiffies + HZ / 2);
@@ -728,7 +728,7 @@ static int ar2313_init(struct net_device *dev)
 	struct ar2313_private *sp = dev->priv;
 	int ecode = 0;
 
-	/* 
+	/*
 	 * Allocate descriptors
 	 */
 	if (ar2313_allocate_descriptors(dev)) {
@@ -738,7 +738,7 @@ static int ar2313_init(struct net_device *dev)
 		goto init_error;
 	}
 
-	/* 
+	/*
 	 * Get the memory for the skb rings.
 	 */
 	if (sp->rx_skb == NULL) {
@@ -767,7 +767,7 @@ static int ar2313_init(struct net_device *dev)
 	}
 	memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
 
-	/* 
+	/*
 	 * Set tx_csm before we start receiving interrupts, otherwise
 	 * the interrupt handler might think it is supposed to process
 	 * tx ints before we are up and running, which may cause a null
@@ -778,23 +778,23 @@ static int ar2313_init(struct net_device *dev)
 	sp->tx_prd = 0;
 	sp->tx_csm = 0;
 
-	/* 
+	/*
 	 * Zero the stats before starting the interface
 	 */
 	memset(&sp->stats, 0, sizeof(sp->stats));
 
-	/* 
+	/*
 	 * We load the ring here as there seem to be no way to tell the
 	 * firmware to wipe the ring without re-initializing it.
 	 */
 	ar2313_load_rx_ring(dev, RX_RING_SIZE);
 
-	/* 
+	/*
 	 * Init hardware
 	 */
 	ar2313_reset_reg(dev);
 
-	/* 
+	/*
 	 * Get the IRQ
 	 */
 	ecode =
@@ -852,7 +852,7 @@ static void ar2313_load_rx_ring(struct net_device *dev, int nr_bufs)
 		// partha: create additional room in the front for tx pkt capture
 		skb_reserve(skb, 32);
 
-		/* 
+		/*
 		 * Make sure IP header starts on a fresh cache line.
 		 */
 		skb->dev = dev;
@@ -899,7 +899,7 @@ static int ar2313_rx_int(struct net_device *dev)
 
 	idx = sp->cur_rx;
 
-	/* process at most the entire ring and then wait for another interrupt 
+	/* process at most the entire ring and then wait for another interrupt
 	 */
 	while (1) {
 
@@ -1081,7 +1081,7 @@ static irqreturn_t ar2313_interrupt(int irq, void *dev_id)
 	unsigned int status, enabled;
 
 	/* clear interrupt */
-	/* 
+	/*
 	 * Don't clear RI bit if currently disabled.
 	 */
 	status = sp->dma_regs->status;
@@ -1090,7 +1090,7 @@ static irqreturn_t ar2313_interrupt(int irq, void *dev_id)
 
 	if (status & DMA_STATUS_NIS) {
 		/* normal status */
-		/* 
+		/*
 		 * Don't schedule rx processing if interrupt
 		 * is already disabled.
 		 */
@@ -1178,12 +1178,12 @@ static void ar2313_halt(struct net_device *dev)
 static int ar2313_close(struct net_device *dev)
 {
 #if 0
-	/* 
+	/*
 	 * Disable interrupts
 	 */
 	disable_irq(dev->irq);
 
-	/* 
+	/*
 	 * Without (or before) releasing irq and stopping hardware, this
 	 * is an absolute non-sense, by the way. It will be reset instantly
 	 * by the first irq.
@@ -1251,7 +1251,7 @@ static int ar2313_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 	struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
 	struct ar2313_private *sp = dev->priv;
 	int ret;
-	
+
 	switch (cmd) {
 
 	case SIOCETHTOOL:
@@ -1271,12 +1271,12 @@ static int ar2313_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 			(ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr)))
 			return -EFAULT;
 		return 0;
-	
+
 	case SIOCGMIIPHY:
 	case SIOCGMIIREG:
 	case SIOCSMIIREG:
 		return phy_mii_ioctl(sp->phy_dev, data, cmd);
-	
+
 	default:
 		break;
 	}
@@ -1314,7 +1314,7 @@ static void ar2313_adjust_link(struct net_device *dev)
 #define MII_ADDR(phy, reg) \
 	((reg << MII_ADDR_REG_SHIFT) | (phy << MII_ADDR_PHY_SHIFT))
 
-static int 
+static int
 mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
 {
 	struct net_device *const dev = bus->priv;
@@ -1326,7 +1326,7 @@ mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
 	return (ethernet->mii_data >> MII_DATA_SHIFT);
 }
 
-static int 
+static int
 mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
              u16 value)
 {

target/linux/atheros/files/drivers/net/ar2313/ar2313.h

@@ -64,7 +64,7 @@ typedef struct {
 } ETHERNET_STRUCT;
 
 /********************************************************************
- * Interrupt controller 
+ * Interrupt controller
  ********************************************************************/
 
 typedef struct {
@@ -118,7 +118,7 @@ struct ar2313_private {
 
 	spinlock_t lock;			/* Serialise access to device */
 
-	/* 
+	/*
 	 * RX and TX descriptors, must be adjacent
 	 */
 	ar2313_descr_t *rx_ring;
@@ -128,19 +128,19 @@ struct ar2313_private {
 	struct sk_buff **rx_skb;
 	struct sk_buff **tx_skb;
 
-	/* 
+	/*
 	 * RX elements
 	 */
 	u32 rx_skbprd;
 	u32 cur_rx;
 
-	/* 
+	/*
 	 * TX elements
 	 */
 	u32 tx_prd;
 	u32 tx_csm;
 
-	/* 
+	/*
 	 * Misc elements
 	 */
 	int board_idx;

target/linux/atheros/files/drivers/net/ar2313/dma.h

@@ -16,13 +16,13 @@
  *	    $Log: dma.h,v $
  *	    Revision 1.3  2002/06/06 18:34:03  astichte
  *	    Added XXX_PhysicalAddress and XXX_VirtualAddress
- *	
+ *
  *	    Revision 1.2  2002/06/05 18:30:46  astichte
  *	    Removed IDTField
- *	
+ *
  *	    Revision 1.1  2002/05/29 17:33:21  sysarch
  *	    jba File moved from vcode/include/idt/acacia
- *	
+ *
  *
  ******************************************************************************/
 

target/linux/atheros/files/include/asm-mips/mach-atheros/ar5312/ar5312.h

@@ -53,7 +53,7 @@
 #define AR531X_RADIO_MASK_OFF  0xc8
 #define AR531X_RADIO0_MASK     0x0003
 #define AR531X_RADIO1_MASK     0x000c
-#define AR531X_RADIO1_S        2 
+#define AR531X_RADIO1_S        2
 
 /*
  * AR531X_NUM_WMAC defines the number of Wireless MACs that\

target/linux/atheros/files/include/asm-mips/mach-atheros/ar5315/ar5315.h

@@ -12,7 +12,7 @@
 #ifndef AR5315_H
 #define AR5315_H
 
-/* 
+/*
  * IRQs
  */
 #define AR5315_IRQ_MISC_INTRS   MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */
@@ -106,7 +106,7 @@
 #define AR5315_CONFIG_CPU_DRAM             0x00010000
 #define AR5315_CONFIG_CPU_PCI              0x00020000
 #define AR5315_CONFIG_CPU_MMR              0x00040000
-#define AR5315_CONFIG_BIG                  0x00000400      
+#define AR5315_CONFIG_BIG                  0x00000400
 
 
 /*
@@ -141,13 +141,13 @@
 #define IF_PCI_HOST                 0x00000010
 #define IF_PCI_INTR                 0x00000020
 #define IF_PCI_CLK_MASK             0x00030000
-#define IF_PCI_CLK_INPUT            0 
+#define IF_PCI_CLK_INPUT            0
 #define IF_PCI_CLK_OUTPUT_LOW       1
 #define IF_PCI_CLK_OUTPUT_CLK       2
 #define IF_PCI_CLK_OUTPUT_HIGH      3
-#define IF_PCI_CLK_SHIFT            16 
- 
-                
+#define IF_PCI_CLK_SHIFT            16
+
+
 /* Major revision numbers, bits 7..4 of Revision ID register */
 #define REV_MAJ_AR5311              0x01
 #define REV_MAJ_AR5312              0x04
@@ -170,7 +170,7 @@
 #define AR5315_ISR_GPIO                    0x0040           /* GPIO */
 #define AR5315_ISR_WD                      0x0080           /* watchdog */
 #define AR5315_ISR_IR_RSVD                 0x0100           /* IR */
-                                
+
 #define AR5315_GISR_MISC                   0x0001
 #define AR5315_GISR_WLAN0                  0x0002
 #define AR5315_GISR_MPEGTS_RSVD            0x0004
@@ -215,7 +215,7 @@
 #define PERF_ACTIVE                 0x0010  /* Count Active Processor Cycles */
 #define PERF_WBHIT                  0x0020  /* Count CPU Write Buffer Hits */
 #define PERF_WBMISS                 0x0040  /* Count CPU Write Buffer Misses */
-                                
+
 #define PERF_EB_ARDY                0x0001  /* Count EB_ARdy signal */
 #define PERF_EB_AVALID              0x0002  /* Count EB_AValid signal */
 #define PERF_EB_WDRDY               0x0004  /* Count EB_WDRdy signal */
@@ -246,7 +246,7 @@
 #define PROCERR_HMAST_LOCAL         4
 #define PROCERR_HMAST_CPU           5
 #define PROCERR_HMAST_PCITGT        6
-                                    
+
 #define PROCERR_HMAST_S             0
 #define PROCERR_HWRITE              0x00000010
 #define PROCERR_HSIZE               0x00000060
@@ -325,7 +325,7 @@
  */
 #define ASSOC_STATUS_M              0x00000003
 #define ASSOC_STATUS_NONE           0
-#define ASSOC_STATUS_PENDING        1   
+#define ASSOC_STATUS_PENDING        1
 #define ASSOC_STATUS_ASSOCIATED     2
 #define LED_MODE_M                  0x0000001c
 #define LED_BLINK_THRESHOLD_M       0x000000e0
@@ -358,28 +358,28 @@
 #define AR5315_RESET_GPIO       5
 #define AR5315_NUM_GPIO         22
 
-    
-/* 
+
+/*
  *  PCI Clock Control
- */     
- 
+ */
+
 #define AR5315_PCICLK           (AR5315_DSLBASE + 0x00a4)
 
 #define AR5315_PCICLK_INPUT_M              0x3
 #define AR5315_PCICLK_INPUT_S              0
-                         
+
 #define AR5315_PCICLK_PLLC_CLKM            0
 #define AR5315_PCICLK_PLLC_CLKM1           1
 #define AR5315_PCICLK_PLLC_CLKC            2
-#define AR5315_PCICLK_REF_CLK              3 
+#define AR5315_PCICLK_REF_CLK              3
 
 #define AR5315_PCICLK_DIV_M                0xc
 #define AR5315_PCICLK_DIV_S                2
-                         
+
 #define AR5315_PCICLK_IN_FREQ              0
 #define AR5315_PCICLK_IN_FREQ_DIV_6        1
 #define AR5315_PCICLK_IN_FREQ_DIV_8        2
-#define AR5315_PCICLK_IN_FREQ_DIV_10       3 
+#define AR5315_PCICLK_IN_FREQ_DIV_10       3
 
 /*
  * Observation Control Register
@@ -389,10 +389,10 @@
 #define OCR_GPIO1_IROUT             0x0080
 #define OCR_GPIO3_RXCLR             0x0200
 
-/* 
+/*
  *  General Clock Control
- */     
- 
+ */
+
 #define AR5315_MISCCLK          (AR5315_DSLBASE + 0x00b4)
 #define MISCCLK_PLLBYPASS_EN        0x00000001
 #define MISCCLK_PROCREFCLK          0x00000002
@@ -435,10 +435,10 @@
 #define SPI_CTL_CLK_SEL_MASK    0x03000000
 #define SPI_OPCODE_MASK         0x000000ff
 
-/* 
- * PCI-MAC Configuration registers 
+/*
+ * PCI-MAC Configuration registers
  */
-#define PCI_MAC_RC              (AR5315_PCI + 0x4000) 
+#define PCI_MAC_RC              (AR5315_PCI + 0x4000)
 #define PCI_MAC_SCR             (AR5315_PCI + 0x4004)
 #define PCI_MAC_INTPEND         (AR5315_PCI + 0x4008)
 #define PCI_MAC_SFR             (AR5315_PCI + 0x400C)
@@ -449,16 +449,16 @@
 #define PCI_MAC_RC_BB           0x00000002
 
 #define PCI_MAC_SCR_SLMODE_M    0x00030000
-#define PCI_MAC_SCR_SLMODE_S    16        
-#define PCI_MAC_SCR_SLM_FWAKE   0         
-#define PCI_MAC_SCR_SLM_FSLEEP  1         
-#define PCI_MAC_SCR_SLM_NORMAL  2         
+#define PCI_MAC_SCR_SLMODE_S    16
+#define PCI_MAC_SCR_SLM_FWAKE   0
+#define PCI_MAC_SCR_SLM_FSLEEP  1
+#define PCI_MAC_SCR_SLM_NORMAL  2
 
 #define PCI_MAC_SFR_SLEEP       0x00000001
 
 #define PCI_MAC_PCICFG_SPWR_DN  0x00010000
 
- 
+
 /*
  * PCI Bus Interface Registers
  */
@@ -516,8 +516,8 @@
 #define AR5315_PCI_RXEOL        0x00000080      /* Desc Out EOL */
 #define AR5315_PCI_TXOOD        0x00000200      /* Desc In Out-of-Desc */
 #define AR5315_PCI_MASK         0x0000FFFF      /* Desc Mask */
-#define AR5315_PCI_EXT_INT      0x02000000      
-#define AR5315_PCI_ABORT_INT    0x04000000      
+#define AR5315_PCI_EXT_INT      0x02000000
+#define AR5315_PCI_ABORT_INT    0x04000000
 
 #define AR5315_PCI_INT_MASK     (AR5315_PCI + 0x0504)   /* same as INT_STATUS */
 
@@ -658,10 +658,10 @@
  * sysLib.c/sysTlbInit(), in that it assumes that 2 pages of size
  * PCI_TLB_PAGE_SIZE are set up in the TLB for each PCI memory space.
  */
- 
+
 #define CPU_TO_PCI_MEM_BASE1    0xE0000000
 #define CPU_TO_PCI_MEM_SIZE1    (2*PCI_TLB_PAGE_SIZE)
- 
+
 
 /* TLB attributes for PCI transactions */
 

target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h

@@ -30,11 +30,11 @@ static inline int clz(unsigned long val)
 		: "=r" (ret)
 		: "r" (val)
 	);
-	
+
 	return ret;
 }
 
-/*                                                                             
+/*
  * Atheros CPUs before the AR2315 are using MIPS 4Kc core, later designs are
  * using MIPS 4KEc R2 core. This makes it easy to determine the board at runtime.
  */
@@ -157,7 +157,7 @@ extern void ar5315_pci_irq(int irq);
 static inline u32 sysRegMask(u32 phys, u32 mask, u32 value)
 {
 	u32 reg;
-	
+
 	reg = sysRegRead(phys);
 	reg &= ~mask;
 	reg |= value & mask;