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+From 6ee1d93455384cef8a0426effe85da241b525b63 Mon Sep 17 00:00:00 2001
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+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
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+Date: Thu, 17 Jul 2014 23:26:33 +0200
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+Subject: [PATCH 153/153] MIPS: BCM47XX: Detect more then 128 MiB of RAM
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+ (HIGHMEM)
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+MIME-Version: 1.0
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+Content-Type: text/plain; charset=UTF-8
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+Content-Transfer-Encoding: 8bit
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+
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+So far BCM47XX can only detect amount of HIGHMEM. It still requires
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+adding (registering) and well-testing before enabling by default.
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+
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+Signed-off-by: Rafał Miłecki <[email protected]>
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+Acked-by: Hauke Mehrtens <[email protected]>
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+Cc: [email protected]
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+Patchwork: https://patchwork.linux-mips.org/patch/7396/
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+Signed-off-by: Ralf Baechle <[email protected]>
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+---
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+ arch/mips/bcm47xx/bcm47xx_private.h | 3 ++
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+ arch/mips/bcm47xx/prom.c | 68 ++++++++++++++++++++++++++++++++++++-
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+ arch/mips/bcm47xx/setup.c | 3 ++
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+ arch/mips/include/asm/pgtable-32.h | 2 ++
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+ arch/mips/mm/tlb-r4k.c | 2 +-
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+ 5 files changed, 76 insertions(+), 2 deletions(-)
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+
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+--- a/arch/mips/bcm47xx/bcm47xx_private.h
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++++ b/arch/mips/bcm47xx/bcm47xx_private.h
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+@@ -3,6 +3,9 @@
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+
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+ #include <linux/kernel.h>
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+
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++/* prom.c */
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++void __init bcm47xx_prom_highmem_init(void);
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++
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+ /* buttons.c */
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+ int __init bcm47xx_buttons_register(void);
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+
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+--- a/arch/mips/bcm47xx/prom.c
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++++ b/arch/mips/bcm47xx/prom.c
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+@@ -51,6 +51,8 @@ __init void bcm47xx_set_system_type(u16
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+ chip_id);
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+ }
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+
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++static unsigned long lowmem __initdata;
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++
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+ static __init void prom_init_mem(void)
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+ {
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+ unsigned long mem;
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+@@ -84,6 +86,7 @@ static __init void prom_init_mem(void)
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+ if (!memcmp(prom_init, prom_init + mem, 32))
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+ break;
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+ }
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++ lowmem = mem;
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+
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+ /* Ignoring the last page when ddr size is 128M. Cached
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+ * accesses to last page is causing the processor to prefetch
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+@@ -92,7 +95,6 @@ static __init void prom_init_mem(void)
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+ */
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+ if (c->cputype == CPU_74K && (mem == (128 << 20)))
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+ mem -= 0x1000;
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+-
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+ add_memory_region(0, mem, BOOT_MEM_RAM);
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+ }
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+
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+@@ -111,3 +113,67 @@ void __init prom_init(void)
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+ void __init prom_free_prom_memory(void)
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+ {
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+ }
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++
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++#if defined(CONFIG_BCM47XX_BCMA) && defined(CONFIG_HIGHMEM)
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++
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++#define EXTVBASE 0xc0000000
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++#define ENTRYLO(x) ((pte_val(pfn_pte((x) >> _PFN_SHIFT, PAGE_KERNEL_UNCACHED)) >> 6) | 1)
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++
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++#include <asm/tlbflush.h>
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++
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++/* Stripped version of tlb_init, with the call to build_tlb_refill_handler
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++ * dropped. Calling it at this stage causes a hang.
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++ */
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++void __cpuinit early_tlb_init(void)
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++{
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++ write_c0_pagemask(PM_DEFAULT_MASK);
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++ write_c0_wired(0);
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++ temp_tlb_entry = current_cpu_data.tlbsize - 1;
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++ local_flush_tlb_all();
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++}
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++
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++void __init bcm47xx_prom_highmem_init(void)
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++{
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++ unsigned long off = (unsigned long)prom_init;
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++ unsigned long extmem = 0;
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++ bool highmem_region = false;
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++
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++ if (WARN_ON(bcm47xx_bus_type != BCM47XX_BUS_TYPE_BCMA))
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++ return;
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++
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++ if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
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++ highmem_region = true;
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++
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++ if (lowmem != 128 << 20 || !highmem_region)
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++ return;
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++
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++ early_tlb_init();
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++
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++ /* Add one temporary TLB entry to map SDRAM Region 2.
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++ * Physical Virtual
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++ * 0x80000000 0xc0000000 (1st: 256MB)
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++ * 0x90000000 0xd0000000 (2nd: 256MB)
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++ */
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++ add_temporary_entry(ENTRYLO(0x80000000),
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++ ENTRYLO(0x80000000 + (256 << 20)),
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++ EXTVBASE, PM_256M);
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++
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++ off = EXTVBASE + __pa(off);
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++ for (extmem = 128 << 20; extmem < 512 << 20; extmem <<= 1) {
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++ if (!memcmp(prom_init, (void *)(off + extmem), 16))
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++ break;
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++ }
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++ extmem -= lowmem;
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++
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++ early_tlb_init();
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++
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++ if (!extmem)
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++ return;
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++
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++ pr_warn("Found %lu MiB of extra memory, but highmem is unsupported yet!\n",
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++ extmem >> 20);
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++
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++ /* TODO: Register extra memory */
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++}
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++
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++#endif /* defined(CONFIG_BCM47XX_BCMA) && defined(CONFIG_HIGHMEM) */
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+--- a/arch/mips/bcm47xx/setup.c
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++++ b/arch/mips/bcm47xx/setup.c
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+@@ -218,6 +218,9 @@ void __init plat_mem_setup(void)
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+ bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
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+ bcm47xx_register_bcma();
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+ bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id);
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++#ifdef CONFIG_HIGHMEM
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++ bcm47xx_prom_highmem_init();
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++#endif
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+ #endif
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+ } else {
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+ printk(KERN_INFO "bcm47xx: using ssb bus\n");
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+--- a/arch/mips/include/asm/pgtable-32.h
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++++ b/arch/mips/include/asm/pgtable-32.h
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+@@ -18,6 +18,8 @@
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+
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+ #include <asm-generic/pgtable-nopmd.h>
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+
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++extern int temp_tlb_entry __cpuinitdata;
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++
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+ /*
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+ * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
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+ * starting at the top and working down. This is for populating the
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+--- a/arch/mips/mm/tlb-r4k.c
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++++ b/arch/mips/mm/tlb-r4k.c
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+@@ -417,7 +417,7 @@ int __init has_transparent_hugepage(void
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+ * lifetime of the system
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+ */
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+
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+-static int temp_tlb_entry __cpuinitdata;
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++int temp_tlb_entry __cpuinitdata;
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+
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+ __init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
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+ unsigned long entryhi, unsigned long pagemask)
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