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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+/dts-v1/;
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+#include "mt7981.dtsi"
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+/ {
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+ model = "ASUS RT-AX52";
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+ compatible = "asus,rt-ax52", "mediatek,mt7981";
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+
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+ aliases {
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+ serial0 = &uart0;
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+ label-mac-device = &gmac0;
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+ led-boot = &led_system;
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+ led-failsafe = &led_system;
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+ led-running = &led_system;
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+ led-upgrade = &led_system;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ bootargs-override = "";
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+ };
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+
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+ memory {
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+ reg = <0 0x40000000 0 0x10000000>;
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+ };
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+
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+ keys {
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+ compatible = "gpio-keys";
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+
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+ reset {
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+ label = "reset";
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+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_RESTART>;
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+ };
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+
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+ wps {
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+ label = "wps";
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+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_WPS_BUTTON>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ wlan24 {
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+ function = LED_FUNCTION_WLAN_2GHZ;
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+ color = <LED_COLOR_ID_WHITE>;
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+ gpios = <&pio 34 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "phy0tpt";
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+ };
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+
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+ wlan5 {
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+ function = LED_FUNCTION_WLAN_5GHZ;
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+ color = <LED_COLOR_ID_WHITE>;
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+ gpios = <&pio 35 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "phy1tpt";
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+ };
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+
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+ wan {
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+ function = LED_FUNCTION_WAN;
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+ color = <LED_COLOR_ID_BLUE>;
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+ gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ led_system: system {
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+ label = "blue:system";
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+ gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ timer {
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+ clock-frequency = <12996791>;
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+ };
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+};
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+
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+&uart0 {
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+ status = "okay";
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+};
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+
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+ð {
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+ status = "okay";
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+
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+ gmac0: mac@0 {
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+ /* LAN */
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+ compatible = "mediatek,eth-mac";
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+ reg = <0>;
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+ nvmem-cells = <&macaddr_factory_4>;
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+ nvmem-cell-names = "mac-address";
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+ phy-mode = "2500base-x";
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+
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+ fixed-link {
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+ speed = <2500>;
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+ full-duplex;
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+ pause;
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+ };
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+ };
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+
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+ gmac1: mac@1 {
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+ /* WAN */
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+ compatible = "mediatek,eth-mac";
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+ reg = <1>;
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+ nvmem-cells = <&macaddr_factory_4>;
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+ nvmem-cell-names = "mac-address";
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+ phy-mode = "gmii";
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+ phy-handle = <&phy0>;
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+ label = "wan";
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+ };
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+
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+ mdio: mdio-bus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ phy0: ethernet-phy@0 {
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+ compatible = "ethernet-phy-id03a2.9461";
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+ reg = <0>;
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+ phy-mode = "gmii";
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+ #nvmem-cells = <&phy_calibration>;
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+ #nvmem-cell-names = "phy-cal-data";
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+ };
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+
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+ switch@1f {
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+ compatible = "mediatek,mt7531";
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+ reg = <31>;
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+ reset-gpios = <&pio 39 0>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ port@0 {
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+ reg = <0>;
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+ label = "lan3";
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+ };
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+
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+ port@1 {
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+ reg = <1>;
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+ label = "lan2";
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+ };
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+
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+ port@2 {
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+ reg = <2>;
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+ label = "lan1";
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+ };
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+
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+ port@6 {
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+ reg = <6>;
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+ label = "cpu";
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+ ethernet = <&gmac0>;
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+ phy-mode = "2500base-x";
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+
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+ fixed-link {
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+ speed = <2500>;
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+ full-duplex;
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+ pause;
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+ };
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+ };
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+ };
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+ };
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+ };
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+};
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+
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+&spi0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi0_flash_pins>;
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+ status = "okay";
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+
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+ spi_nand_flash: flash@0 {
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+ compatible = "u-boot-dont-touch-spi-nand";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0>;
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+
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+ spi-max-frequency = <52000000>;
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+ spi-tx-bus-width = <4>;
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+ spi-rx-bus-width = <4>;
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+
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+ /*
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+ * ASUS bootloader tries to replace the partitions defined in
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+ * Device Tree and by that also deletes all additional properties
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+ * needed for UBI and NVMEM-on-UBI.
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+ * Prevent this from happening by tricking the loader to delete and
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+ * replace a bait node instead (works with older bootloaders).
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+ */
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+ partitions: dummy {
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+ compatible = "u-boot-dummy-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ reg = <0x0 0x0>;
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+ label = "remove_me";
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+ };
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+ };
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ reg = <0x0 0x400000>;
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+ label = "bootloader";
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+ read-only;
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+ };
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+
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+ partition@400000 {
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+ compatible = "linux,ubi";
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+ reg = <0x400000 0xfc00000>;
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+ label = "UBI_DEV";
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+
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+ volumes {
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+ ubi_factory: ubi-volume-factory {
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+ volname = "Factory";
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+ };
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+ };
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+ };
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+ };
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+ };
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+};
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+
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+&ubi_factory {
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+ nvmem-layout {
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+ compatible = "fixed-layout";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ eeprom_factory_0: eeprom@0 {
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+ reg = <0x0 0x1000>;
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+ };
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+
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+ macaddr_factory_4: macaddr@4 {
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+ reg = <0x4 0x6>;
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+ };
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+ };
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+};
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+
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+&spi1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spic_pins>;
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+ status = "disabled";
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+};
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+
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+&pio {
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+ i2c_pins: i2c-pins-g0 {
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+ mux {
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+ function = "i2c";
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+ groups = "i2c0_0";
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+ };
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+ };
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+
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+ spi0_flash_pins: spi0-pins {
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+ mux {
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+ function = "spi";
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+ groups = "spi0", "spi0_wp_hold";
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+ };
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+
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+ conf-pu {
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+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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+ drive-strength = <MTK_DRIVE_8mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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+ };
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+
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+ conf-pd {
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+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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+ drive-strength = <MTK_DRIVE_8mA>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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+ };
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+ };
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+
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+ spic_pins: spi1-pins {
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+ mux {
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+ function = "spi";
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+ groups = "spi1_1";
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+ };
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+ };
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+
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+ uart1_pins: uart1-pins-g1 {
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+ mux {
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+ function = "uart";
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+ groups = "uart1_1";
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+ };
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+ };
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+
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+ uart2_pins: uart2-pins-g1 {
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+ mux {
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+ function = "uart";
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+ groups = "uart2_1";
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+ };
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+ };
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+};
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+
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+&watchdog {
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+ status = "okay";
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+};
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+
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+&wifi {
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+ nvmem-cells = <&eeprom_factory_0>;
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+ nvmem-cell-names = "eeprom";
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+
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+ status = "okay";
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+};
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Christoph Krapp