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@@ -0,0 +1,180 @@
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+--- a/drivers/net/phy/at803x.c
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++++ b/drivers/net/phy/at803x.c
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+@@ -12,12 +12,14 @@
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+ */
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+
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+ #include <linux/phy.h>
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++#include <linux/mdio.h>
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+ #include <linux/module.h>
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+ #include <linux/string.h>
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+ #include <linux/netdevice.h>
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+ #include <linux/etherdevice.h>
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+ #include <linux/of_gpio.h>
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+ #include <linux/gpio/consumer.h>
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++#include <linux/platform_data/phy-at803x.h>
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+
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+ #define AT803X_INTR_ENABLE 0x12
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+ #define AT803X_INTR_STATUS 0x13
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+@@ -34,8 +36,16 @@
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+ #define AT803X_INER 0x0012
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+ #define AT803X_INER_INIT 0xec00
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+ #define AT803X_INSR 0x0013
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++
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++#define AT803X_PCS_SMART_EEE_CTRL3 0x805D
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++#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_MASK 0x3
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++#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT 12
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++#define AT803X_SMART_EEE_CTRL3_LPI_EN BIT(8)
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++
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+ #define AT803X_DEBUG_ADDR 0x1D
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+ #define AT803X_DEBUG_DATA 0x1E
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++#define AT803X_DBG0_REG 0x00
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++#define AT803X_DEBUG_RGMII_RX_CLK_DLY BIT(8)
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+ #define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05
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+ #define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8)
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+
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+@@ -50,6 +60,7 @@ MODULE_LICENSE("GPL");
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+ struct at803x_priv {
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+ bool phy_reset:1;
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+ struct gpio_desc *gpiod_reset;
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++ int prev_speed;
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+ };
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+
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+ struct at803x_context {
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+@@ -61,6 +72,43 @@ struct at803x_context {
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+ u16 led_control;
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+ };
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+
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++static u16
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++at803x_dbg_reg_rmw(struct phy_device *phydev, u16 reg, u16 clear, u16 set)
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++{
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++ struct mii_bus *bus = phydev->bus;
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++ int val;
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++
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++ mutex_lock(&bus->mdio_lock);
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++
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++ bus->write(bus, phydev->addr, AT803X_DEBUG_ADDR, reg);
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++ val = bus->read(bus, phydev->addr, AT803X_DEBUG_DATA);
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++ if (val < 0) {
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++ val = 0xffff;
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++ goto out;
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++ }
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++
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++ val &= ~clear;
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++ val |= set;
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++ bus->write(bus, phydev->addr, AT803X_DEBUG_DATA, val);
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++
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++out:
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++ mutex_unlock(&bus->mdio_lock);
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++ return val;
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++}
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++
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++static inline void
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++at803x_dbg_reg_set(struct phy_device *phydev, u16 reg, u16 set)
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++{
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++ at803x_dbg_reg_rmw(phydev, reg, 0, set);
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++}
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++
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++static inline void
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++at803x_dbg_reg_clr(struct phy_device *phydev, u16 reg, u16 clear)
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++{
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++ at803x_dbg_reg_rmw(phydev, reg, clear, 0);
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++}
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++
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++
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+ /* save relevant PHY registers to private copy */
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+ static void at803x_context_save(struct phy_device *phydev,
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+ struct at803x_context *context)
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+@@ -209,8 +257,16 @@ static int at803x_probe(struct phy_devic
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+ return 0;
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+ }
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+
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++static void at803x_disable_smarteee(struct phy_device *phydev)
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++{
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++ phy_write_mmd(phydev, MDIO_MMD_PCS, AT803X_PCS_SMART_EEE_CTRL3,
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++ 1 << AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT);
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++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0);
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++}
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++
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+ static int at803x_config_init(struct phy_device *phydev)
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+ {
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++ struct at803x_platform_data *pdata;
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+ int ret;
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+
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+ ret = genphy_config_init(phydev);
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+@@ -228,6 +284,26 @@ static int at803x_config_init(struct phy
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+ return ret;
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+ }
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+
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++ pdata = dev_get_platdata(&phydev->dev);
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++ if (pdata) {
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++ if (pdata->disable_smarteee)
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++ at803x_disable_smarteee(phydev);
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++
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++ if (pdata->enable_rgmii_rx_delay)
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++ at803x_dbg_reg_set(phydev, AT803X_DBG0_REG,
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++ AT803X_DEBUG_RGMII_RX_CLK_DLY);
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++ else
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++ at803x_dbg_reg_clr(phydev, AT803X_DBG0_REG,
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++ AT803X_DEBUG_RGMII_RX_CLK_DLY);
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++
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++ if (pdata->enable_rgmii_tx_delay)
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++ at803x_dbg_reg_set(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL,
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++ AT803X_DEBUG_RGMII_TX_CLK_DLY);
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++ else
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++ at803x_dbg_reg_clr(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL,
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++ AT803X_DEBUG_RGMII_TX_CLK_DLY);
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++ }
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++
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+ return 0;
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+ }
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+
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+@@ -259,6 +335,8 @@ static int at803x_config_intr(struct phy
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+ static void at803x_link_change_notify(struct phy_device *phydev)
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+ {
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+ struct at803x_priv *priv = phydev->priv;
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++ struct at803x_platform_data *pdata;
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++ pdata = dev_get_platdata(&phydev->dev);
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+
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+ /*
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+ * Conduct a hardware reset for AT8030 every time a link loss is
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+@@ -289,6 +367,26 @@ static void at803x_link_change_notify(st
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+ priv->phy_reset = false;
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+ }
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+ }
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++ if (pdata && pdata->fixup_rgmii_tx_delay &&
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++ phydev->speed != priv->prev_speed) {
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++ switch (phydev->speed) {
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++ case SPEED_10:
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++ case SPEED_100:
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++ at803x_dbg_reg_set(phydev,
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++ AT803X_DEBUG_SYSTEM_MODE_CTRL,
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++ AT803X_DEBUG_RGMII_TX_CLK_DLY);
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++ break;
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++ case SPEED_1000:
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++ at803x_dbg_reg_clr(phydev,
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++ AT803X_DEBUG_SYSTEM_MODE_CTRL,
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++ AT803X_DEBUG_RGMII_TX_CLK_DLY);
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++ break;
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++ default:
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++ break;
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++ }
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++
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++ priv->prev_speed = phydev->speed;
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++ }
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+ }
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+
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+ static struct phy_driver at803x_driver[] = {
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+--- /dev/null
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++++ b/include/linux/platform_data/phy-at803x.h
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+@@ -0,0 +1,11 @@
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++#ifndef _PHY_AT803X_PDATA_H
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++#define _PHY_AT803X_PDATA_H
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++
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++struct at803x_platform_data {
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++ int disable_smarteee:1;
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++ int enable_rgmii_tx_delay:1;
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++ int enable_rgmii_rx_delay:1;
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++ int fixup_rgmii_tx_delay:1;
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++};
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++
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++#endif /* _PHY_AT803X_PDATA_H */
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Felix Fietkau