ipq806x: refresh upstreamed patch with kernel version tag

Refresh upstreamed patch with kernel version tag and replace them with
the upstream version.

For krait-cc patch rework them with the upstream changes.

Signed-off-by: Christian Marangi <[email protected]>

target/linux/ipq806x/patches-5.15/103-v5.19-02-ARM-dts-qcom-add-syscon-and-cxo-pxo-clock-to-gcc-.patch → target/linux/ipq806x/patches-5.15/103-v5.19-ARM-dts-qcom-add-syscon-and-cxo-pxo-clock-to-gcc-nod.patch

@@ -1,8 +1,8 @@
-From 9fa82f98cb85e5432060f469253adcf14fa38082 Mon Sep 17 00:00:00 2001
+From a5ba119455c77a07e05f2fe0af446c8bf43d1a00 Mon Sep 17 00:00:00 2001
 From: Ansuel Smith <[email protected]>
-Date: Mon, 17 Jan 2022 21:59:39 +0100
-Subject: [PATCH v2 2/2] ARM: dts: qcom: add syscon and cxo/pxo clock to gcc
- node for ipq8064
+Date: Sat, 26 Feb 2022 14:52:35 +0100
+Subject: [PATCH] ARM: dts: qcom: add syscon and cxo/pxo clock to gcc node for
+ ipq8064
 
 Add syscon compatible required for tsens driver to correctly probe driver
 and access the reg. Also add cxo and pxo tag and declare them as gcc clock
@@ -11,13 +11,15 @@ now requires them for the ipq8064 gcc driver that has now been modernized.
 Signed-off-by: Ansuel Smith <[email protected]>
 Reviewed-by: Bjorn Andersson <[email protected]>
 Reviewed-by: Stephen Boyd <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
 
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -298,7 +298,7 @@
+@@ -298,13 +298,13 @@
  	};
  
  	clocks {
@@ -26,6 +28,13 @@ Reviewed-by: Stephen Boyd <[email protected]>
  			compatible = "fixed-clock";
  			#clock-cells = <0>;
  			clock-frequency = <25000000>;
+ 		};
+ 
+-		pxo_board {
++		pxo_board: pxo_board {
+ 			compatible = "fixed-clock";
+ 			#clock-cells = <0>;
+ 			clock-frequency = <25000000>;
 @@ -736,7 +736,9 @@
  		};
  

target/linux/ipq806x/patches-5.15/103-01-ARM-dts-qcom-replace-gcc-PXO-with-pxo_board-fixed.patch → target/linux/ipq806x/patches-5.15/103-v6.0-01-ARM-dts-qcom-replace-gcc-PXO-with-pxo_board-fixed-cl.patch

@@ -1,8 +1,7 @@
-From 5a8aa766cedac0ceaa4beabc30e9fa62dd9f1ac1 Mon Sep 17 00:00:00 2001
+From eb9e93937756a05787977875830c0dc482cb57e0 Mon Sep 17 00:00:00 2001
 From: Ansuel Smith <[email protected]>
-Date: Fri, 29 Apr 2022 14:23:16 +0200
-Subject: [PATCH v2 1/2] ARM: dts: qcom: replace gcc PXO with pxo_board fixed
- clock
+Date: Sat, 30 Apr 2022 07:51:17 +0200
+Subject: [PATCH] ARM: dts: qcom: replace gcc PXO with pxo_board fixed clock
 
 Replace gcc PXO phandle to pxo_board fixed clock declared in the dts.
 gcc driver doesn't provide PXO_SRC as it's a fixed-clock. This cause a
@@ -10,22 +9,16 @@ kernel panic if any driver actually try to use it.
 
 Fixes: 40cf5c884a96 ("ARM: dts: qcom: add L2CC and RPM for IPQ8064")
 Signed-off-by: Ansuel Smith <[email protected]>
+Reviewed-by: Dmitry Baryshkov <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
 
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -304,7 +304,7 @@
- 			clock-frequency = <25000000>;
- 		};
- 
--		pxo_board {
-+		pxo_board: pxo_board {
- 			compatible = "fixed-clock";
- 			#clock-cells = <0>;
- 			clock-frequency = <25000000>;
-@@ -782,7 +782,7 @@
+@@ -784,7 +784,7 @@
  		l2cc: clock-controller@2011000 {
  			compatible = "qcom,kpss-gcc", "syscon";
  			reg = <0x2011000 0x1000>;

target/linux/ipq806x/patches-5.15/119-02-ARM-DTS-qcom-add-rpmcc-missing-clocks-for-apq-ipq.patch → target/linux/ipq806x/patches-5.15/119-v6.0-02-ARM-dts-qcom-add-rpmcc-missing-clocks-for-apq-ipq806.patch

@@ -1,14 +1,16 @@
-From 3a0cf0a2b99fb3d193d72e3804292697d73d3aab Mon Sep 17 00:00:00 2001
+From aa7fd3bb6017b343585e97a909f9b7d2fe174018 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <[email protected]>
-Date: Tue, 5 Jul 2022 21:29:01 +0200
-Subject: [PATCH v2 2/4] ARM: DTS: qcom: add rpmcc missing clocks for
- apq/ipq8064 and msm8660
+Date: Thu, 7 Jul 2022 00:53:19 +0200
+Subject: [PATCH] ARM: dts: qcom: add rpmcc missing clocks for apq/ipq8064 and
+ msm8660
 
 Add missing rpmcc pxo and cxo clock for apq8064, ipq8064 and
 msm8660 dtsi.
 
 Signed-off-by: Christian Marangi <[email protected]>
 Reviewed-by: Dmitry Baryshkov <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
  arch/arm/boot/dts/qcom-apq8064.dtsi | 2 ++
  arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 ++

target/linux/ipq806x/patches-5.15/119-03-clk-qcom-clk-rpm-convert-to-parent_data-API.patch → target/linux/ipq806x/patches-5.15/119-v6.0-03-clk-qcom-clk-rpm-convert-to-parent_data-API.patch

@@ -1,7 +1,7 @@
-From 3d8c0e94a792ae62fa0495ac940c9850a059afc2 Mon Sep 17 00:00:00 2001
+From 129d9cd9c25041f8b8681fd6e8584fa47c385f3b Mon Sep 17 00:00:00 2001
 From: Christian Marangi <[email protected]>
-Date: Tue, 5 Jul 2022 21:39:18 +0200
-Subject: [PATCH v2 3/4] clk: qcom: clk-rpm: convert to parent_data API
+Date: Thu, 7 Jul 2022 00:53:20 +0200
+Subject: [PATCH] clk: qcom: clk-rpm: convert to parent_data API
 
 Convert clk-rpm driver to parent_data API.
 We keep the old pxo/cxo_board parent naming to keep compatibility with
@@ -9,6 +9,8 @@ old DT and we use the new pxo/cxo for new implementation where these
 clock are defined in DTS.
 
 Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
  drivers/clk/qcom/clk-rpm.c | 24 ++++++++++++++++--------
  1 file changed, 16 insertions(+), 8 deletions(-)

target/linux/ipq806x/patches-5.15/121-01-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch → target/linux/ipq806x/patches-5.15/120-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch

@@ -1,12 +1,14 @@
-From 09930efb4f4fb81019ca33bf64827ce258eca66f Mon Sep 17 00:00:00 2001
+From 09be1a39e685d8c5edd471fd1cac9a8f8280d2de Mon Sep 17 00:00:00 2001
 From: Christian Marangi <[email protected]>
-Date: Thu, 15 Sep 2022 01:58:12 +0200
-Subject: [PATCH 1/9] clk: qcom: kpss-xcc: register it as clk provider
+Date: Tue, 8 Nov 2022 22:17:34 +0100
+Subject: [PATCH] clk: qcom: kpss-xcc: register it as clk provider
 
 krait-cc use this driver for the secondary mux. Register it as a clk
 provider to correctly use this clk in other drivers.
 
 Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
  drivers/clk/qcom/kpss-xcc.c | 13 +++++++++----
  1 file changed, 9 insertions(+), 4 deletions(-)

target/linux/ipq806x/patches-5.15/121-02-clk-qcom-krait-cc-convert-to-parent_data-API.patch

@@ -1,264 +0,0 @@
-From 334c1540d5753a3c83a4cb84d935d606cb47a03b Mon Sep 17 00:00:00 2001
-From: Christian Marangi <[email protected]>
-Date: Thu, 17 Feb 2022 23:02:59 +0100
-Subject: [PATCH 2/9] clk: qcom: krait-cc: convert to parent_data API
-
-Modernize the krait-cc driver to parent-data API and refactor to drop
-any use of clk_names. From Documentation all the required clocks should
-be declared in DTS so fw_name can be correctly used to get the parents
-for all the muxes. .name is also declared to save compatibility with old
-implementation.
-
-Signed-off-by: Christian Marangi <[email protected]>
----
- drivers/clk/qcom/krait-cc.c | 126 +++++++++++++++++++-----------------
- 1 file changed, 66 insertions(+), 60 deletions(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -69,21 +69,22 @@ static int krait_notifier_register(struc
- 	return ret;
- }
- 
--static int
-+static struct clk *
- krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
- {
- 	struct krait_div2_clk *div;
-+	static struct clk_parent_data p_data[1];
- 	struct clk_init_data init = {
--		.num_parents = 1,
-+		.num_parents = ARRAY_SIZE(p_data),
- 		.ops = &krait_div2_clk_ops,
- 		.flags = CLK_SET_RATE_PARENT,
- 	};
--	const char *p_names[1];
- 	struct clk *clk;
-+	char *parent_name;
- 
- 	div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
- 	if (!div)
--		return -ENOMEM;
-+		return ERR_PTR(-ENOMEM);
- 
- 	div->width = 2;
- 	div->shift = 6;
-@@ -93,43 +94,49 @@ krait_add_div(struct device *dev, int id
- 
- 	init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
- 	if (!init.name)
--		return -ENOMEM;
-+		return ERR_PTR(-ENOMEM);
- 
--	init.parent_names = p_names;
--	p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
--	if (!p_names[0]) {
--		kfree(init.name);
--		return -ENOMEM;
-+	init.parent_data = p_data;
-+	parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
-+	if (!parent_name) {
-+		clk = ERR_PTR(-ENOMEM);
-+		goto err_parent_name;
- 	}
- 
-+	p_data[0].fw_name = parent_name;
-+	p_data[0].name = parent_name;
-+
- 	clk = devm_clk_register(dev, &div->hw);
--	kfree(p_names[0]);
-+
-+	kfree(parent_name);
-+err_parent_name:
- 	kfree(init.name);
- 
--	return PTR_ERR_OR_ZERO(clk);
-+	return clk;
- }
- 
--static int
-+static struct clk *
- krait_add_sec_mux(struct device *dev, int id, const char *s,
- 		  unsigned int offset, bool unique_aux)
- {
- 	int ret;
- 	struct krait_mux_clk *mux;
--	static const char *sec_mux_list[] = {
--		"acpu_aux",
--		"qsb",
-+	static struct clk_parent_data sec_mux_list[2] = {
-+		{ .name = "qsb", .fw_name = "qsb" },
-+		{},
- 	};
- 	struct clk_init_data init = {
--		.parent_names = sec_mux_list,
-+		.parent_data = sec_mux_list,
- 		.num_parents = ARRAY_SIZE(sec_mux_list),
- 		.ops = &krait_mux_clk_ops,
- 		.flags = CLK_SET_RATE_PARENT,
- 	};
- 	struct clk *clk;
-+	char *parent_name;
- 
- 	mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
- 	if (!mux)
--		return -ENOMEM;
-+		return ERR_PTR(-ENOMEM);
- 
- 	mux->offset = offset;
- 	mux->lpl = id >= 0;
-@@ -149,44 +156,51 @@ krait_add_sec_mux(struct device *dev, in
- 
- 	init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
- 	if (!init.name)
--		return -ENOMEM;
-+		return ERR_PTR(-ENOMEM);
- 
- 	if (unique_aux) {
--		sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
--		if (!sec_mux_list[0]) {
-+		parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
-+		if (!parent_name) {
- 			clk = ERR_PTR(-ENOMEM);
- 			goto err_aux;
- 		}
-+		sec_mux_list[1].fw_name = parent_name;
-+		sec_mux_list[1].name = parent_name;
-+	} else {
-+		sec_mux_list[1].name = "apu_aux";
- 	}
- 
- 	clk = devm_clk_register(dev, &mux->hw);
-+	if (IS_ERR(clk))
-+		goto err_clk;
- 
- 	ret = krait_notifier_register(dev, clk, mux);
- 	if (ret)
--		goto unique_aux;
-+		clk = ERR_PTR(ret);
- 
--unique_aux:
-+err_clk:
- 	if (unique_aux)
--		kfree(sec_mux_list[0]);
-+		kfree(parent_name);
- err_aux:
- 	kfree(init.name);
--	return PTR_ERR_OR_ZERO(clk);
-+	return clk;
- }
- 
- static struct clk *
--krait_add_pri_mux(struct device *dev, int id, const char *s,
--		  unsigned int offset)
-+krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux,
-+		  int id, const char *s, unsigned int offset)
- {
- 	int ret;
- 	struct krait_mux_clk *mux;
--	const char *p_names[3];
-+	static struct clk_parent_data p_data[3];
- 	struct clk_init_data init = {
--		.parent_names = p_names,
--		.num_parents = ARRAY_SIZE(p_names),
-+		.parent_data = p_data,
-+		.num_parents = ARRAY_SIZE(p_data),
- 		.ops = &krait_mux_clk_ops,
- 		.flags = CLK_SET_RATE_PARENT,
- 	};
- 	struct clk *clk;
-+	char *hfpll_name;
- 
- 	mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
- 	if (!mux)
-@@ -204,36 +218,29 @@ krait_add_pri_mux(struct device *dev, in
- 	if (!init.name)
- 		return ERR_PTR(-ENOMEM);
- 
--	p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
--	if (!p_names[0]) {
-+	hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
-+	if (!hfpll_name) {
- 		clk = ERR_PTR(-ENOMEM);
--		goto err_p0;
-+		goto err_hfpll;
- 	}
- 
--	p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
--	if (!p_names[1]) {
--		clk = ERR_PTR(-ENOMEM);
--		goto err_p1;
--	}
-+	p_data[0].fw_name = hfpll_name;
-+	p_data[0].name = hfpll_name;
- 
--	p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
--	if (!p_names[2]) {
--		clk = ERR_PTR(-ENOMEM);
--		goto err_p2;
--	}
-+	p_data[1].hw = __clk_get_hw(hfpll_div);
-+	p_data[2].hw = __clk_get_hw(sec_mux);
- 
- 	clk = devm_clk_register(dev, &mux->hw);
-+	if (IS_ERR(clk))
-+		goto err_clk;
- 
- 	ret = krait_notifier_register(dev, clk, mux);
- 	if (ret)
--		goto err_p3;
--err_p3:
--	kfree(p_names[2]);
--err_p2:
--	kfree(p_names[1]);
--err_p1:
--	kfree(p_names[0]);
--err_p0:
-+		clk = ERR_PTR(ret);
-+
-+err_clk:
-+	kfree(hfpll_name);
-+err_hfpll:
- 	kfree(init.name);
- 	return clk;
- }
-@@ -241,11 +248,10 @@ err_p0:
- /* id < 0 for L2, otherwise id == physical CPU number */
- static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
- {
--	int ret;
- 	unsigned int offset;
- 	void *p = NULL;
- 	const char *s;
--	struct clk *clk;
-+	struct clk *hfpll_div, *sec_mux, *clk;
- 
- 	if (id >= 0) {
- 		offset = 0x4501 + (0x1000 * id);
-@@ -257,19 +263,19 @@ static struct clk *krait_add_clks(struct
- 		s = "_l2";
- 	}
- 
--	ret = krait_add_div(dev, id, s, offset);
--	if (ret) {
--		clk = ERR_PTR(ret);
-+	hfpll_div = krait_add_div(dev, id, s, offset);
-+	if (IS_ERR(hfpll_div)) {
-+		clk = hfpll_div;
- 		goto err;
- 	}
- 
--	ret = krait_add_sec_mux(dev, id, s, offset, unique_aux);
--	if (ret) {
--		clk = ERR_PTR(ret);
-+	sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux);
-+	if (IS_ERR(sec_mux)) {
-+		clk = sec_mux;
- 		goto err;
- 	}
- 
--	clk = krait_add_pri_mux(dev, id, s, offset);
-+	clk = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset);
- err:
- 	kfree(p);
- 	return clk;

target/linux/ipq806x/patches-5.15/121-06-clk-qcom-krait-cc-fix-never-enabled-secondary-mux.patch

@@ -1,47 +0,0 @@
-From a0f6d7abe7f5da1a9b435eed89acace7cde4add6 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <[email protected]>
-Date: Thu, 15 Sep 2022 02:39:11 +0200
-Subject: [PATCH 6/9] clk: qcom: krait-cc: fix never enabled secondary mux
-
-While never actually used as a pure mux, the secondary mux is used as a
-safe selection for the primary mux to switch while the hfpll are
-reprogrammed.
-The secondary muxes were never enabled and this cause the krait-clk
-drivers to silently ignore any set parent request without any error.
-Enable the secondary mux to actually apply the parent and apply the
-requested frequency.
-
-Fixes: bb5c4a85051e ("clk: qcom: Add Krait clock controller driver")
-Signed-off-by: Christian Marangi <[email protected]>
----
- drivers/clk/qcom/krait-cc.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -121,7 +121,7 @@ static struct clk *
- krait_add_sec_mux(struct device *dev, int id, const char *s,
- 		  unsigned int offset, bool unique_aux)
- {
--	int ret;
-+	int ret, cpu;
- 	struct krait_mux_clk *mux;
- 	static struct clk_parent_data sec_mux_list[2] = {
- 		{ .name = "qsb", .fw_name = "qsb" },
-@@ -180,6 +180,16 @@ krait_add_sec_mux(struct device *dev, in
- 	if (ret)
- 		clk = ERR_PTR(ret);
- 
-+	/* The secondary mux MUST be enabled or clk-krait silently
-+	 * ignore any request.
-+	 * Increase refcount for every CPU if it's the L2 secondary mux.
-+	 */
-+	if (id < 0)
-+		for_each_possible_cpu(cpu)
-+			clk_prepare_enable(clk);
-+	else
-+		clk_prepare_enable(clk);
-+
- err_clk:
- 	if (unique_aux)
- 		kfree(parent_name);

target/linux/ipq806x/patches-5.15/121-08-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch

@@ -1,70 +0,0 @@
-From b6655ca513b3f1b40417287ab7f706409455fe48 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <[email protected]>
-Date: Thu, 15 Sep 2022 02:56:47 +0200
-Subject: [PATCH 8/9] clk: qcom: krait-cc: handle secondary mux sourcing out of
- PXO
-
-The secondary mux can sourc out of PXO as the secondary MUX is attached
-to QSB and to another mux that can source out of PXO or PLL8_VOTE.
-
-Many device may run with uncorrect configuration with the mux sourcing
-out of PXO instead of PLL8_VOTE.
-
-To handle this case we add also PXO as required clocks and we check if
-the frequency is currently set to PXO and force a correct rate if it's
-the case.
-
-Signed-off-by: Christian Marangi <[email protected]>
----
- drivers/clk/qcom/krait-cc.c | 19 ++++++++++++++++++-
- 1 file changed, 18 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/qcom/krait-cc.c
-+++ b/drivers/clk/qcom/krait-cc.c
-@@ -317,7 +317,7 @@ static int krait_cc_probe(struct platfor
- {
- 	struct device *dev = &pdev->dev;
- 	const struct of_device_id *id;
--	unsigned long cur_rate, aux_rate, qsb_rate;
-+	unsigned long cur_rate, aux_rate, qsb_rate, pxo_rate;
- 	int cpu;
- 	struct clk *clk;
- 	struct clk **clks;
-@@ -327,6 +327,15 @@ static int krait_cc_probe(struct platfor
- 	if (!id)
- 		return -ENODEV;
- 
-+	clk = clk_get(dev, "pxo");
-+	if (IS_ERR(clk))
-+		clk = __clk_lookup("pxo_board");
-+
-+	if (IS_ERR_OR_NULL(clk))
-+		return clk == NULL ? -ENODEV : PTR_ERR(clk);
-+
-+	pxo_rate = clk_get_rate(clk);
-+
- 	/*
- 	 * Per Documentation qsb should be provided from DTS.
- 	 * To address old implementation, register the fixed clock anyway.
-@@ -394,6 +403,10 @@ static int krait_cc_probe(struct platfor
- 		dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n");
- 		cur_rate = aux_rate;
- 	}
-+	if (cur_rate == pxo_rate) {
-+		dev_info(dev, "L2 @ PXO rate. Forcing new rate.\n");
-+		cur_rate = aux_rate;
-+	}
- 	clk_set_rate(l2_pri_mux_clk, aux_rate);
- 	clk_set_rate(l2_pri_mux_clk, 2);
- 	clk_set_rate(l2_pri_mux_clk, cur_rate);
-@@ -405,6 +418,10 @@ static int krait_cc_probe(struct platfor
- 			dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu);
- 			cur_rate = aux_rate;
- 		}
-+		if (cur_rate ==pxo_rate) {
-+			dev_info(dev, "CPU%d @ PXO rate. Forcing new rate.\n", cpu);
-+			cur_rate = aux_rate;
-+		}
- 
- 		clk_set_rate(clk, aux_rate);
- 		clk_set_rate(clk, 2);

target/linux/ipq806x/patches-5.15/121-05-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch → target/linux/ipq806x/patches-5.15/121-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch

@@ -1,20 +1,22 @@
-From ff65b60fa89be06ba68e3e22702dd71700afb6a5 Mon Sep 17 00:00:00 2001
+From 3198106a99e73dbc4c02bd5128cec0997c73af82 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <[email protected]>
-Date: Thu, 15 Sep 2022 02:34:58 +0200
-Subject: [PATCH 5/9] clk: qcom: krait-cc: use devm variant for clk notifier
+Date: Tue, 8 Nov 2022 22:58:27 +0100
+Subject: [PATCH 1/6] clk: qcom: krait-cc: use devm variant for clk notifier
  register
 
 Use devm variant for clk notifier register and correctly handle free
 resource on driver remove.
 
 Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
  drivers/clk/qcom/krait-cc.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 --- a/drivers/clk/qcom/krait-cc.c
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -64,7 +64,7 @@ static int krait_notifier_register(struc
+@@ -62,7 +62,7 @@ static int krait_notifier_register(struc
  	int ret = 0;
  
  	mux->clk_nb.notifier_call = krait_notifier_cb;

target/linux/ipq806x/patches-5.15/121-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch

@@ -0,0 +1,46 @@
+From 8e456411abcbf899c04740b9dbb3dcefcd61c946 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 9 Nov 2022 01:56:27 +0100
+Subject: [PATCH 2/6] clk: qcom: krait-cc: fix wrong parent order for secondary
+ mux
+
+The secondary mux parent order is swapped.
+This currently doesn't cause problems as the secondary mux is used for idle
+clk and as a safe clk source while reprogramming the hfpll.
+
+Each mux have 2 or more output but he always have a safe source to
+switch while reprogramming the connected pll. We use a clk notifier to
+switch to the correct parent before clk core can apply the correct rate.
+The parent to switch is hardcoded in the mux struct.
+
+For the secondary mux the safe source to use is the qsb parent as it's
+the only fixed clk as the acpus_aux is a pll that can source from pxo or
+from pll8.
+
+The hardcoded safe parent for the secondary mux is set to index 0 that
+in the secondary mux map is set to 2.
+
+But the index 0 is actually acpu_aux in the parent list.
+
+Fix the swapped parents to correctly handle idle frequency and output a
+sane clk_summary report.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+---
+ drivers/clk/qcom/krait-cc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, in
+ 	int ret;
+ 	struct krait_mux_clk *mux;
+ 	static const char *sec_mux_list[] = {
+-		"acpu_aux",
+ 		"qsb",
++		"acpu_aux",
+ 	};
+ 	struct clk_init_data init = {
+ 		.parent_names = sec_mux_list,

target/linux/ipq806x/patches-5.15/121-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch

@@ -0,0 +1,68 @@
+From 18ae57b1e8abee6c453381470f6e18991d2901a8 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 9 Nov 2022 01:56:28 +0100
+Subject: [PATCH 3/6] clk: qcom: krait-cc: also enable secondary mux and div
+ clk
+
+clk-krait ignore any rate change if clk is not flagged as enabled.
+Correctly enable the secondary mux and div clk to correctly change rate
+instead of silently ignoring the request.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+---
+ drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++-
+ 1 file changed, 20 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id
+ 	};
+ 	const char *p_names[1];
+ 	struct clk *clk;
++	int cpu;
+ 
+ 	div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+ 	if (!div)
+@@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id
+ 	}
+ 
+ 	clk = devm_clk_register(dev, &div->hw);
++	if (IS_ERR(clk))
++		goto err;
++
++	/* clk-krait ignore any rate change if mux is not flagged as enabled */
++	if (id < 0)
++		for_each_online_cpu(cpu)
++			clk_prepare_enable(div->hw.clk);
++	else
++		clk_prepare_enable(div->hw.clk);
++
++err:
+ 	kfree(p_names[0]);
+ 	kfree(init.name);
+ 
+@@ -113,7 +125,7 @@ static int
+ krait_add_sec_mux(struct device *dev, int id, const char *s,
+ 		  unsigned int offset, bool unique_aux)
+ {
+-	int ret;
++	int cpu, ret;
+ 	struct krait_mux_clk *mux;
+ 	static const char *sec_mux_list[] = {
+ 		"qsb",
+@@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, in
+ 	if (ret)
+ 		goto unique_aux;
+ 
++	/* clk-krait ignore any rate change if mux is not flagged as enabled */
++	if (id < 0)
++		for_each_online_cpu(cpu)
++			clk_prepare_enable(mux->hw.clk);
++	else
++		clk_prepare_enable(mux->hw.clk);
++
+ unique_aux:
+ 	if (unique_aux)
+ 		kfree(sec_mux_list[0]);

target/linux/ipq806x/patches-5.15/121-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch

@@ -0,0 +1,48 @@
+From e5dc1a4c01510da8438dddfdf4200b79d73990dc Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 9 Nov 2022 01:56:29 +0100
+Subject: [PATCH 4/6] clk: qcom: krait-cc: handle secondary mux sourcing out of
+ acpu_aux
+
+Some bootloader may leave the system in an even more undefined state
+with the secondary mux of L2 or other cores sourcing out of the acpu_aux
+parent. This results in the clk set to the PXO rate or a PLL8 rate.
+
+The current logic to reset the mux and set them to a defined state only
+handle if the mux are configured to source out of QSB. Change this and
+force a new and defined state if the current clk is lower than the aux
+rate. This way we can handle any wrong configuration where the mux is
+sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1),
+PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz).
+
+Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+---
+ drivers/clk/qcom/krait-cc.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -383,8 +383,8 @@ static int krait_cc_probe(struct platfor
+ 	 */
+ 	cur_rate = clk_get_rate(l2_pri_mux_clk);
+ 	aux_rate = 384000000;
+-	if (cur_rate == 1) {
+-		pr_info("L2 @ QSB rate. Forcing new rate.\n");
++	if (cur_rate < aux_rate) {
++		pr_info("L2 @ Undefined rate. Forcing new rate.\n");
+ 		cur_rate = aux_rate;
+ 	}
+ 	clk_set_rate(l2_pri_mux_clk, aux_rate);
+@@ -394,8 +394,8 @@ static int krait_cc_probe(struct platfor
+ 	for_each_possible_cpu(cpu) {
+ 		clk = clks[cpu];
+ 		cur_rate = clk_get_rate(clk);
+-		if (cur_rate == 1) {
+-			pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
++		if (cur_rate < aux_rate) {
++			pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
+ 			cur_rate = aux_rate;
+ 		}
+ 

target/linux/ipq806x/patches-5.15/121-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch

@@ -0,0 +1,104 @@
+From 8ea9fb841a7e528bc8ae79d726ce951dcf7b46e2 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 9 Nov 2022 01:56:30 +0100
+Subject: [PATCH 5/6] clk: qcom: krait-cc: convert to devm_clk_hw_register
+
+clk_register is now deprecated. Convert the driver to devm_clk_hw_register.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+---
+ drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------
+ 1 file changed, 19 insertions(+), 12 deletions(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id
+ 		.flags = CLK_SET_RATE_PARENT,
+ 	};
+ 	const char *p_names[1];
+-	struct clk *clk;
+-	int cpu;
++	int cpu, ret;
+ 
+ 	div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+ 	if (!div)
+@@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id
+ 		return -ENOMEM;
+ 	}
+ 
+-	clk = devm_clk_register(dev, &div->hw);
+-	if (IS_ERR(clk))
++	ret = devm_clk_hw_register(dev, &div->hw);
++	if (ret)
+ 		goto err;
+ 
+ 	/* clk-krait ignore any rate change if mux is not flagged as enabled */
+@@ -118,7 +117,7 @@ err:
+ 	kfree(p_names[0]);
+ 	kfree(init.name);
+ 
+-	return PTR_ERR_OR_ZERO(clk);
++	return ret;
+ }
+ 
+ static int
+@@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, in
+ 		.ops = &krait_mux_clk_ops,
+ 		.flags = CLK_SET_RATE_PARENT,
+ 	};
+-	struct clk *clk;
+ 
+ 	mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+ 	if (!mux)
+@@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, in
+ 	if (unique_aux) {
+ 		sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
+ 		if (!sec_mux_list[0]) {
+-			clk = ERR_PTR(-ENOMEM);
++			ret = -ENOMEM;
+ 			goto err_aux;
+ 		}
+ 	}
+ 
+-	clk = devm_clk_register(dev, &mux->hw);
++	ret = devm_clk_hw_register(dev, &mux->hw);
++	if (ret)
++		goto unique_aux;
+ 
+-	ret = krait_notifier_register(dev, clk, mux);
++	ret = krait_notifier_register(dev, mux->hw.clk, mux);
+ 	if (ret)
+ 		goto unique_aux;
+ 
+@@ -189,7 +189,7 @@ unique_aux:
+ 		kfree(sec_mux_list[0]);
+ err_aux:
+ 	kfree(init.name);
+-	return PTR_ERR_OR_ZERO(clk);
++	return ret;
+ }
+ 
+ static struct clk *
+@@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, in
+ 		goto err_p2;
+ 	}
+ 
+-	clk = devm_clk_register(dev, &mux->hw);
++	ret = devm_clk_hw_register(dev, &mux->hw);
++	if (ret) {
++		clk = ERR_PTR(ret);
++		goto err_p3;
++	}
++
++	clk = mux->hw.clk;
+ 
+ 	ret = krait_notifier_register(dev, clk, mux);
+ 	if (ret)
+-		goto err_p3;
++		clk = ERR_PTR(ret);
++
+ err_p3:
+ 	kfree(p_names[2]);
+ err_p2:

target/linux/ipq806x/patches-5.15/121-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch

@@ -0,0 +1,414 @@
+From 56a655e1c41a86445cf2de656649ad93424b2a63 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 9 Nov 2022 01:56:31 +0100
+Subject: [PATCH 6/6] clk: qcom: krait-cc: convert to parent_data API
+
+Modernize the krait-cc driver to parent-data API and refactor to drop
+any use of parent_names. From Documentation all the required clocks should
+be declared in DTS so fw_name can be correctly used to get the parents
+for all the muxes. .name is also declared to save compatibility with old
+DT.
+
+While at it also drop some hardcoded index and introduce an enum to make
+index values more clear.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+---
+ drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++----------------
+ 1 file changed, 112 insertions(+), 90 deletions(-)
+
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -15,6 +15,16 @@
+ 
+ #include "clk-krait.h"
+ 
++enum {
++	cpu0_mux = 0,
++	cpu1_mux,
++	cpu2_mux,
++	cpu3_mux,
++	l2_mux,
++
++	clks_max,
++};
++
+ static unsigned int sec_mux_map[] = {
+ 	2,
+ 	0,
+@@ -69,21 +79,23 @@ static int krait_notifier_register(struc
+ 	return ret;
+ }
+ 
+-static int
++static struct clk_hw *
+ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
+ {
+ 	struct krait_div2_clk *div;
++	static struct clk_parent_data p_data[1];
+ 	struct clk_init_data init = {
+-		.num_parents = 1,
++		.num_parents = ARRAY_SIZE(p_data),
+ 		.ops = &krait_div2_clk_ops,
+ 		.flags = CLK_SET_RATE_PARENT,
+ 	};
+-	const char *p_names[1];
++	struct clk_hw *clk;
++	char *parent_name;
+ 	int cpu, ret;
+ 
+ 	div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+ 	if (!div)
+-		return -ENOMEM;
++		return ERR_PTR(-ENOMEM);
+ 
+ 	div->width = 2;
+ 	div->shift = 6;
+@@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id
+ 
+ 	init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+ 	if (!init.name)
+-		return -ENOMEM;
++		return ERR_PTR(-ENOMEM);
+ 
+-	init.parent_names = p_names;
+-	p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+-	if (!p_names[0]) {
+-		kfree(init.name);
+-		return -ENOMEM;
++	init.parent_data = p_data;
++	parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
++	if (!parent_name) {
++		clk = ERR_PTR(-ENOMEM);
++		goto err_parent_name;
+ 	}
+ 
++	p_data[0].fw_name = parent_name;
++	p_data[0].name = parent_name;
++
+ 	ret = devm_clk_hw_register(dev, &div->hw);
+-	if (ret)
+-		goto err;
++	if (ret) {
++		clk = ERR_PTR(ret);
++		goto err_clk;
++	}
++
++	clk = &div->hw;
+ 
+ 	/* clk-krait ignore any rate change if mux is not flagged as enabled */
+ 	if (id < 0)
+@@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id
+ 	else
+ 		clk_prepare_enable(div->hw.clk);
+ 
+-err:
+-	kfree(p_names[0]);
++err_clk:
++	kfree(parent_name);
++err_parent_name:
+ 	kfree(init.name);
+ 
+-	return ret;
++	return clk;
+ }
+ 
+-static int
++static struct clk_hw *
+ krait_add_sec_mux(struct device *dev, int id, const char *s,
+ 		  unsigned int offset, bool unique_aux)
+ {
+ 	int cpu, ret;
+ 	struct krait_mux_clk *mux;
+-	static const char *sec_mux_list[] = {
+-		"qsb",
+-		"acpu_aux",
++	static struct clk_parent_data sec_mux_list[2] = {
++		{ .name = "qsb", .fw_name = "qsb" },
++		{},
+ 	};
+ 	struct clk_init_data init = {
+-		.parent_names = sec_mux_list,
++		.parent_data = sec_mux_list,
+ 		.num_parents = ARRAY_SIZE(sec_mux_list),
+ 		.ops = &krait_mux_clk_ops,
+ 		.flags = CLK_SET_RATE_PARENT,
+ 	};
++	struct clk_hw *clk;
++	char *parent_name;
+ 
+ 	mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+ 	if (!mux)
+-		return -ENOMEM;
++		return ERR_PTR(-ENOMEM);
+ 
+ 	mux->offset = offset;
+ 	mux->lpl = id >= 0;
+@@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, in
+ 
+ 	init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+ 	if (!init.name)
+-		return -ENOMEM;
++		return ERR_PTR(-ENOMEM);
+ 
+ 	if (unique_aux) {
+-		sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
+-		if (!sec_mux_list[0]) {
+-			ret = -ENOMEM;
++		parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
++		if (!parent_name) {
++			clk = ERR_PTR(-ENOMEM);
+ 			goto err_aux;
+ 		}
++		sec_mux_list[1].fw_name = parent_name;
++		sec_mux_list[1].name = parent_name;
++	} else {
++		sec_mux_list[1].name = "apu_aux";
+ 	}
+ 
+ 	ret = devm_clk_hw_register(dev, &mux->hw);
+-	if (ret)
+-		goto unique_aux;
++	if (ret) {
++		clk = ERR_PTR(ret);
++		goto err_clk;
++	}
++
++	clk = &mux->hw;
+ 
+ 	ret = krait_notifier_register(dev, mux->hw.clk, mux);
+-	if (ret)
+-		goto unique_aux;
++	if (ret) {
++		clk = ERR_PTR(ret);
++		goto err_clk;
++	}
+ 
+ 	/* clk-krait ignore any rate change if mux is not flagged as enabled */
+ 	if (id < 0)
+@@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, in
+ 	else
+ 		clk_prepare_enable(mux->hw.clk);
+ 
+-unique_aux:
++err_clk:
+ 	if (unique_aux)
+-		kfree(sec_mux_list[0]);
++		kfree(parent_name);
+ err_aux:
+ 	kfree(init.name);
+-	return ret;
++	return clk;
+ }
+ 
+-static struct clk *
+-krait_add_pri_mux(struct device *dev, int id, const char *s,
+-		  unsigned int offset)
++static struct clk_hw *
++krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux,
++		  int id, const char *s, unsigned int offset)
+ {
+ 	int ret;
+ 	struct krait_mux_clk *mux;
+-	const char *p_names[3];
++	static struct clk_parent_data p_data[3];
+ 	struct clk_init_data init = {
+-		.parent_names = p_names,
+-		.num_parents = ARRAY_SIZE(p_names),
++		.parent_data = p_data,
++		.num_parents = ARRAY_SIZE(p_data),
+ 		.ops = &krait_mux_clk_ops,
+ 		.flags = CLK_SET_RATE_PARENT,
+ 	};
+-	struct clk *clk;
++	struct clk_hw *clk;
++	char *hfpll_name;
+ 
+ 	mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+ 	if (!mux)
+@@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, in
+ 	if (!init.name)
+ 		return ERR_PTR(-ENOMEM);
+ 
+-	p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+-	if (!p_names[0]) {
++	hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
++	if (!hfpll_name) {
+ 		clk = ERR_PTR(-ENOMEM);
+-		goto err_p0;
++		goto err_hfpll;
+ 	}
+ 
+-	p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+-	if (!p_names[1]) {
+-		clk = ERR_PTR(-ENOMEM);
+-		goto err_p1;
+-	}
++	p_data[0].fw_name = hfpll_name;
++	p_data[0].name = hfpll_name;
+ 
+-	p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+-	if (!p_names[2]) {
+-		clk = ERR_PTR(-ENOMEM);
+-		goto err_p2;
+-	}
++	p_data[1].hw = hfpll_div;
++	p_data[2].hw = sec_mux;
+ 
+ 	ret = devm_clk_hw_register(dev, &mux->hw);
+ 	if (ret) {
+ 		clk = ERR_PTR(ret);
+-		goto err_p3;
++		goto err_clk;
+ 	}
+ 
+-	clk = mux->hw.clk;
++	clk = &mux->hw;
+ 
+-	ret = krait_notifier_register(dev, clk, mux);
++	ret = krait_notifier_register(dev, mux->hw.clk, mux);
+ 	if (ret)
+ 		clk = ERR_PTR(ret);
+ 
+-err_p3:
+-	kfree(p_names[2]);
+-err_p2:
+-	kfree(p_names[1]);
+-err_p1:
+-	kfree(p_names[0]);
+-err_p0:
++err_clk:
++	kfree(hfpll_name);
++err_hfpll:
+ 	kfree(init.name);
+ 	return clk;
+ }
+ 
+ /* id < 0 for L2, otherwise id == physical CPU number */
+-static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
++static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux)
+ {
+-	int ret;
++	struct clk_hw *hfpll_div, *sec_mux, *pri_mux;
+ 	unsigned int offset;
+ 	void *p = NULL;
+ 	const char *s;
+-	struct clk *clk;
+ 
+ 	if (id >= 0) {
+ 		offset = 0x4501 + (0x1000 * id);
+@@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct
+ 		s = "_l2";
+ 	}
+ 
+-	ret = krait_add_div(dev, id, s, offset);
+-	if (ret) {
+-		clk = ERR_PTR(ret);
++	hfpll_div = krait_add_div(dev, id, s, offset);
++	if (IS_ERR(hfpll_div)) {
++		pri_mux = hfpll_div;
+ 		goto err;
+ 	}
+ 
+-	ret = krait_add_sec_mux(dev, id, s, offset, unique_aux);
+-	if (ret) {
+-		clk = ERR_PTR(ret);
++	sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux);
++	if (IS_ERR(sec_mux)) {
++		pri_mux = sec_mux;
+ 		goto err;
+ 	}
+ 
+-	clk = krait_add_pri_mux(dev, id, s, offset);
++	pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset);
++
+ err:
+ 	kfree(p);
+-	return clk;
++	return pri_mux;
+ }
+ 
+ static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data)
+@@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct o
+ 	unsigned int idx = clkspec->args[0];
+ 	struct clk **clks = data;
+ 
+-	if (idx >= 5) {
++	if (idx >= clks_max) {
+ 		pr_err("%s: invalid clock index %d\n", __func__, idx);
+ 		return ERR_PTR(-EINVAL);
+ 	}
+@@ -327,9 +350,8 @@ static int krait_cc_probe(struct platfor
+ 	const struct of_device_id *id;
+ 	unsigned long cur_rate, aux_rate;
+ 	int cpu;
+-	struct clk *clk;
+-	struct clk **clks;
+-	struct clk *l2_pri_mux_clk;
++	struct clk_hw *mux, *l2_pri_mux;
++	struct clk *clk, **clks;
+ 
+ 	id = of_match_device(krait_cc_match_table, dev);
+ 	if (!id)
+@@ -348,21 +370,21 @@ static int krait_cc_probe(struct platfor
+ 	}
+ 
+ 	/* Krait configurations have at most 4 CPUs and one L2 */
+-	clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL);
++	clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL);
+ 	if (!clks)
+ 		return -ENOMEM;
+ 
+ 	for_each_possible_cpu(cpu) {
+-		clk = krait_add_clks(dev, cpu, id->data);
++		mux = krait_add_clks(dev, cpu, id->data);
+ 		if (IS_ERR(clk))
+ 			return PTR_ERR(clk);
+-		clks[cpu] = clk;
++		clks[cpu] = mux->clk;
+ 	}
+ 
+-	l2_pri_mux_clk = krait_add_clks(dev, -1, id->data);
+-	if (IS_ERR(l2_pri_mux_clk))
+-		return PTR_ERR(l2_pri_mux_clk);
+-	clks[4] = l2_pri_mux_clk;
++	l2_pri_mux = krait_add_clks(dev, -1, id->data);
++	if (IS_ERR(l2_pri_mux))
++		return PTR_ERR(l2_pri_mux);
++	clks[l2_mux] = l2_pri_mux->clk;
+ 
+ 	/*
+ 	 * We don't want the CPU or L2 clocks to be turned off at late init
+@@ -372,7 +394,7 @@ static int krait_cc_probe(struct platfor
+ 	 * they take over.
+ 	 */
+ 	for_each_online_cpu(cpu) {
+-		clk_prepare_enable(l2_pri_mux_clk);
++		clk_prepare_enable(clks[l2_mux]);
+ 		WARN(clk_prepare_enable(clks[cpu]),
+ 		     "Unable to turn on CPU%d clock", cpu);
+ 	}
+@@ -388,16 +410,16 @@ static int krait_cc_probe(struct platfor
+ 	 * two different rates to force a HFPLL reinit under all
+ 	 * circumstances.
+ 	 */
+-	cur_rate = clk_get_rate(l2_pri_mux_clk);
++	cur_rate = clk_get_rate(clks[l2_mux]);
+ 	aux_rate = 384000000;
+ 	if (cur_rate < aux_rate) {
+ 		pr_info("L2 @ Undefined rate. Forcing new rate.\n");
+ 		cur_rate = aux_rate;
+ 	}
+-	clk_set_rate(l2_pri_mux_clk, aux_rate);
+-	clk_set_rate(l2_pri_mux_clk, 2);
+-	clk_set_rate(l2_pri_mux_clk, cur_rate);
+-	pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
++	clk_set_rate(clks[l2_mux], aux_rate);
++	clk_set_rate(clks[l2_mux], 2);
++	clk_set_rate(clks[l2_mux], cur_rate);
++	pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000);
+ 	for_each_possible_cpu(cpu) {
+ 		clk = clks[cpu];
+ 		cur_rate = clk_get_rate(clk);

target/linux/ipq806x/patches-5.15/121-03-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch → target/linux/ipq806x/patches-5.15/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch

@@ -14,16 +14,16 @@ Signed-off-by: Christian Marangi <[email protected]>
 
 --- a/drivers/clk/qcom/krait-cc.c
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -305,7 +305,7 @@ static int krait_cc_probe(struct platfor
+@@ -348,7 +348,7 @@ static int krait_cc_probe(struct platfor
  {
  	struct device *dev = &pdev->dev;
  	const struct of_device_id *id;
 -	unsigned long cur_rate, aux_rate;
 +	unsigned long cur_rate, aux_rate, qsb_rate;
  	int cpu;
- 	struct clk *clk;
- 	struct clk **clks;
-@@ -315,11 +315,19 @@ static int krait_cc_probe(struct platfor
+ 	struct clk_hw *mux, *l2_pri_mux;
+ 	struct clk *clk, **clks;
+@@ -357,11 +357,19 @@ static int krait_cc_probe(struct platfor
  	if (!id)
  		return -ENODEV;
  

target/linux/ipq806x/patches-5.15/121-04-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch → target/linux/ipq806x/patches-5.15/122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch

@@ -16,16 +16,16 @@ Signed-off-by: Christian Marangi <[email protected]>
 
 --- a/drivers/clk/qcom/krait-cc.c
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -15,6 +15,8 @@
- 
- #include "clk-krait.h"
+@@ -25,6 +25,8 @@ enum {
+ 	clks_max,
+ };
  
 +#define QSB_RATE	2250000000
 +
  static unsigned int sec_mux_map[] = {
  	2,
  	0,
-@@ -322,7 +324,7 @@ static int krait_cc_probe(struct platfor
+@@ -364,7 +366,7 @@ static int krait_cc_probe(struct platfor
  	 */
  	clk = clk_get(dev, "qsb");
  	if (IS_ERR(clk))
@@ -34,21 +34,3 @@ Signed-off-by: Christian Marangi <[email protected]>
  	if (IS_ERR(clk))
  		return PTR_ERR(clk);
  
-@@ -378,7 +380,7 @@ static int krait_cc_probe(struct platfor
- 	 */
- 	cur_rate = clk_get_rate(l2_pri_mux_clk);
- 	aux_rate = 384000000;
--	if (cur_rate == 1) {
-+	if (cur_rate == qsb_rate) {
- 		pr_info("L2 @ QSB rate. Forcing new rate.\n");
- 		cur_rate = aux_rate;
- 	}
-@@ -389,7 +391,7 @@ static int krait_cc_probe(struct platfor
- 	for_each_possible_cpu(cpu) {
- 		clk = clks[cpu];
- 		cur_rate = clk_get_rate(clk);
--		if (cur_rate == 1) {
-+		if (cur_rate == qsb_rate) {
- 			pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
- 			cur_rate = aux_rate;
- 		}

target/linux/ipq806x/patches-5.15/121-07-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch → target/linux/ipq806x/patches-5.15/122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch

@@ -12,25 +12,25 @@ Signed-off-by: Christian Marangi <[email protected]>
 
 --- a/drivers/clk/qcom/krait-cc.c
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -391,25 +391,25 @@ static int krait_cc_probe(struct platfor
- 	cur_rate = clk_get_rate(l2_pri_mux_clk);
+@@ -423,25 +423,25 @@ static int krait_cc_probe(struct platfor
+ 	cur_rate = clk_get_rate(clks[l2_mux]);
  	aux_rate = 384000000;
- 	if (cur_rate == qsb_rate) {
--		pr_info("L2 @ QSB rate. Forcing new rate.\n");
-+		dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n");
+ 	if (cur_rate < aux_rate) {
+-		pr_info("L2 @ Undefined rate. Forcing new rate.\n");
++		dev_info(dev, "L2 @ Undefined rate. Forcing new rate.\n");
  		cur_rate = aux_rate;
  	}
- 	clk_set_rate(l2_pri_mux_clk, aux_rate);
- 	clk_set_rate(l2_pri_mux_clk, 2);
- 	clk_set_rate(l2_pri_mux_clk, cur_rate);
--	pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
-+	dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
+ 	clk_set_rate(clks[l2_mux], aux_rate);
+ 	clk_set_rate(clks[l2_mux], 2);
+ 	clk_set_rate(clks[l2_mux], cur_rate);
+-	pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000);
++	dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000);
  	for_each_possible_cpu(cpu) {
  		clk = clks[cpu];
  		cur_rate = clk_get_rate(clk);
- 		if (cur_rate == qsb_rate) {
--			pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
-+			dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu);
+ 		if (cur_rate < aux_rate) {
+-			pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
++			dev_info(dev, "CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
  			cur_rate = aux_rate;
  		}
  

target/linux/ipq806x/patches-5.15/121-09-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch → target/linux/ipq806x/patches-5.15/122-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch

@@ -19,9 +19,9 @@ Signed-off-by: Christian Marangi <[email protected]>
 
 --- a/drivers/clk/qcom/krait-cc.c
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -15,7 +15,9 @@
- 
- #include "clk-krait.h"
+@@ -25,7 +25,9 @@ enum {
+ 	clks_max,
+ };
  
 -#define QSB_RATE	2250000000
 +#define QSB_RATE	225000000
@@ -30,33 +30,29 @@ Signed-off-by: Christian Marangi <[email protected]>
  
  static unsigned int sec_mux_map[] = {
  	2,
-@@ -317,7 +319,7 @@ static int krait_cc_probe(struct platfor
+@@ -350,7 +352,7 @@ static int krait_cc_probe(struct platfor
  {
  	struct device *dev = &pdev->dev;
  	const struct of_device_id *id;
--	unsigned long cur_rate, aux_rate, qsb_rate, pxo_rate;
-+	unsigned long cur_rate, qsb_rate, pxo_rate;
+-	unsigned long cur_rate, aux_rate, qsb_rate;
++	unsigned long cur_rate, qsb_rate;
  	int cpu;
- 	struct clk *clk;
- 	struct clk **clks;
-@@ -397,36 +399,30 @@ static int krait_cc_probe(struct platfor
+ 	struct clk_hw *mux, *l2_pri_mux;
+ 	struct clk *clk, **clks;
+@@ -420,28 +422,29 @@ static int krait_cc_probe(struct platfor
  	 * two different rates to force a HFPLL reinit under all
  	 * circumstances.
  	 */
--	cur_rate = clk_get_rate(l2_pri_mux_clk);
+-	cur_rate = clk_get_rate(clks[l2_mux]);
 -	aux_rate = 384000000;
--	if (cur_rate == qsb_rate) {
--		dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n");
--		cur_rate = aux_rate;
--	}
--	if (cur_rate == pxo_rate) {
--		dev_info(dev, "L2 @ PXO rate. Forcing new rate.\n");
+-	if (cur_rate < aux_rate) {
+-		dev_info(dev, "L2 @ Undefined rate. Forcing new rate.\n");
 -		cur_rate = aux_rate;
 -	}
--	clk_set_rate(l2_pri_mux_clk, aux_rate);
--	clk_set_rate(l2_pri_mux_clk, 2);
--	clk_set_rate(l2_pri_mux_clk, cur_rate);
--	dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
+-	clk_set_rate(clks[l2_mux], aux_rate);
+-	clk_set_rate(clks[l2_mux], 2);
+-	clk_set_rate(clks[l2_mux], cur_rate);
+-	dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000);
 -	for_each_possible_cpu(cpu) {
 +	for (cpu = 0; cpu < 5; cpu++) {
 +		const char *l2_s = "L2";
@@ -70,17 +66,12 @@ Signed-off-by: Christian Marangi <[email protected]>
 +			snprintf(cpu_s, 5, "CPU%d", cpu);
 +
  		cur_rate = clk_get_rate(clk);
--		if (cur_rate == qsb_rate) {
--			dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu);
--			cur_rate = aux_rate;
--		}
--		if (cur_rate ==pxo_rate) {
--			dev_info(dev, "CPU%d @ PXO rate. Forcing new rate.\n", cpu);
+-		if (cur_rate < aux_rate) {
+-			dev_info(dev, "CPU%d @ Undefined rate. Forcing new rate.\n", cpu);
 -			cur_rate = aux_rate;
-+		if (cur_rate == qsb_rate || cur_rate == pxo_rate) {
-+			dev_info(dev, "%s @ %s rate. Forcing new rate.\n",
-+				 cpu < 4 ? cpu_s : l2_s,
-+				 cur_rate == qsb_rate ? "QSB" : "PXO");
++		if (cur_rate < AUX_RATE) {
++			dev_info(dev, "%s @ Undefined rate. Forcing new rate.\n",
++				 cpu < 4 ? cpu_s : l2_s);
 +			cur_rate = AUX_RATE;
  		}
  

target/linux/ipq806x/patches-5.15/122-02-clk-qcom-clk-krait-generilize-div-functions.patch → target/linux/ipq806x/patches-5.15/122-05-clk-qcom-clk-krait-generilize-div-functions.patch

@@ -130,8 +130,8 @@ Signed-off-by: Christian Marangi <[email protected]>
  #endif
 --- a/drivers/clk/qcom/krait-cc.c
 +++ b/drivers/clk/qcom/krait-cc.c
-@@ -76,11 +76,11 @@ static int krait_notifier_register(struc
- static struct clk *
+@@ -86,11 +86,11 @@ static int krait_notifier_register(struc
+ static struct clk_hw *
  krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
  {
 -	struct krait_div2_clk *div;
@@ -143,8 +143,8 @@ Signed-off-by: Christian Marangi <[email protected]>
 +		.ops = &krait_div_clk_ops,
  		.flags = CLK_SET_RATE_PARENT,
  	};
- 	struct clk *clk;
-@@ -90,7 +90,8 @@ krait_add_div(struct device *dev, int id
+ 	struct clk_hw *clk;
+@@ -101,7 +101,8 @@ krait_add_div(struct device *dev, int id
  	if (!div)
  		return ERR_PTR(-ENOMEM);
  

target/linux/ipq806x/patches-5.15/130-mtd-nand-raw-qcom_nandc-handle-ret-from-parse-with-c.patch → target/linux/ipq806x/patches-5.15/130-6.1-mtd-rawnand-qcom-handle-ret-from-parse-with-codeword.patch

@@ -1,8 +1,7 @@
-From 99d897e04c0856188e371e60b00e13106cd44a24 Mon Sep 17 00:00:00 2001
+From 7df140e84a75c89962feef659d686303d3ce75e5 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <[email protected]>
-Date: Fri, 21 Oct 2022 18:38:21 +0200
-Subject: [PATCH] mtd: nand: raw: qcom_nandc: handle ret from parse with
- codeword_fixup
+Date: Fri, 21 Oct 2022 18:53:04 +0200
+Subject: [PATCH] mtd: rawnand: qcom: handle ret from parse with codeword_fixup
 
 With use_codeword_fixup enabled, any return from
 mtd_device_parse_register gets overwritten. Aside from the clear bug, this
@@ -22,6 +21,8 @@ any error from this function is not ignored.
 Fixes: 862bdedd7f4b ("mtd: nand: raw: qcom_nandc: add support for unprotected spare data pages")
 Cc: [email protected] # v6.0+
 Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Miquel Raynal <[email protected]>
+Link: https://lore.kernel.org/linux-mtd/[email protected]
 ---
  drivers/mtd/nand/raw/qcom_nandc.c | 12 +++++++-----
  1 file changed, 7 insertions(+), 5 deletions(-)

target/linux/ipq806x/patches-5.15/131-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch → target/linux/ipq806x/patches-5.15/131-6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch

@@ -1,6 +1,6 @@
-From f7b300f770683cd063f922e43fa4ad818761c1fb Mon Sep 17 00:00:00 2001
+From c9713e4ede1e5d044b64fe4d3cbb84223625637f Mon Sep 17 00:00:00 2001
 From: Christian Marangi <[email protected]>
-Date: Sat, 22 Oct 2022 16:55:21 +0200
+Date: Tue, 25 Oct 2022 01:38:17 +0200
 Subject: [PATCH] ARM: dts: qcom: ipq8064: disable mmc-ddr-1_8v for sdcc1
 
 It was reported non working mmc with this option enabled.
@@ -10,6 +10,8 @@ Disable it to restore correct functionality of this SoC feature.
 
 Tested-by: Hendrik Koerner <[email protected]>
 Signed-off-by: Christian Marangi <[email protected]>
+Signed-off-by: Bjorn Andersson <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
 ---
  arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 -
  1 file changed, 1 deletion(-)