|
|
@@ -0,0 +1,140 @@
|
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
+
|
|
|
+#include "mt7628an_teltonika_rut9xx.dtsi"
|
|
|
+
|
|
|
+/ {
|
|
|
+ compatible = "teltonika,rut976", "mediatek,mt7628an-soc";
|
|
|
+ model = "Teltonika RUT976";
|
|
|
+
|
|
|
+ gpio-export {
|
|
|
+ gpio_dcd {
|
|
|
+ gpio-export,name = "dcd";
|
|
|
+ gpio-export,output = <0>;
|
|
|
+ gpios = <&gpio_hc595 14 GPIO_ACTIVE_HIGH>;
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio_din2 {
|
|
|
+ gpio-export,name = "digital_input2";
|
|
|
+ gpio-export,input = <0>;
|
|
|
+ gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio_output2 {
|
|
|
+ gpio-export,name = "digital_output2";
|
|
|
+ gpio-export,output = <0>;
|
|
|
+ gpios = <&gpio_hc595 8 GPIO_ACTIVE_HIGH>;
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio_relay {
|
|
|
+ gpio-export,name = "relay";
|
|
|
+ gpio-export,output = <0>;
|
|
|
+ gpios = <&gpio_hc595 9 GPIO_ACTIVE_HIGH>;
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio_rs485_rx_en {
|
|
|
+ gpio-export,name = "rs485_rx_enable";
|
|
|
+ gpio-export,output = <0>;
|
|
|
+ gpios = <&gpio_hc595 13 GPIO_ACTIVE_HIGH>;
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio_rs485_tx_en {
|
|
|
+ gpio-export,name = "rs485_tx_enable";
|
|
|
+ gpio-export,output = <0>;
|
|
|
+ gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
|
|
|
+ };
|
|
|
+
|
|
|
+ gpio_isolated_input {
|
|
|
+ gpio-export,name = "isolated_input";
|
|
|
+ gpio-export,input = <0>;
|
|
|
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&spi0 {
|
|
|
+ status = "okay";
|
|
|
+
|
|
|
+ flash@0 {
|
|
|
+ compatible = "jedec,spi-nor";
|
|
|
+ reg = <0>;
|
|
|
+ spi-max-frequency = <10000000>;
|
|
|
+
|
|
|
+ partitions {
|
|
|
+ compatible = "fixed-partitions";
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+
|
|
|
+ partition@0 {
|
|
|
+ label = "u-boot";
|
|
|
+ reg = <0x0 0x40000>;
|
|
|
+ read-only;
|
|
|
+ };
|
|
|
+
|
|
|
+ partition@40000 {
|
|
|
+ label = "config";
|
|
|
+ reg = <0x040000 0x010000>;
|
|
|
+ read-only;
|
|
|
+
|
|
|
+ nvmem-layout {
|
|
|
+ compatible = "fixed-layout";
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+
|
|
|
+ macaddr_config_0: macaddr@0 {
|
|
|
+ reg = <0x0 0x6>;
|
|
|
+ compatible = "mac-base";
|
|
|
+ #nvmem-cell-cells = <1>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ partition@50000 {
|
|
|
+ label = "factory";
|
|
|
+ reg = <0x050000 0x030000>;
|
|
|
+ read-only;
|
|
|
+
|
|
|
+ nvmem-layout {
|
|
|
+ compatible = "fixed-layout";
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+
|
|
|
+ eeprom_factory_0: eeprom@0 {
|
|
|
+ reg = <0x20000 0x400>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ partition@80000 {
|
|
|
+ compatible = "denx,uimage";
|
|
|
+ label = "firmware";
|
|
|
+ reg = <0x080000 0x1ed0000>;
|
|
|
+ };
|
|
|
+
|
|
|
+ partition@1f50000 {
|
|
|
+ label = "event-log";
|
|
|
+ reg = <0x1f50000 0xb0000>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&i2c {
|
|
|
+ status = "okay";
|
|
|
+ hwmon@4d {
|
|
|
+ compatible = "mcp3221";
|
|
|
+ reg = <0x4d>;
|
|
|
+ reference-voltage-microvolt = <3300000>;
|
|
|
+ };
|
|
|
+
|
|
|
+ hwmon@48 {
|
|
|
+ compatible = "ti,tla2021";
|
|
|
+ reg = <0x48>;
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&uart1 {
|
|
|
+ linux,rs485-enabled-at-boot-time;
|
|
|
+ rs485-rts-delay = <0 0>;
|
|
|
+ rs485-rx-during-tx;
|
|
|
+ status = "okay";
|
|
|
+};
|