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@@ -60,7 +60,28 @@ static irqreturn_t gsw_interrupt_mt7620(int irq, void *_priv)
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return IRQ_HANDLED;
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}
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-static void mt7620_hw_init(struct mt7620_gsw *gsw, struct device_node *np)
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+static int mt7620_mdio_mode(struct device_node *eth_node)
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+{
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+ struct device_node *phy_node, *mdiobus_node;
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+ const __be32 *id;
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+ int ret = 0;
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+
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+ mdiobus_node = of_get_child_by_name(eth_node, "mdio-bus");
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+
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+ if (mdiobus_node) {
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+ for_each_child_of_node(mdiobus_node, phy_node) {
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+ id = of_get_property(phy_node, "reg", NULL);
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+ if (id && (be32_to_cpu(*id) == 0x1f))
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+ ret = 1;
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+ }
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+
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+ of_node_put(mdiobus_node);
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+ }
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+
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+ return ret;
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+}
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+
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+static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
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{
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u32 is_BGA = (rt_sysc_r32(0x0c) >> 16) & 1;
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@@ -70,7 +91,7 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, struct device_node *np)
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/* Enable MIB stats */
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mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_MIB_CNT_EN) | (1 << 1), GSW_REG_MIB_CNT_EN);
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- if (of_property_read_bool(np, "mediatek,mt7530")) {
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+ if (mdio_mode) {
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u32 val;
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/* turn off ephy and set phy base addr to 12 */
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@@ -192,7 +213,7 @@ int mtk_gsw_init(struct fe_priv *priv)
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gsw = platform_get_drvdata(pdev);
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priv->soc->swpriv = gsw;
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- mt7620_hw_init(gsw, np);
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+ mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node));
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if (gsw->irq) {
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request_irq(gsw->irq, gsw_interrupt_mt7620, 0,
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