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@@ -155,58 +155,64 @@
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reg = <0>;
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reg = <0>;
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spi-max-frequency = <24000000>;
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spi-max-frequency = <24000000>;
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- SBL1@0 {
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- label = "SBL1";
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- reg = <0x0 0x40000>;
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- read-only;
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- };
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-
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- MIBIB@40000 {
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- label = "MIBIB";
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- reg = <0x40000 0x20000>;
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- read-only;
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- };
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-
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- QSEE@60000 {
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- label = "QSEE";
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- reg = <0x60000 0x60000>;
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- read-only;
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- };
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-
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- CDT@c0000 {
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- label = "CDT";
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- reg = <0xc0000 0x10000>;
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- read-only;
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- };
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-
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- DDRPARAMS@d0000 {
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- label = "DDRPARAMS";
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- reg = <0xd0000 0x10000>;
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- read-only;
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- };
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-
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- APPSBLENV@e0000 {
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- label = "APPSBLENV";
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- reg = <0xe0000 0x10000>;
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- read-only;
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- };
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-
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- APPSBL@f0000 {
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- label = "APPSBL";
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- reg = <0xf0000 0x80000>;
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- read-only;
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- };
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-
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- ART@170000 {
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- label = "ART";
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- reg = <0x170000 0x10000>;
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- read-only;
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- };
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-
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- firmware@180000 {
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- compatible = "denx,fit";
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- label = "firmware";
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- reg = <0x180000 0x1e80000>;
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ SBL1@0 {
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+ label = "SBL1";
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+ reg = <0x0 0x40000>;
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+ read-only;
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+ };
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+
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+ MIBIB@40000 {
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+ label = "MIBIB";
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+ reg = <0x40000 0x20000>;
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+ read-only;
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+ };
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+
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+ QSEE@60000 {
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+ label = "QSEE";
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+ reg = <0x60000 0x60000>;
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+ read-only;
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+ };
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+
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+ CDT@c0000 {
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+ label = "CDT";
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+ reg = <0xc0000 0x10000>;
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+ read-only;
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+ };
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+
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+ DDRPARAMS@d0000 {
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+ label = "DDRPARAMS";
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+ reg = <0xd0000 0x10000>;
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+ read-only;
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+ };
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+
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+ APPSBLENV@e0000 {
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+ label = "APPSBLENV";
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+ reg = <0xe0000 0x10000>;
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+ read-only;
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+ };
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+
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+ APPSBL@f0000 {
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+ label = "APPSBL";
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+ reg = <0xf0000 0x80000>;
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+ read-only;
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+ };
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+
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+ ART@170000 {
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+ label = "ART";
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+ reg = <0x170000 0x10000>;
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+ read-only;
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+ };
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+
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+ firmware@180000 {
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+ compatible = "denx,fit";
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+ label = "firmware";
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+ reg = <0x180000 0x1e80000>;
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+ };
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};
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};
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};
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};
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};
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};
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