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@@ -43,7 +43,7 @@
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#ifdef MODULE
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#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
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MODULE_PARM(major_number, "b");
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-@@ -1783,7 +1787,9 @@ static int __init MEI_module_init (void)
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+@@ -1798,7 +1802,9 @@ static int __init MEI_module_init (void)
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return (result);
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}
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@@ -53,7 +53,7 @@
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return 0;
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}
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-@@ -1907,6 +1913,10 @@ static void MEI_module_exit (void)
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+@@ -1922,6 +1928,10 @@ static void MEI_module_exit (void)
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#else
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unregister_chrdev ( major_number , DRV_MEI_NAME );
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@@ -64,7 +64,7 @@
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#endif
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#if CONFIG_PROC_FS
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-@@ -1963,7 +1973,9 @@ static void MEI_module_exit (void)
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+@@ -1978,7 +1988,9 @@ static void MEI_module_exit (void)
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("MEI_DRV: Chipset Basic Exit failed" MEI_DRV_CRLF));
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}
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@@ -74,7 +74,7 @@
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/* touch one time this variable to avoid that the linker will remove it */
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debug_level = MEI_DRV_PRN_LEVEL_OFF;
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-@@ -2080,6 +2092,10 @@ static int MEI_InitModuleRegCharDev(cons
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+@@ -2095,6 +2107,10 @@ static int MEI_InitModuleRegCharDev(cons
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("Using major number %d" MEI_DRV_CRLF, major_number));
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}
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@@ -85,7 +85,7 @@
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return 0;
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#endif /* CONFIG_DEVFS_FS */
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}
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-@@ -2120,21 +2136,32 @@ static int MEI_InitModuleBasics(void)
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+@@ -2135,21 +2151,32 @@ static int MEI_InitModuleBasics(void)
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}
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0))
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@@ -118,7 +118,7 @@
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return 0;
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}
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-@@ -2454,11 +2481,15 @@ IFX_int32_t MEI_IoctlInitDevice(
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+@@ -2469,11 +2496,15 @@ IFX_int32_t MEI_IoctlInitDevice(
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pMeiDev->eModePoll = e_MEI_DEV_ACCESS_MODE_IRQ;
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pMeiDev->intMask = ME_ARC2ME_INTERRUPT_UNMASK_ALL;
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@@ -146,7 +146,7 @@
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+int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL;
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+int (*ifx_mei_atm_showtime_exit)(void) = NULL;
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+
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-+ltq_ifx_mei_atm_showtime_enter_compat(IFX_uint8_t dslLineNum,
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++int ltq_ifx_mei_atm_showtime_enter_compat(IFX_uint8_t dslLineNum,
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+ struct port_cell_info *cellInfo,
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+ void *xdata) {
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+ if (ifx_mei_atm_showtime_enter)
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@@ -155,7 +155,7 @@
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+ return -e_MEI_ERR_OP_FAILED;
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+}
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+
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-+ltq_ifx_mei_atm_showtime_exit_compat(IFX_uint8_t dslLineNum) {
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++int ltq_ifx_mei_atm_showtime_exit_compat(IFX_uint8_t dslLineNum) {
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+ if (ifx_mei_atm_showtime_exit)
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+ return ifx_mei_atm_showtime_exit();
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+
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@@ -198,11 +198,12 @@
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#if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
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-@@ -42,8 +41,20 @@ extern IFX_int32_t MEI_InternalXtmSwhowt
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+@@ -42,8 +41,21 @@ extern IFX_int32_t MEI_InternalXtmSwhowt
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MEI_DYN_CNTRL_T *pMeiDynCntrl,
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MEI_XTM_ShowtimeExit_t *pArgXtm);
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+#if 1
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++#include <lantiq_atm.h>
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+typedef enum {
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+ LTQ_MEI_SHOWTIME_ENTER,
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+ LTQ_MEI_SHOWTIME_EXIT
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@@ -221,9 +222,9 @@
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const unsigned char line_idx,
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--- a/src/drv_mei_cpe_device_vrx.c
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+++ b/src/drv_mei_cpe_device_vrx.c
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-@@ -27,13 +27,6 @@
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- #include "drv_mei_cpe_mei_interface.h"
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+@@ -28,13 +28,6 @@
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#include "drv_mei_cpe_api.h"
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+ #include "drv_mei_cpe_mei_vrx.h"
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-#if defined(LINUX)
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-# if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
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@@ -235,7 +236,7 @@
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IFX_int32_t MEI_GPIntProcess(MEI_MeiRegVal_t processInt, MEI_DEV_T *pMeiDev)
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{
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-@@ -81,6 +74,7 @@ IFX_int32_t MEI_GetChipInfo(MEI_DEV_T *p
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+@@ -82,6 +75,7 @@ IFX_int32_t MEI_GetChipInfo(MEI_DEV_T *p
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*/
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IFX_int32_t MEI_VR10_PcieEntitiesCheck(IFX_uint8_t nEntityNum)
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{
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@@ -243,7 +244,7 @@
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IFX_uint32_t pcie_entitiesNum;
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/* get information from pcie driver */
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-@@ -101,6 +95,9 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
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+@@ -102,6 +96,9 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
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}
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return IFX_SUCCESS;
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@@ -253,7 +254,7 @@
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}
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/**
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-@@ -115,6 +112,7 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
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+@@ -116,6 +113,7 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
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*/
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IFX_int32_t MEI_VR10_PcieEntityInit(MEI_MEI_DRV_CNTRL_T *pMeiDrvCntrl)
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{
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@@ -261,7 +262,7 @@
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IFX_uint8_t entityNum;
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ifx_pcie_ep_dev_t MEI_pcie_ep_dev;
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-@@ -137,6 +135,9 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
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+@@ -138,6 +136,9 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
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pMeiDrvCntrl->MEI_pcie_irq = MEI_pcie_ep_dev.irq;
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return IFX_SUCCESS;
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@@ -271,7 +272,7 @@
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}
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/**
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-@@ -151,6 +152,7 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
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+@@ -152,6 +153,7 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
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*/
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IFX_int32_t MEI_VR10_PcieEntityFree(IFX_uint8_t entityNum)
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{
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@@ -279,7 +280,7 @@
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if (ifx_pcie_ep_dev_info_release(entityNum))
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{
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PRN_ERR_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_ERR,
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-@@ -160,6 +162,9 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
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+@@ -161,6 +163,9 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
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}
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return IFX_SUCCESS;
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@@ -289,7 +290,7 @@
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}
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/**
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-@@ -174,6 +179,7 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
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+@@ -175,6 +180,7 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
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*/
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IFX_int32_t MEI_VR10_InternalInitDevice(MEI_DYN_CNTRL_T *pMeiDynCntrl)
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{
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@@ -297,7 +298,7 @@
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IFX_int32_t retVal;
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IOCTL_MEI_devInit_t InitDev;
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MEI_DEV_T *pMeiDev = pMeiDynCntrl->pMeiDev;
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-@@ -198,5 +204,8 @@ IFX_int32_t MEI_VR10_InternalInitDevice(
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+@@ -199,6 +205,9 @@ IFX_int32_t MEI_VR10_InternalInitDevice(
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*MEI_GPIO_U32REG(GPIO_P0_ALSEL1) &= ~((1 << 0) | (1 << 3) | (1 << 8));
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return IFX_SUCCESS;
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@@ -306,3 +307,4 @@
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+#endif
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}
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+ IFX_int32_t MEI_PLL_ConfigInit(MEI_DEV_T *pMeiDev)
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