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@@ -0,0 +1,170 @@
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+From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
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+From: Pawel Dembicki <[email protected]>
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+Date: Sun, 30 Dec 2018 23:24:41 +0100
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+Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT
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+
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+This patch apply chages for OpenWRT in P2020RDB
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+dts file.
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+
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+Signed-off-by: Pawel Dembicki <[email protected]>
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+---
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+ arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
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+ 1 file changed, 63 insertions(+), 35 deletions(-)
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+
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+--- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
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++++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
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+@@ -2,6 +2,7 @@
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+ * P2020 RDB Device Tree Source
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+ *
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+ * Copyright 2009-2012 Freescale Semiconductor Inc.
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++ * Copyright 2018 Pawel Dembicki <[email protected]>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+@@ -9,10 +10,15 @@
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+ * option) any later version.
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+ */
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+
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++/dts-v1/;
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++
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+ /include/ "p2020si-pre.dtsi"
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+
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++#include <dt-bindings/gpio/gpio.h>
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++#include <dt-bindings/input/input.h>
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++
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+ / {
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+- model = "fsl,P2020RDB";
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++ model = "Freescale P2020RDB";
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+ compatible = "fsl,P2020RDB";
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+
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+ aliases {
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+@@ -38,48 +44,38 @@
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+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
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+
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+ nor@0,0 {
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+- #address-cells = <1>;
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+- #size-cells = <1>;
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+ compatible = "cfi-flash";
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+ reg = <0x0 0x0 0x1000000>;
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+ bank-width = <2>;
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+ device-width = <1>;
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+
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+- partition@0 {
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+- /* This location must not be altered */
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+- /* 256KB for Vitesse 7385 Switch firmware */
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+- reg = <0x0 0x00040000>;
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+- label = "NOR (RO) Vitesse-7385 Firmware";
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+- read-only;
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+- };
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+-
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+- partition@40000 {
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+- /* 256KB for DTB Image */
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+- reg = <0x00040000 0x00040000>;
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+- label = "NOR (RO) DTB Image";
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+- read-only;
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+- };
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++ partitions {
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++ compatible = "fixed-partitions";
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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+
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+- partition@80000 {
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+- /* 3.5 MB for Linux Kernel Image */
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+- reg = <0x00080000 0x00380000>;
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+- label = "NOR (RO) Linux Kernel Image";
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+- read-only;
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+- };
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++ partition@0 {
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++ /* This location must not be altered */
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++ /* 256KB for Vitesse 7385 Switch firmware */
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++ reg = <0x0 0x00040000>;
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++ label = "NOR (RO) Vitesse-7385 Firmware";
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++ read-only;
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++ };
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+
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+- partition@400000 {
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+- /* 11MB for JFFS2 based Root file System */
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+- reg = <0x00400000 0x00b00000>;
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+- label = "NOR (RW) JFFS2 Root File System";
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+- };
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++ partition@40000 {
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++ compatible = "denx,fit";
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++ reg = <0x00040000 0x00ec0000>;
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++ label = "firmware";
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++ };
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+
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+- partition@f00000 {
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+- /* This location must not be altered */
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+- /* 512KB for u-boot Bootloader Image */
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+- /* 512KB for u-boot Environment Variables */
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+- reg = <0x00f00000 0x00100000>;
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+- label = "NOR (RO) U-Boot Image";
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+- read-only;
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++ partition@f00000 {
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++ /* This location must not be altered */
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++ /* 512KB for u-boot Bootloader Image */
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++ /* 512KB for u-boot Environment Variables */
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++ reg = <0x00f00000 0x00100000>;
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++ label = "u-boot";
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++ read-only;
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++ };
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+ };
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+ };
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+
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+@@ -144,13 +140,43 @@
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+ soc: soc@ffe00000 {
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+ ranges = <0x0 0x0 0xffe00000 0x100000>;
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+
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++ gpio0: gpio-controller@fc00 {
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++ };
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++
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+ i2c@3000 {
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++ temperature-sensor@4c {
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++ compatible = "adi,adt7461";
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++ reg = <0x4c>;
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++ };
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++
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++ eeprom@50 {
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++ compatible = "atmel,24c256";
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++ reg = <0x50>;
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++ };
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++
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+ rtc@68 {
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+ compatible = "dallas,ds1339";
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+ reg = <0x68>;
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+ };
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+ };
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+
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++ i2c@3100 {
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++ pmic@11 {
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++ compatible = "zl2006";
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++ reg = <0x11>;
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++ };
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++
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++ gpio@18 {
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++ compatible = "nxp,pca9557";
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++ reg = <0x18>;
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++ };
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++
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++ eeprom@52 {
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++ compatible = "atmel,24c01";
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++ reg = <0x52>;
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++ };
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++ };
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++
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+ spi@7000 {
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+ flash@0 {
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+ #address-cells = <1>;
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+@@ -204,10 +230,12 @@
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+ phy0: ethernet-phy@0 {
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+ interrupts = <3 1 0 0>;
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+ reg = <0x0>;
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++ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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+ };
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+ phy1: ethernet-phy@1 {
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+ interrupts = <3 1 0 0>;
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+ reg = <0x1>;
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++ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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+ };
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+ tbi-phy@2 {
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+ device_type = "tbi-phy";
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Pawel Dembicki