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atheros: update macroses names

Use AR2315_ prefix for macroses specific to AR2315/AR2316/AR2317 chips,
use AR5312_ prefix for macroses specific to AR5312/AR2312/AR2313 chips,
and use AR231X_ prefix for common macroses.

This patch should not cause any functional changes, only make clear
which macros is common and which macros is specific.

Signed-off-by: Sergey Ryazanov <[email protected]>

SVN-Revision: 41701
Felix Fietkau 11 years ago
parent
commit
5e0bd41bbe

File diff suppressed because it is too large
+ 263 - 263
target/linux/atheros/patches-3.10/100-board.patch


+ 1 - 1
target/linux/atheros/patches-3.10/101-early-printk-support.patch

@@ -37,7 +37,7 @@
 +		if (is_2315())
 +		if (is_2315())
 +			base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
 +			base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
 +		else
 +		else
-+			base = (void __iomem *)(KSEG1ADDR(AR531X_UART0));
++			base = (void __iomem *)(KSEG1ADDR(AR5312_UART0));
 +	}
 +	}
 +
 +
 +	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
 +	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)

+ 11 - 11
target/linux/atheros/patches-3.10/105-ar2315_pci.patch

@@ -39,9 +39,9 @@
 +#include <ar2315_regs.h>
 +#include <ar2315_regs.h>
 +#include "devices.h"
 +#include "devices.h"
 +
 +
-+#define AR531X_MEM_BASE    0x80800000UL
-+#define AR531X_MEM_SIZE    0x00ffffffUL
-+#define AR531X_IO_SIZE     0x00007fffUL
++#define AR2315_MEM_BASE    0x80800000UL
++#define AR2315_MEM_SIZE    0x00ffffffUL
++#define AR2315_IO_SIZE     0x00007fffUL
 +
 +
 +static unsigned long configspace;
 +static unsigned long configspace;
 +
 +
@@ -114,17 +114,17 @@
 +};
 +};
 +
 +
 +static struct resource ar231x_mem_resource = {
 +static struct resource ar231x_mem_resource = {
-+	.name	= "AR531x PCI MEM",
-+	.start	= AR531X_MEM_BASE,
-+	.end	= AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 +
++	.name	= "AR2315 PCI MEM",
++	.start	= AR2315_MEM_BASE,
++	.end	= AR2315_MEM_BASE + AR2315_MEM_SIZE - AR2315_IO_SIZE - 1 +
 +		  0x4000000,
 +		  0x4000000,
 +	.flags	= IORESOURCE_MEM,
 +	.flags	= IORESOURCE_MEM,
 +};
 +};
 +
 +
 +static struct resource ar231x_io_resource = {
 +static struct resource ar231x_io_resource = {
-+	.name	= "AR531x PCI I/O",
-+	.start	= AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE,
-+	.end	= AR531X_MEM_BASE + AR531X_MEM_SIZE - 1,
++	.name	= "AR2315 PCI I/O",
++	.start	= AR2315_MEM_BASE + AR2315_MEM_SIZE - AR2315_IO_SIZE,
++	.end	= AR2315_MEM_BASE + AR2315_MEM_SIZE - 1,
 +	.flags	= IORESOURCE_IO,
 +	.flags	= IORESOURCE_IO,
 +};
 +};
 +
 +
@@ -193,8 +193,8 @@
 +	configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT,
 +	configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT,
 +						      1*1024*1024);
 +						      1*1024*1024);
 +	ar231x_pci_controller.io_map_base =
 +	ar231x_pci_controller.io_map_base =
-+			(unsigned long) ioremap_nocache(AR531X_MEM_BASE +
-+			AR531X_MEM_SIZE, AR531X_IO_SIZE);
++			(unsigned long) ioremap_nocache(AR2315_MEM_BASE +
++			AR2315_MEM_SIZE, AR2315_IO_SIZE);
 +	set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space*/
 +	set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space*/
 +
 +
 +	reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
 +	reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);

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