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@@ -0,0 +1,42 @@
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+--- a/drivers/gpio/gpio-ralink.c
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++++ b/drivers/gpio/gpio-ralink.c
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+@@ -148,14 +148,15 @@
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+ {
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+ struct ralink_gpio_chip *rg;
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+ unsigned long flags;
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+- u32 val;
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++ u32 rise, fall;
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+
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+ rg = (struct ralink_gpio_chip *) d->domain->host_data;
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+- val = rt_gpio_r32(rg, GPIO_REG_RENA);
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++ rise = rt_gpio_r32(rg, GPIO_REG_RENA);
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++ fall = rt_gpio_r32(rg, GPIO_REG_FENA);
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+
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+ spin_lock_irqsave(&rg->lock, flags);
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+- rt_gpio_w32(rg, GPIO_REG_RENA, val | (BIT(d->hwirq) & rg->rising));
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+- rt_gpio_w32(rg, GPIO_REG_FENA, val | (BIT(d->hwirq) & rg->falling));
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++ rt_gpio_w32(rg, GPIO_REG_RENA, rise | (BIT(d->hwirq) & rg->rising));
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++ rt_gpio_w32(rg, GPIO_REG_FENA, fall | (BIT(d->hwirq) & rg->falling));
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+ spin_unlock_irqrestore(&rg->lock, flags);
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+ }
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+
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+@@ -163,14 +164,15 @@
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+ {
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+ struct ralink_gpio_chip *rg;
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+ unsigned long flags;
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+- u32 val;
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++ u32 rise, fall;
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+
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+ rg = (struct ralink_gpio_chip *) d->domain->host_data;
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+- val = rt_gpio_r32(rg, GPIO_REG_RENA);
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++ rise = rt_gpio_r32(rg, GPIO_REG_RENA);
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++ fall = rt_gpio_r32(rg, GPIO_REG_FENA);
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+
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+ spin_lock_irqsave(&rg->lock, flags);
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+- rt_gpio_w32(rg, GPIO_REG_FENA, val & ~BIT(d->hwirq));
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+- rt_gpio_w32(rg, GPIO_REG_RENA, val & ~BIT(d->hwirq));
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++ rt_gpio_w32(rg, GPIO_REG_FENA, fall & ~BIT(d->hwirq));
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++ rt_gpio_w32(rg, GPIO_REG_RENA, rise & ~BIT(d->hwirq));
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+ spin_unlock_irqrestore(&rg->lock, flags);
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+ }
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+
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