kernel: update bcma and ssb to wireless-testing master-2013-09-09

SVN-Revision: 37957

target/linux/bcm53xx/patches-3.10/101-bcma-add-some-more-core-names.patch

@@ -1,73 +0,0 @@
-bcma: add some more core names
-
-These cores were found on a BCM4708 (chipid 53010), this is a ARM SoC
-with two Cortex A9 cores.
-
-bcma: bus0: Found chip with id 0xCF12, rev 0x00 and package 0x02
-bcma: bus0: Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x2A, class 0x0)
-bcma: bus0: Core 1 found: DMA (manuf 0x4BF, id 0x502, rev 0x01, class 0x0)
-bcma: bus0: Core 2 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
-bcma: bus0: Core 3 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
-bcma: bus0: Core 4 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
-bcma: bus0: Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
-bcma: bus0: Core 6 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x01, class 0x0)
-bcma: bus0: Core 7 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x01, class 0x0)
-bcma: bus0: Core 8 found: ARM Cortex A9 core (ihost) (manuf 0x4BF, id 0x510, rev 0x01, class 0x0)
-bcma: bus0: Core 9 found: USB 2.0 (manuf 0x4BF, id 0x504, rev 0x01, class 0x0)
-bcma: bus0: Core 10 found: USB 3.0 (manuf 0x4BF, id 0x505, rev 0x01, class 0x0)
-bcma: bus0: Core 11 found: SDIO3 (manuf 0x4BF, id 0x503, rev 0x01, class 0x0)
-bcma: bus0: Core 12 found: ARM Cortex A9 JTAG (manuf 0x4BF, id 0x506, rev 0x01, class 0x0)
-bcma: bus0: Core 13 found: Denali DDR2/DDR3 memory controller (manuf 0x4BF, id 0x507, rev 0x01, class 0x0)
-bcma: bus0: Core 14 found: ROM (manuf 0x4BF, id 0x508, rev 0x01, class 0x0)
-bcma: bus0: Core 15 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01, class 0x0)
-bcma: bus0: Core 16 found: SPI flash controller (manuf 0x4BF, id 0x50A, rev 0x01, class 0x0)
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
----
- drivers/bcma/scan.c       |   12 ++++++++++++
- include/linux/bcma/bcma.h |   12 ++++++++++++
- 2 files changed, 24 insertions(+)
-
---- a/drivers/bcma/scan.c
-+++ b/drivers/bcma/scan.c
-@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
- 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
- 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
- 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
-+	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
-+	{ BCMA_CORE_DMA, "DMA" },
-+	{ BCMA_CORE_SDIO3, "SDIO3" },
-+	{ BCMA_CORE_USB20, "USB 2.0" },
-+	{ BCMA_CORE_USB30, "USB 3.0" },
-+	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
-+	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
-+	{ BCMA_CORE_ROM, "ROM" },
-+	{ BCMA_CORE_NAND, "NAND flash controller" },
-+	{ BCMA_CORE_QSPI, "SPI flash controller" },
-+	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
-+	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
- 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
- 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
- 	{ BCMA_CORE_INVALID, "Invalid" },
---- a/include/linux/bcma/bcma.h
-+++ b/include/linux/bcma/bcma.h
-@@ -72,7 +72,19 @@ struct bcma_host_ops {
- /* Core-ID values. */
- #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
- #define BCMA_CORE_4706_CHIPCOMMON	0x500
-+#define BCMA_CORE_PCIEG2		0x501
-+#define BCMA_CORE_DMA			0x502
-+#define BCMA_CORE_SDIO3			0x503
-+#define BCMA_CORE_USB20			0x504
-+#define BCMA_CORE_USB30			0x505
-+#define BCMA_CORE_A9JTAG		0x506
-+#define BCMA_CORE_DDR23			0x507
-+#define BCMA_CORE_ROM			0x508
-+#define BCMA_CORE_NAND			0x509
-+#define BCMA_CORE_QSPI			0x50A
-+#define BCMA_CORE_CHIPCOMMON_B		0x50B		/* ChipcommonB core */
- #define BCMA_CORE_4706_SOC_RAM		0x50E
-+#define BCMA_CORE_ARMCA9		0x510
- #define BCMA_CORE_4706_MAC_GBIT		0x52D
- #define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
- #define BCMA_CORE_ALTA			0x534	/* I2S core */

target/linux/bcm53xx/patches-3.10/102-bcma-make-it-possible-to-select-SoC-support-without-.patch

@@ -1,29 +0,0 @@
-bcma: make it possible to select SoC support without mips
-
-To make it possible to use the SoC host interface with ARM SoCs do not
-depend on the MIPS driver any more.
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
----
- drivers/bcma/Kconfig |   10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/bcma/Kconfig
-+++ b/drivers/bcma/Kconfig
-@@ -36,8 +36,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
- 	  PCI core hostmode operation (external PCI bus).
- 
- config BCMA_HOST_SOC
--	bool
--	depends on BCMA_DRIVER_MIPS
-+	bool "Support for BCMA in a SoC"
-+	depends on BCMA
-+	help
-+	  Host interface for a Broadcom AIX bus directly mapped into 
-+	  the memory. This only works with the Broadcom SoCs from the
-+	  BCM47XX line.
-+
-+	  If unsure, say N
- 
- config BCMA_DRIVER_MIPS
- 	bool "BCMA Broadcom MIPS core driver"

target/linux/bcm53xx/patches-3.10/103-bcma-add-constants-for-new-ARM-based-SoCs.patch

@@ -1,23 +0,0 @@
-bcma: add constants for new ARM based SoCs
-
-These are the chipIDs of some ARM based SoCs from the BCM47xx line.
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
----
- include/linux/bcma/bcma.h |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/include/linux/bcma/bcma.h
-+++ b/include/linux/bcma/bcma.h
-@@ -189,6 +189,11 @@ struct bcma_host_ops {
- #define  BCMA_PKG_ID_BCM5357	11
- #define BCMA_CHIP_ID_BCM53572	53572
- #define  BCMA_PKG_ID_BCM47188	9
-+#define BCMA_CHIP_ID_BCM4707	53010
-+#define  BCMA_PKG_ID_BCM4707	1
-+#define  BCMA_PKG_ID_BCM4708	2
-+#define  BCMA_PKG_ID_BCM4709	0
-+#define BCMA_CHIP_ID_BCM53018	53018
- 
- /* Board types (on PCI usually equals to the subsystem dev id) */
- /* BCM4313 */

target/linux/bcm53xx/patches-3.10/104-bcma-return-correct-error-code-when-bus-scan-failed.patch

@@ -1,20 +0,0 @@
-bcma: return correct error code when bus scan failed
-
-It is better to return the actual error code than just -1.
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
----
- drivers/bcma/main.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/bcma/main.c
-+++ b/drivers/bcma/main.c
-@@ -237,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *b
- 	err = bcma_bus_scan(bus);
- 	if (err) {
- 		bcma_err(bus, "Failed to scan: %d\n", err);
--		return -1;
-+		return err;
- 	}
- 
- 	/* Early init CC core */

target/linux/bcm53xx/patches-3.10/105-bcma-fix-handling-of-big-addrl.patch

@@ -1,81 +0,0 @@
-bcma: fix handling of big addrl
-
-The return value of bcma_erom_get_addr_desc() is a unsigned value and it
-could wrap around in the two complement writing. This happens for one
-core in the BCM4708 SoC.
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
----
- drivers/bcma/scan.c |   16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
---- a/drivers/bcma/scan.c
-+++ b/drivers/bcma/scan.c
-@@ -213,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
- 	return ent;
- }
- 
--static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
-+static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
- 				  u32 type, u8 port)
- {
- 	u32 addrl, addrh, sizel, sizeh = 0;
-@@ -225,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
- 	    ((ent & SCAN_ADDR_TYPE) != type) ||
- 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
- 		bcma_erom_push_ent(eromptr);
--		return -EINVAL;
-+		return (u32)-EINVAL;
- 	}
- 
- 	addrl = ent & SCAN_ADDR_ADDR;
-@@ -273,7 +273,7 @@ static int bcma_get_next_core(struct bcm
- 			      struct bcma_device_id *match, int core_num,
- 			      struct bcma_device *core)
- {
--	s32 tmp;
-+	u32 tmp;
- 	u8 i, j;
- 	s32 cia, cib;
- 	u8 ports[2], wrappers[2];
-@@ -351,11 +351,11 @@ static int bcma_get_next_core(struct bcm
- 	 * the main register space for the core
- 	 */
- 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
--	if (tmp <= 0) {
-+	if (tmp == 0 || IS_ERR_VALUE(tmp)) {
- 		/* Try again to see if it is a bridge */
- 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
- 					      SCAN_ADDR_TYPE_BRIDGE, 0);
--		if (tmp <= 0) {
-+		if (tmp == 0 || IS_ERR_VALUE(tmp)) {
- 			return -EILSEQ;
- 		} else {
- 			bcma_info(bus, "Bridge found\n");
-@@ -369,7 +369,7 @@ static int bcma_get_next_core(struct bcm
- 		for (j = 0; ; j++) {
- 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
- 				SCAN_ADDR_TYPE_SLAVE, i);
--			if (tmp < 0) {
-+			if (IS_ERR_VALUE(tmp)) {
- 				/* no more entries for port _i_ */
- 				/* pr_debug("erom: slave port %d "
- 				 * "has %d descriptors\n", i, j); */
-@@ -386,7 +386,7 @@ static int bcma_get_next_core(struct bcm
- 		for (j = 0; ; j++) {
- 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
- 				SCAN_ADDR_TYPE_MWRAP, i);
--			if (tmp < 0) {
-+			if (IS_ERR_VALUE(tmp)) {
- 				/* no more entries for port _i_ */
- 				/* pr_debug("erom: master wrapper %d "
- 				 * "has %d descriptors\n", i, j); */
-@@ -404,7 +404,7 @@ static int bcma_get_next_core(struct bcm
- 		for (j = 0; ; j++) {
- 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
- 				SCAN_ADDR_TYPE_SWRAP, i + hack);
--			if (tmp < 0) {
-+			if (IS_ERR_VALUE(tmp)) {
- 				/* no more entries for port _i_ */
- 				/* pr_debug("erom: master wrapper %d "
- 				 * has %d descriptors\n", i, j); */

target/linux/brcm47xx/patches-3.10/280-activate_ssb_support_in_usb.patch

@@ -7,12 +7,12 @@ This prevents the options from being delete with make kernel_oldconfig.
 +++ b/drivers/bcma/Kconfig
 @@ -38,6 +38,7 @@ config BCMA_DRIVER_PCI_HOSTMODE
  config BCMA_HOST_SOC
- 	bool
- 	depends on BCMA_DRIVER_MIPS
+ 	bool "Support for BCMA in a SoC"
+ 	depends on BCMA
 +	select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
- 
- config BCMA_DRIVER_MIPS
- 	bool "BCMA Broadcom MIPS core driver"
+ 	help
+ 	  Host interface for a Broadcom AIX bus directly mapped into
+ 	  the memory. This only works with the Broadcom SoCs from the
 --- a/drivers/ssb/Kconfig
 +++ b/drivers/ssb/Kconfig
 @@ -146,6 +146,7 @@ config SSB_SFLASH

target/linux/generic/patches-3.10/020-ssb_update.patch

@@ -1,6 +1,13 @@
 --- a/drivers/ssb/Kconfig
 +++ b/drivers/ssb/Kconfig
-@@ -144,7 +144,7 @@ config SSB_SFLASH
+@@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
+ 
+ config SSB_SFLASH
+ 	bool "SSB serial flash support"
+-	depends on SSB_DRIVER_MIPS && BROKEN
++	depends on SSB_DRIVER_MIPS
+ 	default y
+ 
  # Assumption: We are on embedded, if we compile the MIPS core.
  config SSB_EMBEDDED
  	bool
@@ -68,28 +75,32 @@
  	u32 id, id2;
  
  	switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
-@@ -131,9 +145,21 @@ int ssb_sflash_init(struct ssb_chipcommo
+@@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
  		return -ENOTSUPP;
  	}
  
+-	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
+-		e->name, e->blocksize, e->numblocks);
+-
+-	pr_err("Serial flash support is not implemented yet!\n");
 +	sflash->window = SSB_FLASH2;
 +	sflash->blocksize = e->blocksize;
 +	sflash->numblocks = e->numblocks;
 +	sflash->size = sflash->blocksize * sflash->numblocks;
 +	sflash->present = true;
 +
- 	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
- 		e->name, e->blocksize, e->numblocks);
- 
++	pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
++		e->name, sflash->size / 1024, e->blocksize, e->numblocks);
++
 +	/* Prepare platform device, but don't register it yet. It's too early,
 +	 * malloc (required by device_private_init) is not available yet. */
 +	ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
 +					 sflash->size;
 +	ssb_sflash_dev.dev.platform_data = sflash;
-+
- 	pr_err("Serial flash support is not implemented yet!\n");
  
- 	return -ENOTSUPP;
+-	return -ENOTSUPP;
++	return 0;
+ }
 --- a/drivers/ssb/main.c
 +++ b/drivers/ssb/main.c
 @@ -553,6 +553,14 @@ static int ssb_devices_register(struct s

target/linux/generic/patches-3.10/025-bcma_backport.patch

@@ -8,6 +8,23 @@
  
  config BCMA_DRIVER_PCI_HOSTMODE
  	bool "Driver for PCI core working in hostmode"
+@@ -34,8 +35,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
+ 	  PCI core hostmode operation (external PCI bus).
+ 
+ config BCMA_HOST_SOC
+-	bool
+-	depends on BCMA_DRIVER_MIPS
++	bool "Support for BCMA in a SoC"
++	depends on BCMA
++	help
++	  Host interface for a Broadcom AIX bus directly mapped into
++	  the memory. This only works with the Broadcom SoCs from the
++	  BCM47XX line.
++
++	  If unsure, say N
+ 
+ config BCMA_DRIVER_MIPS
+ 	bool "BCMA Broadcom MIPS core driver"
 --- a/drivers/bcma/bcma_private.h
 +++ b/drivers/bcma/bcma_private.h
 @@ -22,6 +22,8 @@
@@ -316,6 +333,15 @@
  static void bcma_release_core_dev(struct device *dev)
  {
  	struct bcma_device *core = container_of(dev, struct bcma_device, dev);
+@@ -218,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *b
+ 	err = bcma_bus_scan(bus);
+ 	if (err) {
+ 		bcma_err(bus, "Failed to scan: %d\n", err);
+-		return -1;
++		return err;
+ 	}
+ 
+ 	/* Early init CC core */
 --- a/drivers/bcma/sprom.c
 +++ b/drivers/bcma/sprom.c
 @@ -72,12 +72,12 @@ fail:
@@ -484,7 +510,27 @@
  }
 --- a/include/linux/bcma/bcma.h
 +++ b/include/linux/bcma/bcma.h
-@@ -144,6 +144,7 @@ struct bcma_host_ops {
+@@ -72,7 +72,19 @@ struct bcma_host_ops {
+ /* Core-ID values. */
+ #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
+ #define BCMA_CORE_4706_CHIPCOMMON	0x500
++#define BCMA_CORE_PCIEG2		0x501
++#define BCMA_CORE_DMA			0x502
++#define BCMA_CORE_SDIO3			0x503
++#define BCMA_CORE_USB20			0x504
++#define BCMA_CORE_USB30			0x505
++#define BCMA_CORE_A9JTAG		0x506
++#define BCMA_CORE_DDR23			0x507
++#define BCMA_CORE_ROM			0x508
++#define BCMA_CORE_NAND			0x509
++#define BCMA_CORE_QSPI			0x50A
++#define BCMA_CORE_CHIPCOMMON_B		0x50B
+ #define BCMA_CORE_4706_SOC_RAM		0x50E
++#define BCMA_CORE_ARMCA9		0x510
+ #define BCMA_CORE_4706_MAC_GBIT		0x52D
+ #define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
+ #define BCMA_CORE_ALTA			0x534	/* I2S core */
+@@ -144,6 +156,7 @@ struct bcma_host_ops {
  
  /* Chip IDs of PCIe devices */
  #define BCMA_CHIP_ID_BCM4313	0x4313
@@ -492,6 +538,18 @@
  #define BCMA_CHIP_ID_BCM43224	43224
  #define  BCMA_PKG_ID_BCM43224_FAB_CSM	0x8
  #define  BCMA_PKG_ID_BCM43224_FAB_SMIC	0xa
+@@ -176,6 +189,11 @@ struct bcma_host_ops {
+ #define  BCMA_PKG_ID_BCM5357	11
+ #define BCMA_CHIP_ID_BCM53572	53572
+ #define  BCMA_PKG_ID_BCM47188	9
++#define BCMA_CHIP_ID_BCM4707	53010
++#define  BCMA_PKG_ID_BCM4707	1
++#define  BCMA_PKG_ID_BCM4708	2
++#define  BCMA_PKG_ID_BCM4709	0
++#define BCMA_CHIP_ID_BCM53018	53018
+ 
+ /* Board types (on PCI usually equals to the subsystem dev id) */
+ /* BCM4313 */
 --- a/include/linux/bcma/bcma_driver_chipcommon.h
 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
 @@ -330,6 +330,8 @@
@@ -577,3 +635,354 @@
  /* Data for the PMU, if available.
   * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU)
   */
+--- a/drivers/bcma/driver_pci.c
++++ b/drivers/bcma/driver_pci.c
+@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
+ 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
+ }
+ 
+-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
+ {
+ 	u32 v;
+ 	int i;
+@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
+ 	}
+ }
+ 
+-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
+ {
+ 	int max_retries = 10;
+ 	u16 ret = 0;
+@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
+ 	return ret;
+ }
+ 
+-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
+ 				u8 address, u16 data)
+ {
+ 	int max_retries = 10;
+@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
+ 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
+ }
+ 
++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
++				    u8 address, u16 data)
++{
++	bcma_pcie_mdio_write(pc, device, address, data);
++	return bcma_pcie_mdio_read(pc, device, address);
++}
++
+ /**************************************************
+  * Workarounds.
+  **************************************************/
+@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
+ 	}
+ }
+ 
++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
++{
++	u16 data;
++
++	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
++		data = up ? 0x74 : 0x7C;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
++		data = up ? 0x75 : 0x7D;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	}
++}
++
+ /**************************************************
+  * Init.
+  **************************************************/
+@@ -262,7 +288,7 @@ out:
+ }
+ EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
+ 
+-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
+ {
+ 	u32 w;
+ 
+@@ -274,4 +300,33 @@ void bcma_core_pci_extend_L1timer(struct
+ 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
+ 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
+ }
+-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
++
++void bcma_core_pci_up(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_power_save(pc, true);
++
++	bcma_core_pci_extend_L1timer(pc, true);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_up);
++
++void bcma_core_pci_down(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_extend_L1timer(pc, false);
++
++	bcma_core_pci_power_save(pc, false);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_down);
+--- a/drivers/bcma/driver_pci_host.c
++++ b/drivers/bcma/driver_pci_host.c
+@@ -581,6 +581,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI
+ int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
+ {
+ 	struct bcma_drv_pci_host *pc_host;
++	int readrq;
+ 
+ 	if (dev->bus->ops->read != bcma_core_pci_hostmode_read_config) {
+ 		/* This is not a device on the PCI-core bridge. */
+@@ -595,6 +596,11 @@ int bcma_core_pci_plat_dev_init(struct p
+ 	dev->irq = bcma_core_irq(pc_host->pdev->core);
+ 	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+ 
++	readrq = pcie_get_readrq(dev);
++	if (readrq > 128) {
++		pr_info("change PCIe max read request size from %i to 128\n", readrq);
++		pcie_set_readrq(dev, 128);
++	}
+ 	return 0;
+ }
+ EXPORT_SYMBOL(bcma_core_pci_plat_dev_init);
+--- a/drivers/bcma/scan.c
++++ b/drivers/bcma/scan.c
+@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
+ 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
+ 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
+ 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
++	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
++	{ BCMA_CORE_DMA, "DMA" },
++	{ BCMA_CORE_SDIO3, "SDIO3" },
++	{ BCMA_CORE_USB20, "USB 2.0" },
++	{ BCMA_CORE_USB30, "USB 3.0" },
++	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
++	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
++	{ BCMA_CORE_ROM, "ROM" },
++	{ BCMA_CORE_NAND, "NAND flash controller" },
++	{ BCMA_CORE_QSPI, "SPI flash controller" },
++	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
++	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
+ 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
+ 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
+ 	{ BCMA_CORE_INVALID, "Invalid" },
+@@ -201,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
+ 	return ent;
+ }
+ 
+-static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
++static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
+ 				  u32 type, u8 port)
+ {
+ 	u32 addrl, addrh, sizel, sizeh = 0;
+@@ -213,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
+ 	    ((ent & SCAN_ADDR_TYPE) != type) ||
+ 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
+ 		bcma_erom_push_ent(eromptr);
+-		return -EINVAL;
++		return (u32)-EINVAL;
+ 	}
+ 
+ 	addrl = ent & SCAN_ADDR_ADDR;
+@@ -257,11 +269,13 @@ static struct bcma_device *bcma_find_cor
+ 	return NULL;
+ }
+ 
++#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
++
+ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
+ 			      struct bcma_device_id *match, int core_num,
+ 			      struct bcma_device *core)
+ {
+-	s32 tmp;
++	u32 tmp;
+ 	u8 i, j;
+ 	s32 cia, cib;
+ 	u8 ports[2], wrappers[2];
+@@ -339,11 +353,11 @@ static int bcma_get_next_core(struct bcm
+ 	 * the main register space for the core
+ 	 */
+ 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
+-	if (tmp <= 0) {
++	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 		/* Try again to see if it is a bridge */
+ 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 					      SCAN_ADDR_TYPE_BRIDGE, 0);
+-		if (tmp <= 0) {
++		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 			return -EILSEQ;
+ 		} else {
+ 			bcma_info(bus, "Bridge found\n");
+@@ -357,7 +371,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SLAVE, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: slave port %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -374,7 +388,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_MWRAP, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -392,7 +406,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SWRAP, i + hack);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * has %d descriptors\n", i, j); */
+--- a/include/linux/bcma/bcma_driver_pci.h
++++ b/include/linux/bcma/bcma_driver_pci.h
+@@ -181,10 +181,31 @@ struct pci_dev;
+ 
+ #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
+ 
++#define BCMA_CORE_PCI_
++
++/* MDIO devices (SERDES modules) */
++#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
++#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
++#define BCMA_CORE_PCI_MDIO_BLK0			0x800
++#define BCMA_CORE_PCI_MDIO_BLK1			0x801
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
++#define BCMA_CORE_PCI_MDIO_BLK2			0x802
++#define BCMA_CORE_PCI_MDIO_BLK3			0x803
++#define BCMA_CORE_PCI_MDIO_BLK4			0x804
++#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
++#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
++#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
++#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
++
+ /* PCIE Root Capability Register bits (Host mode only) */
+ #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
+ 
+ struct bcma_drv_pci;
++struct bcma_bus;
+ 
+ #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
+ struct bcma_drv_pci_host {
+@@ -219,7 +240,8 @@ struct bcma_drv_pci {
+ extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
+ extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
+ 				 struct bcma_device *core, bool enable);
+-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
++extern void bcma_core_pci_up(struct bcma_bus *bus);
++extern void bcma_core_pci_down(struct bcma_bus *bus);
+ 
+ extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
+ extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
+@@ -679,27 +679,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en
+ 	return mode == BCMA_CLKMODE_FAST;
+ }
+ 
+-void ai_pci_up(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true);
+-}
+-
+-/* Unconfigure and/or apply various WARs when going down */
+-void ai_pci_down(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false);
+-}
+-
+ /* Enable BT-COEX & Ex-PA for 4313 */
+ void ai_epa_4313war(struct si_pub *sih)
+ {
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
+@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st
+ extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode);
+ extern bool ai_deviceremoved(struct si_pub *sih);
+ 
+-extern void ai_pci_down(struct si_pub *sih);
+-extern void ai_pci_up(struct si_pub *sih);
+-
+ /* Enable Ex-PA for 4313 */
+ extern void ai_epa_4313war(struct si_pub *sih);
+ 
+--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
+@@ -4667,7 +4667,7 @@ static int brcms_b_attach(struct brcms_c
+ 	brcms_c_coredisable(wlc_hw);
+ 
+ 	/* Match driver "down" state */
+-	ai_pci_down(wlc_hw->sih);
++	bcma_core_pci_down(wlc_hw->d11core->bus);
+ 
+ 	/* turn off pll and xtal to match driver "down" state */
+ 	brcms_b_xtal(wlc_hw, OFF);
+@@ -5010,12 +5010,12 @@ static int brcms_b_up_prep(struct brcms_
+ 	 */
+ 	if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
+ 		/* put SB PCI in down state again */
+-		ai_pci_down(wlc_hw->sih);
++		bcma_core_pci_down(wlc_hw->d11core->bus);
+ 		brcms_b_xtal(wlc_hw, OFF);
+ 		return -ENOMEDIUM;
+ 	}
+ 
+-	ai_pci_up(wlc_hw->sih);
++	bcma_core_pci_up(wlc_hw->d11core->bus);
+ 
+ 	/* reset the d11 core */
+ 	brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
+@@ -5212,7 +5212,7 @@ static int brcms_b_down_finish(struct br
+ 
+ 		/* turn off primary xtal and pll */
+ 		if (!wlc_hw->noreset) {
+-			ai_pci_down(wlc_hw->sih);
++			bcma_core_pci_down(wlc_hw->d11core->bus);
+ 			brcms_b_xtal(wlc_hw, OFF);
+ 		}
+ 	}

target/linux/generic/patches-3.10/026-bcma_pcie_up_down.patch

@@ -1,167 +0,0 @@
-bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
-called by b43 and brcmsmac
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
-
---- a/drivers/bcma/driver_pci.c
-+++ b/drivers/bcma/driver_pci.c
-@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
- 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
- }
- 
--static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
-+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
- {
- 	u32 v;
- 	int i;
-@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
- 	}
- }
- 
--static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
-+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
- {
- 	int max_retries = 10;
- 	u16 ret = 0;
-@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
- 	return ret;
- }
- 
--static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
-+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
- 				u8 address, u16 data)
- {
- 	int max_retries = 10;
-@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
- 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
- }
- 
-+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
-+				    u8 address, u16 data)
-+{
-+	bcma_pcie_mdio_write(pc, device, address, data);
-+	return bcma_pcie_mdio_read(pc, device, address);
-+}
-+
- /**************************************************
-  * Workarounds.
-  **************************************************/
-@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
- 	}
- }
- 
-+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
-+{
-+	u16 data;
-+
-+	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
-+		data = up ? 0x74 : 0x7C;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
-+		data = up ? 0x75 : 0x7D;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	}
-+}
-+
- /**************************************************
-  * Init.
-  **************************************************/
-@@ -262,7 +288,7 @@ out:
- }
- EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
- 
--void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
-+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
- {
- 	u32 w;
- 
-@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
- 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
- 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
- }
--EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
-+
-+void bcma_core_pci_up(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_power_save(pc, true);
-+
-+	bcma_core_pci_extend_L1timer(pc, true);
-+
-+	if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
-+	    bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
-+		pcie_set_readrq(bus->host_pci, 128);
-+	}
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
-+
-+void bcma_core_pci_down(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_extend_L1timer(pc, false);
-+
-+	bcma_core_pci_power_save(pc, false);
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
---- a/include/linux/bcma/bcma_driver_pci.h
-+++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -181,10 +181,31 @@ struct pci_dev;
- 
- #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
- 
-+#define BCMA_CORE_PCI_
-+
-+/* MDIO devices (SERDES modules) */
-+#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
-+#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
-+#define BCMA_CORE_PCI_MDIO_BLK0			0x800
-+#define BCMA_CORE_PCI_MDIO_BLK1			0x801
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
-+#define BCMA_CORE_PCI_MDIO_BLK2			0x802
-+#define BCMA_CORE_PCI_MDIO_BLK3			0x803
-+#define BCMA_CORE_PCI_MDIO_BLK4			0x804
-+#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
-+#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
-+#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
-+#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
-+
- /* PCIE Root Capability Register bits (Host mode only) */
- #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
- 
- struct bcma_drv_pci;
-+struct bcma_bus;
- 
- #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
- struct bcma_drv_pci_host {
-@@ -219,7 +240,8 @@ struct bcma_drv_pci {
- extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
- extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
- 				 struct bcma_device *core, bool enable);
--extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
-+extern void bcma_core_pci_up(struct bcma_bus *bus);
-+extern void bcma_core_pci_down(struct bcma_bus *bus);
- 
- extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
- extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);

target/linux/generic/patches-3.3/020-ssb_update.patch

@@ -36,7 +36,7 @@
  
 +config SSB_SFLASH
 +	bool "SSB serial flash support"
-+	depends on SSB_DRIVER_MIPS && BROKEN
++	depends on SSB_DRIVER_MIPS
 +	default y
 +
  # Assumption: We are on embedded, if we compile the MIPS core.
@@ -587,7 +587,7 @@
 +EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);
 --- /dev/null
 +++ b/drivers/ssb/driver_chipcommon_sflash.c
-@@ -0,0 +1,166 @@
+@@ -0,0 +1,164 @@
 +/*
 + * Sonics Silicon Backplane
 + * ChipCommon serial flash interface
@@ -741,8 +741,8 @@
 +	sflash->size = sflash->blocksize * sflash->numblocks;
 +	sflash->present = true;
 +
-+	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
-+		e->name, e->blocksize, e->numblocks);
++	pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
++		e->name, sflash->size / 1024, e->blocksize, e->numblocks);
 +
 +	/* Prepare platform device, but don't register it yet. It's too early,
 +	 * malloc (required by device_private_init) is not available yet. */
@@ -750,9 +750,7 @@
 +					 sflash->size;
 +	ssb_sflash_dev.dev.platform_data = sflash;
 +
-+	pr_err("Serial flash support is not implemented yet!\n");
-+
-+	return -ENOTSUPP;
++	return 0;
 +}
 --- a/drivers/ssb/driver_extif.c
 +++ b/drivers/ssb/driver_extif.c

target/linux/generic/patches-3.3/025-bcma_backport.patch

@@ -11,7 +11,7 @@
  		p->iotype = UPIO_MEM;
 --- a/drivers/bcma/Kconfig
 +++ b/drivers/bcma/Kconfig
-@@ -26,10 +26,11 @@ config BCMA_HOST_PCI_POSSIBLE
+@@ -26,16 +26,23 @@ config BCMA_HOST_PCI_POSSIBLE
  config BCMA_HOST_PCI
  	bool "Support for BCMA on PCI-host bus"
  	depends on BCMA_HOST_PCI_POSSIBLE
@@ -24,7 +24,21 @@
  	help
  	  PCI core hostmode operation (external PCI bus).
  
-@@ -46,6 +47,33 @@ config BCMA_DRIVER_MIPS
+ config BCMA_HOST_SOC
+-	bool
+-	depends on BCMA_DRIVER_MIPS
++	bool "Support for BCMA in a SoC"
++	depends on BCMA
++	help
++	  Host interface for a Broadcom AIX bus directly mapped into
++	  the memory. This only works with the Broadcom SoCs from the
++	  BCM47XX line.
++
++	  If unsure, say N
+ 
+ config BCMA_DRIVER_MIPS
+ 	bool "BCMA Broadcom MIPS core driver"
+@@ -46,6 +53,33 @@ config BCMA_DRIVER_MIPS
  
  	  If unsure, say N
  
@@ -2047,7 +2061,7 @@
   *
   * Licensed under the GNU/GPL. See COPYING for details.
   */
-@@ -16,120 +17,124 @@
+@@ -16,120 +17,131 @@
   * R/W ops.
   **************************************************/
  
@@ -2074,7 +2088,8 @@
  }
 -#endif
  
- static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
+-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
  {
 -	const u16 mdio_control = 0x128;
 -	const u16 mdio_data = 0x12C;
@@ -2108,7 +2123,8 @@
  	}
  }
  
- static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
+-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
  {
 -	const u16 mdio_control = 0x128;
 -	const u16 mdio_data = 0x12C;
@@ -2168,7 +2184,8 @@
  	return ret;
  }
  
- static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
+-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
  				u8 address, u16 data)
  {
 -	const u16 mdio_control = 0x128;
@@ -2221,10 +2238,17 @@
  	}
 -	pcicore_write32(pc, mdio_control, 0);
 +	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
++}
++
++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
++				    u8 address, u16 data)
++{
++	bcma_pcie_mdio_write(pc, device, address, data);
++	return bcma_pcie_mdio_read(pc, device, address);
  }
  
  /**************************************************
-@@ -138,88 +143,108 @@ static void bcma_pcie_mdio_write(struct
+@@ -138,88 +150,127 @@ static void bcma_pcie_mdio_write(struct
  
  static u8 bcma_pcicore_polarity_workaround(struct bcma_drv_pci *pc)
  {
@@ -2277,12 +2301,18 @@
 +			(val16 & ~BCMA_CORE_PCI_SPROM_PI_MASK);
 +		pcicore_write16(pc, regoff, val16);
 +	}
-+}
-+
+ }
+ 
+-/**************************************************
+- * Init.
+- **************************************************/
+-
+-static void bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
 +/* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */
 +/* Needs to happen when coming out of 'standby'/'hibernate' */
 +static void bcma_core_pci_config_fixup(struct bcma_drv_pci *pc)
-+{
+ {
+-	bcma_pcicore_serdes_workaround(pc);
 +	u16 val16;
 +	uint regoff;
 +
@@ -2296,23 +2326,13 @@
 +	}
  }
  
- /**************************************************
-  * Init.
-  **************************************************/
- 
--static void bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
-+static void __devinit bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
- {
-+	bcma_core_pci_fixcfg(pc);
- 	bcma_pcicore_serdes_workaround(pc);
-+	bcma_core_pci_config_fixup(pc);
- }
- 
 -static bool bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc)
--{
++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
+ {
 -	struct bcma_bus *bus = pc->core->bus;
 -	u16 chipid_top;
--
++	u16 data;
+ 
 -	chipid_top = (bus->chipinfo.id & 0xFF00);
 -	if (chipid_top != 0x4700 &&
 -	    chipid_top != 0x5300)
@@ -2322,17 +2342,39 @@
 -	if (bus->sprom.boardflags_lo & SSB_BFL_NOPCI)
 -		return false;
 -#endif /* CONFIG_SSB_DRIVER_PCICORE */
--
++	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
++		data = up ? 0x74 : 0x7C;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
++		data = up ? 0x75 : 0x7D;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	}
++}
+ 
 -#if 0
 -	/* TODO: on BCMA we use address from EROM instead of magic formula */
 -	u32 tmp;
 -	return !mips_busprobe32(tmp, (bus->mmio +
 -		(pc->core->core_index * BCMA_CORE_SIZE)));
 -#endif
--
++/**************************************************
++ * Init.
++ **************************************************/
+ 
 -	return true;
--}
--
++static void __devinit bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)
++{
++	bcma_core_pci_fixcfg(pc);
++	bcma_pcicore_serdes_workaround(pc);
++	bcma_core_pci_config_fixup(pc);
+ }
+ 
 -void bcma_core_pci_init(struct bcma_drv_pci *pc)
 +void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc)
  {
@@ -2377,12 +2419,12 @@
  	err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
  	if (err)
  		goto out;
-@@ -236,3 +261,17 @@ out:
+@@ -236,3 +287,46 @@ out:
  	return err;
  }
  EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
 +
-+void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
 +{
 +	u32 w;
 +
@@ -2394,10 +2436,39 @@
 +	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
 +	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
 +}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
++
++void bcma_core_pci_up(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_power_save(pc, true);
++
++	bcma_core_pci_extend_L1timer(pc, true);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_up);
++
++void bcma_core_pci_down(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_extend_L1timer(pc, false);
++
++	bcma_core_pci_power_save(pc, false);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_down);
 --- a/drivers/bcma/driver_pci_host.c
 +++ b/drivers/bcma/driver_pci_host.c
-@@ -2,13 +2,616 @@
+@@ -2,13 +2,622 @@
   * Broadcom specific AMBA
   * PCI Core in hostmode
   *
@@ -2983,6 +3054,7 @@
 +int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
 +{
 +	struct bcma_drv_pci_host *pc_host;
++	int readrq;
 +
 +	if (dev->bus->ops->read != bcma_core_pci_hostmode_read_config) {
 +		/* This is not a device on the PCI-core bridge. */
@@ -2997,6 +3069,11 @@
 +	dev->irq = bcma_core_irq(pc_host->pdev->core);
 +	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 +
++	readrq = pcie_get_readrq(dev);
++	if (readrq > 128) {
++		pr_info("change PCIe max read request size from %i to 128\n", readrq);
++		pcie_set_readrq(dev, 128);
++	}
 +	return 0;
 +}
 +EXPORT_SYMBOL(bcma_core_pci_plat_dev_init);
@@ -3335,8 +3412,9 @@
  	err = bcma_bus_scan(bus);
  	if (err) {
 -		pr_err("Failed to scan: %d\n", err);
+-		return -1;
 +		bcma_err(bus, "Failed to scan: %d\n", err);
- 		return -1;
++		return err;
  	}
  
 +	/* Early init CC core */
@@ -3486,7 +3564,7 @@
  	}
 --- a/drivers/bcma/scan.c
 +++ b/drivers/bcma/scan.c
-@@ -19,15 +19,27 @@ struct bcma_device_id_name {
+@@ -19,15 +19,39 @@ struct bcma_device_id_name {
  	u16 id;
  	const char *name;
  };
@@ -3504,6 +3582,18 @@
 +	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
 +	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
 +	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
++	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
++	{ BCMA_CORE_DMA, "DMA" },
++	{ BCMA_CORE_SDIO3, "SDIO3" },
++	{ BCMA_CORE_USB20, "USB 2.0" },
++	{ BCMA_CORE_USB30, "USB 3.0" },
++	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
++	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
++	{ BCMA_CORE_ROM, "ROM" },
++	{ BCMA_CORE_NAND, "NAND flash controller" },
++	{ BCMA_CORE_QSPI, "SPI flash controller" },
++	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
++	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
 +	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
 +	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
  	{ BCMA_CORE_INVALID, "Invalid" },
@@ -3516,7 +3606,7 @@
  	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
  	{ BCMA_CORE_V90, "V90" },
  	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
-@@ -44,7 +56,6 @@ struct bcma_device_id_name bcma_device_n
+@@ -44,7 +68,6 @@ struct bcma_device_id_name bcma_device_n
  	{ BCMA_CORE_PHY_A, "PHY A" },
  	{ BCMA_CORE_PHY_B, "PHY B" },
  	{ BCMA_CORE_PHY_G, "PHY G" },
@@ -3524,7 +3614,7 @@
  	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
  	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
  	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
-@@ -58,15 +69,11 @@ struct bcma_device_id_name bcma_device_n
+@@ -58,15 +81,11 @@ struct bcma_device_id_name bcma_device_n
  	{ BCMA_CORE_PHY_N, "PHY N" },
  	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
  	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
@@ -3540,7 +3630,7 @@
  	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
  	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
  	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
-@@ -77,18 +84,45 @@ struct bcma_device_id_name bcma_device_n
+@@ -77,18 +96,45 @@ struct bcma_device_id_name bcma_device_n
  	{ BCMA_CORE_I2S, "I2S" },
  	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
  	{ BCMA_CORE_SHIM, "SHIM" },
@@ -3583,17 +3673,17 @@
 +		break;
 +	default:
 +		return "UNKNOWN";
- 	}
++	}
 +
 +	for (i = 0; i < size; i++) {
 +		if (names[i].id == id->id)
 +			return names[i].name;
-+	}
+ 	}
 +
  	return "UNKNOWN";
  }
  
-@@ -105,19 +139,19 @@ static void bcma_scan_switch_core(struct
+@@ -105,19 +151,19 @@ static void bcma_scan_switch_core(struct
  				       addr);
  }
  
@@ -3616,7 +3706,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -127,14 +161,14 @@ static s32 bcma_erom_get_ci(struct bcma_
+@@ -127,14 +173,14 @@ static s32 bcma_erom_get_ci(struct bcma_
  	return ent;
  }
  
@@ -3633,7 +3723,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	bcma_erom_push_ent(eromptr);
-@@ -143,7 +177,7 @@ static bool bcma_erom_is_bridge(struct b
+@@ -143,7 +189,7 @@ static bool bcma_erom_is_bridge(struct b
  		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
  }
  
@@ -3642,7 +3732,7 @@
  {
  	u32 ent;
  	while (1) {
-@@ -157,7 +191,7 @@ static void bcma_erom_skip_component(str
+@@ -157,7 +203,7 @@ static void bcma_erom_skip_component(str
  	bcma_erom_push_ent(eromptr);
  }
  
@@ -3651,16 +3741,25 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -167,7 +201,7 @@ static s32 bcma_erom_get_mst_port(struct
+@@ -167,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
  	return ent;
  }
  
 -static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
-+static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
++static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
  				  u32 type, u8 port)
  {
  	u32 addrl, addrh, sizel, sizeh = 0;
-@@ -212,6 +246,17 @@ static struct bcma_device *bcma_find_cor
+@@ -179,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
+ 	    ((ent & SCAN_ADDR_TYPE) != type) ||
+ 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
+ 		bcma_erom_push_ent(eromptr);
+-		return -EINVAL;
++		return (u32)-EINVAL;
+ 	}
+ 
+ 	addrl = ent & SCAN_ADDR_ADDR;
+@@ -212,11 +258,24 @@ static struct bcma_device *bcma_find_cor
  	return NULL;
  }
  
@@ -3674,11 +3773,19 @@
 +	}
 +	return NULL;
 +}
++
++#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
 +
  static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
  			      struct bcma_device_id *match, int core_num,
  			      struct bcma_device *core)
-@@ -252,11 +297,15 @@ static int bcma_get_next_core(struct bcm
+ {
+-	s32 tmp;
++	u32 tmp;
+ 	u8 i, j;
+ 	s32 cia, cib;
+ 	u8 ports[2], wrappers[2];
+@@ -252,11 +311,15 @@ static int bcma_get_next_core(struct bcm
  
  	/* check if component is a core at all */
  	if (wrappers[0] + wrappers[1] == 0) {
@@ -3699,7 +3806,7 @@
  	}
  
  	if (bcma_erom_is_bridge(bus, eromptr)) {
-@@ -286,6 +335,23 @@ static int bcma_get_next_core(struct bcm
+@@ -286,19 +349,36 @@ static int bcma_get_next_core(struct bcm
  			return -EILSEQ;
  	}
  
@@ -3707,11 +3814,11 @@
 +	 * the main register space for the core
 +	 */
 +	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
-+	if (tmp <= 0) {
++	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
 +		/* Try again to see if it is a bridge */
 +		tmp = bcma_erom_get_addr_desc(bus, eromptr,
 +					      SCAN_ADDR_TYPE_BRIDGE, 0);
-+		if (tmp <= 0) {
++		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
 +			return -EILSEQ;
 +		} else {
 +			bcma_info(bus, "Bridge found\n");
@@ -3723,7 +3830,13 @@
  	/* get & parse slave ports */
  	for (i = 0; i < ports[1]; i++) {
  		for (j = 0; ; j++) {
-@@ -298,7 +364,7 @@ static int bcma_get_next_core(struct bcm
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SLAVE, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: slave port %d "
+ 				 * "has %d descriptors\n", i, j); */
  				break;
  			} else {
  				if (i == 0 && j == 0)
@@ -3732,7 +3845,25 @@
  			}
  		}
  	}
-@@ -353,6 +419,7 @@ static int bcma_get_next_core(struct bcm
+@@ -308,7 +388,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_MWRAP, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -326,7 +406,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SWRAP, i + hack);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * has %d descriptors\n", i, j); */
+@@ -353,6 +433,7 @@ static int bcma_get_next_core(struct bcm
  void bcma_init_bus(struct bcma_bus *bus)
  {
  	s32 tmp;
@@ -3740,7 +3871,7 @@
  
  	if (bus->init_done)
  		return;
-@@ -363,9 +430,12 @@ void bcma_init_bus(struct bcma_bus *bus)
+@@ -363,9 +444,12 @@ void bcma_init_bus(struct bcma_bus *bus)
  	bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
  
  	tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
@@ -3756,7 +3887,7 @@
  	bus->init_done = true;
  }
  
-@@ -392,9 +462,12 @@ int bcma_bus_scan(struct bcma_bus *bus)
+@@ -392,9 +476,12 @@ int bcma_bus_scan(struct bcma_bus *bus)
  	bcma_scan_switch_core(bus, erombase);
  
  	while (eromptr < eromend) {
@@ -3771,7 +3902,7 @@
  		INIT_LIST_HEAD(&core->list);
  		core->bus = bus;
  
-@@ -409,25 +482,28 @@ int bcma_bus_scan(struct bcma_bus *bus)
+@@ -409,25 +496,28 @@ int bcma_bus_scan(struct bcma_bus *bus)
  			} else if (err == -ESPIPE) {
  				break;
  			}
@@ -3808,7 +3939,7 @@
  }
  
  int __init bcma_bus_scan_early(struct bcma_bus *bus,
-@@ -467,21 +543,21 @@ int __init bcma_bus_scan_early(struct bc
+@@ -467,21 +557,21 @@ int __init bcma_bus_scan_early(struct bc
  		else if (err == -ESPIPE)
  			break;
  		else if (err < 0)
@@ -4557,12 +4688,24 @@
  enum bcma_clkmode {
  	BCMA_CLKMODE_FAST,
  	BCMA_CLKMODE_DYNAMIC,
-@@ -65,6 +71,13 @@ struct bcma_host_ops {
+@@ -65,6 +71,25 @@ struct bcma_host_ops {
  
  /* Core-ID values. */
  #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
 +#define BCMA_CORE_4706_CHIPCOMMON	0x500
++#define BCMA_CORE_PCIEG2		0x501
++#define BCMA_CORE_DMA			0x502
++#define BCMA_CORE_SDIO3			0x503
++#define BCMA_CORE_USB20			0x504
++#define BCMA_CORE_USB30			0x505
++#define BCMA_CORE_A9JTAG		0x506
++#define BCMA_CORE_DDR23			0x507
++#define BCMA_CORE_ROM			0x508
++#define BCMA_CORE_NAND			0x509
++#define BCMA_CORE_QSPI			0x50A
++#define BCMA_CORE_CHIPCOMMON_B		0x50B
 +#define BCMA_CORE_4706_SOC_RAM		0x50E
++#define BCMA_CORE_ARMCA9		0x510
 +#define BCMA_CORE_4706_MAC_GBIT		0x52D
 +#define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
 +#define BCMA_CORE_ALTA			0x534	/* I2S core */
@@ -4571,7 +4714,7 @@
  #define BCMA_CORE_INVALID		0x700
  #define BCMA_CORE_CHIPCOMMON		0x800
  #define BCMA_CORE_ILINE20		0x801
-@@ -121,10 +134,104 @@ struct bcma_host_ops {
+@@ -121,10 +146,109 @@ struct bcma_host_ops {
  #define BCMA_CORE_I2S			0x834
  #define BCMA_CORE_SDR_DDR1_MEM_CTL	0x835	/* SDR/DDR1 memory controller core */
  #define BCMA_CORE_SHIM			0x837	/* SHIM component in ubus/6362 */
@@ -4618,6 +4761,11 @@
 +#define  BCMA_PKG_ID_BCM5357	11
 +#define BCMA_CHIP_ID_BCM53572	53572
 +#define  BCMA_PKG_ID_BCM47188	9
++#define BCMA_CHIP_ID_BCM4707	53010
++#define  BCMA_PKG_ID_BCM4707	1
++#define  BCMA_PKG_ID_BCM4708	2
++#define  BCMA_PKG_ID_BCM4709	0
++#define BCMA_CHIP_ID_BCM53018	53018
 +
 +/* Board types (on PCI usually equals to the subsystem dev id) */
 +/* BCM4313 */
@@ -4676,7 +4824,7 @@
  struct bcma_device {
  	struct bcma_bus *bus;
  	struct bcma_device_id id;
-@@ -136,8 +243,10 @@ struct bcma_device {
+@@ -136,8 +260,10 @@ struct bcma_device {
  	bool dev_registered;
  
  	u8 core_index;
@@ -4687,7 +4835,7 @@
  	u32 wrap;
  
  	void __iomem *io_addr;
-@@ -175,6 +284,12 @@ int __bcma_driver_register(struct bcma_d
+@@ -175,6 +301,12 @@ int __bcma_driver_register(struct bcma_d
  
  extern void bcma_driver_unregister(struct bcma_driver *drv);
  
@@ -4700,7 +4848,7 @@
  struct bcma_bus {
  	/* The MMIO area. */
  	void __iomem *mmio;
-@@ -191,14 +306,18 @@ struct bcma_bus {
+@@ -191,14 +323,18 @@ struct bcma_bus {
  
  	struct bcma_chipinfo chipinfo;
  
@@ -4720,7 +4868,7 @@
  
  	/* We decided to share SPROM struct with SSB as long as we do not need
  	 * any hacks for BCMA. This simplifies drivers code. */
-@@ -282,6 +401,7 @@ static inline void bcma_maskset16(struct
+@@ -282,6 +418,7 @@ static inline void bcma_maskset16(struct
  	bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
  }
  
@@ -4728,7 +4876,7 @@
  extern bool bcma_core_is_enabled(struct bcma_device *core);
  extern void bcma_core_disable(struct bcma_device *core, u32 flags);
  extern int bcma_core_enable(struct bcma_device *core, u32 flags);
-@@ -289,6 +409,7 @@ extern void bcma_core_set_clockmode(stru
+@@ -289,6 +426,7 @@ extern void bcma_core_set_clockmode(stru
  				    enum bcma_clkmode clkmode);
  extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
  			      bool on);
@@ -5410,7 +5558,7 @@
  
  /* SBtoPCIx */
  #define BCMA_CORE_PCI_SBTOPCI_MEM		0x00000000
-@@ -72,20 +108,120 @@ struct pci_dev;
+@@ -72,20 +108,142 @@ struct pci_dev;
  #define  BCMA_CORE_PCI_SBTOPCI_RC_READL		0x00000010 /* Memory read line */
  #define  BCMA_CORE_PCI_SBTOPCI_RC_READM		0x00000020 /* Memory read multiple */
  
@@ -5487,10 +5635,31 @@
 +
 +#define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
 +
++#define BCMA_CORE_PCI_
++
++/* MDIO devices (SERDES modules) */
++#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
++#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
++#define BCMA_CORE_PCI_MDIO_BLK0			0x800
++#define BCMA_CORE_PCI_MDIO_BLK1			0x801
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
++#define BCMA_CORE_PCI_MDIO_BLK2			0x802
++#define BCMA_CORE_PCI_MDIO_BLK3			0x803
++#define BCMA_CORE_PCI_MDIO_BLK4			0x804
++#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
++#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
++#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
++#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
++
 +/* PCIE Root Capability Register bits (Host mode only) */
 +#define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
 +
 +struct bcma_drv_pci;
++struct bcma_bus;
 +
 +#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
 +struct bcma_drv_pci_host {
@@ -5526,7 +5695,8 @@
 +extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
  extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
  				 struct bcma_device *core, bool enable);
-+extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
++extern void bcma_core_pci_up(struct bcma_bus *bus);
++extern void bcma_core_pci_down(struct bcma_bus *bus);
 +
 +extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
 +extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);

target/linux/generic/patches-3.3/026-bcma_pcie_up_down.patch

@@ -1,167 +0,0 @@
-bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
-called by b43 and brcmsmac
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
-
---- a/drivers/bcma/driver_pci.c
-+++ b/drivers/bcma/driver_pci.c
-@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
- 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
- }
- 
--static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
-+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
- {
- 	u32 v;
- 	int i;
-@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
- 	}
- }
- 
--static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
-+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
- {
- 	int max_retries = 10;
- 	u16 ret = 0;
-@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
- 	return ret;
- }
- 
--static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
-+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
- 				u8 address, u16 data)
- {
- 	int max_retries = 10;
-@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
- 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
- }
- 
-+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
-+				    u8 address, u16 data)
-+{
-+	bcma_pcie_mdio_write(pc, device, address, data);
-+	return bcma_pcie_mdio_read(pc, device, address);
-+}
-+
- /**************************************************
-  * Workarounds.
-  **************************************************/
-@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
- 	}
- }
- 
-+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
-+{
-+	u16 data;
-+
-+	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
-+		data = up ? 0x74 : 0x7C;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
-+		data = up ? 0x75 : 0x7D;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	}
-+}
-+
- /**************************************************
-  * Init.
-  **************************************************/
-@@ -262,7 +288,7 @@ out:
- }
- EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
- 
--void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
-+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
- {
- 	u32 w;
- 
-@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
- 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
- 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
- }
--EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
-+
-+void bcma_core_pci_up(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_power_save(pc, true);
-+
-+	bcma_core_pci_extend_L1timer(pc, true);
-+
-+	if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
-+	    bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
-+		pcie_set_readrq(bus->host_pci, 128);
-+	}
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
-+
-+void bcma_core_pci_down(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_extend_L1timer(pc, false);
-+
-+	bcma_core_pci_power_save(pc, false);
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
---- a/include/linux/bcma/bcma_driver_pci.h
-+++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -181,10 +181,31 @@ struct pci_dev;
- 
- #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
- 
-+#define BCMA_CORE_PCI_
-+
-+/* MDIO devices (SERDES modules) */
-+#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
-+#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
-+#define BCMA_CORE_PCI_MDIO_BLK0			0x800
-+#define BCMA_CORE_PCI_MDIO_BLK1			0x801
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
-+#define BCMA_CORE_PCI_MDIO_BLK2			0x802
-+#define BCMA_CORE_PCI_MDIO_BLK3			0x803
-+#define BCMA_CORE_PCI_MDIO_BLK4			0x804
-+#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
-+#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
-+#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
-+#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
-+
- /* PCIE Root Capability Register bits (Host mode only) */
- #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
- 
- struct bcma_drv_pci;
-+struct bcma_bus;
- 
- #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
- struct bcma_drv_pci_host {
-@@ -219,7 +240,8 @@ struct bcma_drv_pci {
- extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
- extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
- 				 struct bcma_device *core, bool enable);
--extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
-+extern void bcma_core_pci_up(struct bcma_bus *bus);
-+extern void bcma_core_pci_down(struct bcma_bus *bus);
- 
- extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
- extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);

target/linux/generic/patches-3.6/020-ssb_update.patch

@@ -36,7 +36,7 @@
  
 +config SSB_SFLASH
 +	bool "SSB serial flash support"
-+	depends on SSB_DRIVER_MIPS && BROKEN
++	depends on SSB_DRIVER_MIPS
 +	default y
 +
  # Assumption: We are on embedded, if we compile the MIPS core.
@@ -531,7 +531,7 @@
 +EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);
 --- /dev/null
 +++ b/drivers/ssb/driver_chipcommon_sflash.c
-@@ -0,0 +1,166 @@
+@@ -0,0 +1,164 @@
 +/*
 + * Sonics Silicon Backplane
 + * ChipCommon serial flash interface
@@ -685,8 +685,8 @@
 +	sflash->size = sflash->blocksize * sflash->numblocks;
 +	sflash->present = true;
 +
-+	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
-+		e->name, e->blocksize, e->numblocks);
++	pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
++		e->name, sflash->size / 1024, e->blocksize, e->numblocks);
 +
 +	/* Prepare platform device, but don't register it yet. It's too early,
 +	 * malloc (required by device_private_init) is not available yet. */
@@ -694,9 +694,7 @@
 +					 sflash->size;
 +	ssb_sflash_dev.dev.platform_data = sflash;
 +
-+	pr_err("Serial flash support is not implemented yet!\n");
-+
-+	return -ENOTSUPP;
++	return 0;
 +}
 --- a/drivers/ssb/driver_extif.c
 +++ b/drivers/ssb/driver_extif.c

target/linux/generic/patches-3.6/025-bcma_backport.patch

@@ -19,7 +19,24 @@
  
  config BCMA_DRIVER_PCI_HOSTMODE
  	bool "Driver for PCI core working in hostmode"
-@@ -48,12 +49,12 @@ config BCMA_DRIVER_MIPS
+@@ -34,8 +35,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
+ 	  PCI core hostmode operation (external PCI bus).
+ 
+ config BCMA_HOST_SOC
+-	bool
+-	depends on BCMA_DRIVER_MIPS
++	bool "Support for BCMA in a SoC"
++	depends on BCMA
++	help
++	  Host interface for a Broadcom AIX bus directly mapped into
++	  the memory. This only works with the Broadcom SoCs from the
++	  BCM47XX line.
++
++	  If unsure, say N
+ 
+ config BCMA_DRIVER_MIPS
+ 	bool "BCMA Broadcom MIPS core driver"
+@@ -48,12 +55,12 @@ config BCMA_DRIVER_MIPS
  
  config BCMA_SFLASH
  	bool
@@ -34,7 +51,7 @@
  	default y
  
  config BCMA_DRIVER_GMAC_CMN
-@@ -65,6 +66,14 @@ config BCMA_DRIVER_GMAC_CMN
+@@ -65,6 +72,14 @@ config BCMA_DRIVER_GMAC_CMN
  
  	  If unsure, say N
  
@@ -1608,7 +1625,16 @@
  }
 --- a/drivers/bcma/driver_pci.c
 +++ b/drivers/bcma/driver_pci.c
-@@ -51,7 +51,7 @@ static void bcma_pcie_mdio_set_phy(struc
+@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
+ 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
+ }
+ 
+-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
+ {
+ 	u32 v;
+ 	int i;
+@@ -51,11 +51,11 @@ static void bcma_pcie_mdio_set_phy(struc
  		v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL);
  		if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE)
  			break;
@@ -1617,7 +1643,12 @@
  	}
  }
  
-@@ -92,7 +92,7 @@ static u16 bcma_pcie_mdio_read(struct bc
+-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
+ {
+ 	int max_retries = 10;
+ 	u16 ret = 0;
+@@ -92,13 +92,13 @@ static u16 bcma_pcie_mdio_read(struct bc
  			ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA);
  			break;
  		}
@@ -1626,7 +1657,14 @@
  	}
  	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
  	return ret;
-@@ -132,7 +132,7 @@ static void bcma_pcie_mdio_write(struct
+ }
+ 
+-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
+ 				u8 address, u16 data)
+ {
+ 	int max_retries = 10;
+@@ -132,11 +132,18 @@ static void bcma_pcie_mdio_write(struct
  		v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL);
  		if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE)
  			break;
@@ -1635,6 +1673,87 @@
  	}
  	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
  }
+ 
++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
++				    u8 address, u16 data)
++{
++	bcma_pcie_mdio_write(pc, device, address, data);
++	return bcma_pcie_mdio_read(pc, device, address);
++}
++
+ /**************************************************
+  * Workarounds.
+  **************************************************/
+@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
+ 	}
+ }
+ 
++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
++{
++	u16 data;
++
++	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
++		data = up ? 0x74 : 0x7C;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
++		data = up ? 0x75 : 0x7D;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	}
++}
++
+ /**************************************************
+  * Init.
+  **************************************************/
+@@ -262,7 +288,7 @@ out:
+ }
+ EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
+ 
+-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
+ {
+ 	u32 w;
+ 
+@@ -274,4 +300,33 @@ void bcma_core_pci_extend_L1timer(struct
+ 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
+ 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
+ }
+-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
++
++void bcma_core_pci_up(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_power_save(pc, true);
++
++	bcma_core_pci_extend_L1timer(pc, true);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_up);
++
++void bcma_core_pci_down(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_extend_L1timer(pc, false);
++
++	bcma_core_pci_power_save(pc, false);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_down);
 --- a/drivers/bcma/driver_pci_host.c
 +++ b/drivers/bcma/driver_pci_host.c
 @@ -35,11 +35,6 @@ bool __devinit bcma_core_pci_is_in_hostm
@@ -1878,7 +1997,15 @@
  	}
  }
  DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, bcma_core_pci_fixup_addresses);
-@@ -569,7 +593,7 @@ int bcma_core_pci_plat_dev_init(struct p
+@@ -558,6 +582,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI
+ int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
+ {
+ 	struct bcma_drv_pci_host *pc_host;
++	int readrq;
+ 
+ 	if (dev->bus->ops->read != bcma_core_pci_hostmode_read_config) {
+ 		/* This is not a device on the PCI-core bridge. */
+@@ -569,9 +594,14 @@ int bcma_core_pci_plat_dev_init(struct p
  	pr_info("PCI: Fixing up device %s\n", pci_name(dev));
  
  	/* Fix up interrupt lines */
@@ -1886,8 +2013,15 @@
 +	dev->irq = bcma_core_irq(pc_host->pdev->core);
  	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
  
++	readrq = pcie_get_readrq(dev);
++	if (readrq > 128) {
++		pr_info("change PCIe max read request size from %i to 128\n", readrq);
++		pcie_set_readrq(dev, 128);
++	}
  	return 0;
-@@ -588,6 +612,6 @@ int bcma_core_pci_pcibios_map_irq(const
+ }
+ EXPORT_SYMBOL(bcma_core_pci_plat_dev_init);
+@@ -588,6 +618,6 @@ int bcma_core_pci_pcibios_map_irq(const
  
  	pc_host = container_of(dev->bus->ops, struct bcma_drv_pci_host,
  			       pci_ops);
@@ -2084,8 +2218,12 @@
  }
  
  int __devinit bcma_bus_register(struct bcma_bus *bus)
-@@ -166,6 +240,20 @@ int __devinit bcma_bus_register(struct b
- 		return -1;
+@@ -163,9 +237,23 @@ int __devinit bcma_bus_register(struct b
+ 	err = bcma_bus_scan(bus);
+ 	if (err) {
+ 		bcma_err(bus, "Failed to scan: %d\n", err);
+-		return -1;
++		return err;
  	}
  
 +	/* Early init CC core */
@@ -2190,7 +2328,26 @@
  	bcma_info(bus, "Early bus registered\n");
 --- a/drivers/bcma/scan.c
 +++ b/drivers/bcma/scan.c
-@@ -84,6 +84,8 @@ static const struct bcma_device_id_name
+@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
+ 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
+ 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
+ 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
++	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
++	{ BCMA_CORE_DMA, "DMA" },
++	{ BCMA_CORE_SDIO3, "SDIO3" },
++	{ BCMA_CORE_USB20, "USB 2.0" },
++	{ BCMA_CORE_USB30, "USB 3.0" },
++	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
++	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
++	{ BCMA_CORE_ROM, "ROM" },
++	{ BCMA_CORE_NAND, "NAND flash controller" },
++	{ BCMA_CORE_QSPI, "SPI flash controller" },
++	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
++	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
+ 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
+ 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
+ 	{ BCMA_CORE_INVALID, "Invalid" },
+@@ -84,6 +96,8 @@ static const struct bcma_device_id_name
  	{ BCMA_CORE_I2S, "I2S" },
  	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
  	{ BCMA_CORE_SHIM, "SHIM" },
@@ -2199,7 +2356,7 @@
  	{ BCMA_CORE_DEFAULT, "Default" },
  };
  
-@@ -137,19 +139,19 @@ static void bcma_scan_switch_core(struct
+@@ -137,19 +151,19 @@ static void bcma_scan_switch_core(struct
  				       addr);
  }
  
@@ -2222,7 +2379,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -159,14 +161,14 @@ static s32 bcma_erom_get_ci(struct bcma_
+@@ -159,14 +173,14 @@ static s32 bcma_erom_get_ci(struct bcma_
  	return ent;
  }
  
@@ -2239,7 +2396,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	bcma_erom_push_ent(eromptr);
-@@ -175,7 +177,7 @@ static bool bcma_erom_is_bridge(struct b
+@@ -175,7 +189,7 @@ static bool bcma_erom_is_bridge(struct b
  		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
  }
  
@@ -2248,7 +2405,7 @@
  {
  	u32 ent;
  	while (1) {
-@@ -189,7 +191,7 @@ static void bcma_erom_skip_component(str
+@@ -189,7 +203,7 @@ static void bcma_erom_skip_component(str
  	bcma_erom_push_ent(eromptr);
  }
  
@@ -2257,15 +2414,80 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -199,7 +201,7 @@ static s32 bcma_erom_get_mst_port(struct
+@@ -199,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
  	return ent;
  }
  
 -static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
-+static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
++static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
  				  u32 type, u8 port)
  {
  	u32 addrl, addrh, sizel, sizeh = 0;
+@@ -211,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
+ 	    ((ent & SCAN_ADDR_TYPE) != type) ||
+ 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
+ 		bcma_erom_push_ent(eromptr);
+-		return -EINVAL;
++		return (u32)-EINVAL;
+ 	}
+ 
+ 	addrl = ent & SCAN_ADDR_ADDR;
+@@ -255,11 +269,13 @@ static struct bcma_device *bcma_find_cor
+ 	return NULL;
+ }
+ 
++#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
++
+ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
+ 			      struct bcma_device_id *match, int core_num,
+ 			      struct bcma_device *core)
+ {
+-	s32 tmp;
++	u32 tmp;
+ 	u8 i, j;
+ 	s32 cia, cib;
+ 	u8 ports[2], wrappers[2];
+@@ -337,11 +353,11 @@ static int bcma_get_next_core(struct bcm
+ 	 * the main register space for the core
+ 	 */
+ 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
+-	if (tmp <= 0) {
++	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 		/* Try again to see if it is a bridge */
+ 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 					      SCAN_ADDR_TYPE_BRIDGE, 0);
+-		if (tmp <= 0) {
++		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 			return -EILSEQ;
+ 		} else {
+ 			bcma_info(bus, "Bridge found\n");
+@@ -355,7 +371,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SLAVE, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: slave port %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -372,7 +388,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_MWRAP, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -390,7 +406,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SWRAP, i + hack);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * has %d descriptors\n", i, j); */
 --- a/drivers/bcma/sprom.c
 +++ b/drivers/bcma/sprom.c
 @@ -72,12 +72,12 @@ fail:
@@ -2458,7 +2680,27 @@
  
  struct bcma_device;
  struct bcma_bus;
-@@ -134,12 +134,17 @@ struct bcma_host_ops {
+@@ -72,7 +72,19 @@ struct bcma_host_ops {
+ /* Core-ID values. */
+ #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
+ #define BCMA_CORE_4706_CHIPCOMMON	0x500
++#define BCMA_CORE_PCIEG2		0x501
++#define BCMA_CORE_DMA			0x502
++#define BCMA_CORE_SDIO3			0x503
++#define BCMA_CORE_USB20			0x504
++#define BCMA_CORE_USB30			0x505
++#define BCMA_CORE_A9JTAG		0x506
++#define BCMA_CORE_DDR23			0x507
++#define BCMA_CORE_ROM			0x508
++#define BCMA_CORE_NAND			0x509
++#define BCMA_CORE_QSPI			0x50A
++#define BCMA_CORE_CHIPCOMMON_B		0x50B
+ #define BCMA_CORE_4706_SOC_RAM		0x50E
++#define BCMA_CORE_ARMCA9		0x510
+ #define BCMA_CORE_4706_MAC_GBIT		0x52D
+ #define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
+ #define BCMA_CORE_ALTA			0x534	/* I2S core */
+@@ -134,12 +146,17 @@ struct bcma_host_ops {
  #define BCMA_CORE_I2S			0x834
  #define BCMA_CORE_SDR_DDR1_MEM_CTL	0x835	/* SDR/DDR1 memory controller core */
  #define BCMA_CORE_SHIM			0x837	/* SHIM component in ubus/6362 */
@@ -2476,7 +2718,7 @@
  #define BCMA_CHIP_ID_BCM43224	43224
  #define  BCMA_PKG_ID_BCM43224_FAB_CSM	0x8
  #define  BCMA_PKG_ID_BCM43224_FAB_SMIC	0xa
-@@ -157,6 +162,7 @@ struct bcma_host_ops {
+@@ -157,6 +174,7 @@ struct bcma_host_ops {
  
  /* Chip IDs of SoCs */
  #define BCMA_CHIP_ID_BCM4706	0x5300
@@ -2484,7 +2726,7 @@
  #define BCMA_CHIP_ID_BCM4716	0x4716
  #define  BCMA_PKG_ID_BCM4716	8
  #define  BCMA_PKG_ID_BCM4717	9
-@@ -166,7 +172,65 @@ struct bcma_host_ops {
+@@ -166,7 +184,70 @@ struct bcma_host_ops {
  #define BCMA_CHIP_ID_BCM4749	0x4749
  #define BCMA_CHIP_ID_BCM5356	0x5356
  #define BCMA_CHIP_ID_BCM5357	0x5357
@@ -2493,6 +2735,11 @@
 +#define  BCMA_PKG_ID_BCM5357	11
  #define BCMA_CHIP_ID_BCM53572	53572
 +#define  BCMA_PKG_ID_BCM47188	9
++#define BCMA_CHIP_ID_BCM4707	53010
++#define  BCMA_PKG_ID_BCM4707	1
++#define  BCMA_PKG_ID_BCM4708	2
++#define  BCMA_PKG_ID_BCM4709	0
++#define BCMA_CHIP_ID_BCM53018	53018
 +
 +/* Board types (on PCI usually equals to the subsystem dev id) */
 +/* BCM4313 */
@@ -2550,7 +2797,7 @@
  
  struct bcma_device {
  	struct bcma_bus *bus;
-@@ -251,7 +315,7 @@ struct bcma_bus {
+@@ -251,7 +332,7 @@ struct bcma_bus {
  	u8 num;
  
  	struct bcma_drv_cc drv_cc;
@@ -2559,7 +2806,7 @@
  	struct bcma_drv_mips drv_mips;
  	struct bcma_drv_gmac_cmn drv_gmac_cmn;
  
-@@ -345,6 +409,7 @@ extern void bcma_core_set_clockmode(stru
+@@ -345,6 +426,7 @@ extern void bcma_core_set_clockmode(stru
  				    enum bcma_clkmode clkmode);
  extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
  			      bool on);
@@ -2929,15 +3176,50 @@
  #endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
 --- a/include/linux/bcma/bcma_driver_pci.h
 +++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -179,6 +179,8 @@ struct pci_dev;
+@@ -179,10 +179,33 @@ struct pci_dev;
  #define BCMA_CORE_PCI_CFG_FUN_MASK		7	/* Function mask */
  #define BCMA_CORE_PCI_CFG_OFF_MASK		0xfff	/* Register mask */
  
 +#define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
++
++#define BCMA_CORE_PCI_
++
++/* MDIO devices (SERDES modules) */
++#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
++#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
++#define BCMA_CORE_PCI_MDIO_BLK0			0x800
++#define BCMA_CORE_PCI_MDIO_BLK1			0x801
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
++#define BCMA_CORE_PCI_MDIO_BLK2			0x802
++#define BCMA_CORE_PCI_MDIO_BLK3			0x803
++#define BCMA_CORE_PCI_MDIO_BLK4			0x804
++#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
++#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
++#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
++#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
 +
  /* PCIE Root Capability Register bits (Host mode only) */
  #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
  
+ struct bcma_drv_pci;
++struct bcma_bus;
+ 
+ #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
+ struct bcma_drv_pci_host {
+@@ -217,7 +240,8 @@ struct bcma_drv_pci {
+ extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
+ extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
+ 				 struct bcma_device *core, bool enable);
+-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
++extern void bcma_core_pci_up(struct bcma_bus *bus);
++extern void bcma_core_pci_down(struct bcma_bus *bus);
+ 
+ extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
+ extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
 --- a/include/linux/bcma/bcma_regs.h
 +++ b/include/linux/bcma/bcma_regs.h
 @@ -11,11 +11,13 @@
@@ -2985,26 +3267,45 @@
  #endif
 --- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
 +++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
-@@ -695,7 +695,7 @@ void ai_pci_up(struct si_pub *sih)
- 	sii = container_of(sih, struct si_info, pub);
- 
- 	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
--		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, true);
-+		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true);
+@@ -688,27 +688,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en
+ 	return mode == BCMA_CLKMODE_FAST;
  }
  
- /* Unconfigure and/or apply various WARs when going down */
-@@ -706,7 +706,7 @@ void ai_pci_down(struct si_pub *sih)
- 	sii = container_of(sih, struct si_info, pub);
- 
- 	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-void ai_pci_up(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, true);
+-}
+-
+-/* Unconfigure and/or apply various WARs when going down */
+-void ai_pci_down(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
 -		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, false);
-+		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false);
- }
- 
+-}
+-
  /* Enable BT-COEX & Ex-PA for 4313 */
+ void ai_epa_4313war(struct si_pub *sih)
+ {
 --- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
 +++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
+@@ -4689,7 +4689,7 @@ static int brcms_b_attach(struct brcms_c
+ 	brcms_c_coredisable(wlc_hw);
+ 
+ 	/* Match driver "down" state */
+-	ai_pci_down(wlc_hw->sih);
++	bcma_core_pci_down(wlc_hw->d11core->bus);
+ 
+ 	/* turn off pll and xtal to match driver "down" state */
+ 	brcms_b_xtal(wlc_hw, OFF);
 @@ -5077,7 +5077,7 @@ static int brcms_b_up_prep(struct brcms_
  	 * Configure pci/pcmcia here instead of in brcms_c_attach()
  	 * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
@@ -3014,3 +3315,39 @@
  			      true);
  
  	/*
+@@ -5087,12 +5087,12 @@ static int brcms_b_up_prep(struct brcms_
+ 	 */
+ 	if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
+ 		/* put SB PCI in down state again */
+-		ai_pci_down(wlc_hw->sih);
++		bcma_core_pci_down(wlc_hw->d11core->bus);
+ 		brcms_b_xtal(wlc_hw, OFF);
+ 		return -ENOMEDIUM;
+ 	}
+ 
+-	ai_pci_up(wlc_hw->sih);
++	bcma_core_pci_up(wlc_hw->d11core->bus);
+ 
+ 	/* reset the d11 core */
+ 	brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
+@@ -5295,7 +5295,7 @@ static int brcms_b_down_finish(struct br
+ 
+ 		/* turn off primary xtal and pll */
+ 		if (!wlc_hw->noreset) {
+-			ai_pci_down(wlc_hw->sih);
++			bcma_core_pci_down(wlc_hw->d11core->bus);
+ 			brcms_b_xtal(wlc_hw, OFF);
+ 		}
+ 	}
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
+@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st
+ extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode);
+ extern bool ai_deviceremoved(struct si_pub *sih);
+ 
+-extern void ai_pci_down(struct si_pub *sih);
+-extern void ai_pci_up(struct si_pub *sih);
+-
+ /* Enable Ex-PA for 4313 */
+ extern void ai_epa_4313war(struct si_pub *sih);
+ 

target/linux/generic/patches-3.6/026-bcma_pcie_up_down.patch

@@ -1,167 +0,0 @@
-bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
-called by b43 and brcmsmac
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
-
---- a/drivers/bcma/driver_pci.c
-+++ b/drivers/bcma/driver_pci.c
-@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
- 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
- }
- 
--static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
-+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
- {
- 	u32 v;
- 	int i;
-@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
- 	}
- }
- 
--static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
-+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
- {
- 	int max_retries = 10;
- 	u16 ret = 0;
-@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
- 	return ret;
- }
- 
--static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
-+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
- 				u8 address, u16 data)
- {
- 	int max_retries = 10;
-@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
- 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
- }
- 
-+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
-+				    u8 address, u16 data)
-+{
-+	bcma_pcie_mdio_write(pc, device, address, data);
-+	return bcma_pcie_mdio_read(pc, device, address);
-+}
-+
- /**************************************************
-  * Workarounds.
-  **************************************************/
-@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
- 	}
- }
- 
-+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
-+{
-+	u16 data;
-+
-+	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
-+		data = up ? 0x74 : 0x7C;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
-+		data = up ? 0x75 : 0x7D;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	}
-+}
-+
- /**************************************************
-  * Init.
-  **************************************************/
-@@ -262,7 +288,7 @@ out:
- }
- EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
- 
--void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
-+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
- {
- 	u32 w;
- 
-@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
- 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
- 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
- }
--EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
-+
-+void bcma_core_pci_up(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_power_save(pc, true);
-+
-+	bcma_core_pci_extend_L1timer(pc, true);
-+
-+	if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
-+	    bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
-+		pcie_set_readrq(bus->host_pci, 128);
-+	}
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
-+
-+void bcma_core_pci_down(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_extend_L1timer(pc, false);
-+
-+	bcma_core_pci_power_save(pc, false);
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
---- a/include/linux/bcma/bcma_driver_pci.h
-+++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -181,10 +181,31 @@ struct pci_dev;
- 
- #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
- 
-+#define BCMA_CORE_PCI_
-+
-+/* MDIO devices (SERDES modules) */
-+#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
-+#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
-+#define BCMA_CORE_PCI_MDIO_BLK0			0x800
-+#define BCMA_CORE_PCI_MDIO_BLK1			0x801
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
-+#define BCMA_CORE_PCI_MDIO_BLK2			0x802
-+#define BCMA_CORE_PCI_MDIO_BLK3			0x803
-+#define BCMA_CORE_PCI_MDIO_BLK4			0x804
-+#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
-+#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
-+#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
-+#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
-+
- /* PCIE Root Capability Register bits (Host mode only) */
- #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
- 
- struct bcma_drv_pci;
-+struct bcma_bus;
- 
- #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
- struct bcma_drv_pci_host {
-@@ -219,7 +240,8 @@ struct bcma_drv_pci {
- extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
- extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
- 				 struct bcma_device *core, bool enable);
--extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
-+extern void bcma_core_pci_up(struct bcma_bus *bus);
-+extern void bcma_core_pci_down(struct bcma_bus *bus);
- 
- extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
- extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);

target/linux/generic/patches-3.8/020-ssb_update.patch

@@ -6,7 +6,7 @@
  
 +config SSB_SFLASH
 +	bool "SSB serial flash support"
-+	depends on SSB_DRIVER_MIPS && BROKEN
++	depends on SSB_DRIVER_MIPS
 +	default y
 +
  # Assumption: We are on embedded, if we compile the MIPS core.
@@ -179,7 +179,7 @@
  			   "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
 --- /dev/null
 +++ b/drivers/ssb/driver_chipcommon_sflash.c
-@@ -0,0 +1,166 @@
+@@ -0,0 +1,164 @@
 +/*
 + * Sonics Silicon Backplane
 + * ChipCommon serial flash interface
@@ -333,8 +333,8 @@
 +	sflash->size = sflash->blocksize * sflash->numblocks;
 +	sflash->present = true;
 +
-+	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
-+		e->name, e->blocksize, e->numblocks);
++	pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
++		e->name, sflash->size / 1024, e->blocksize, e->numblocks);
 +
 +	/* Prepare platform device, but don't register it yet. It's too early,
 +	 * malloc (required by device_private_init) is not available yet. */
@@ -342,9 +342,7 @@
 +					 sflash->size;
 +	ssb_sflash_dev.dev.platform_data = sflash;
 +
-+	pr_err("Serial flash support is not implemented yet!\n");
-+
-+	return -ENOTSUPP;
++	return 0;
 +}
 --- a/drivers/ssb/driver_gpio.c
 +++ b/drivers/ssb/driver_gpio.c

target/linux/generic/patches-3.8/025-bcma_backport.patch

@@ -19,6 +19,23 @@
  
  config BCMA_DRIVER_PCI_HOSTMODE
  	bool "Driver for PCI core working in hostmode"
+@@ -34,8 +35,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
+ 	  PCI core hostmode operation (external PCI bus).
+ 
+ config BCMA_HOST_SOC
+-	bool
+-	depends on BCMA_DRIVER_MIPS
++	bool "Support for BCMA in a SoC"
++	depends on BCMA
++	help
++	  Host interface for a Broadcom AIX bus directly mapped into
++	  the memory. This only works with the Broadcom SoCs from the
++	  BCM47XX line.
++
++	  If unsure, say N
+ 
+ config BCMA_DRIVER_MIPS
+ 	bool "BCMA Broadcom MIPS core driver"
 --- a/drivers/bcma/bcma_private.h
 +++ b/drivers/bcma/bcma_private.h
 @@ -22,6 +22,8 @@
@@ -985,7 +1002,15 @@
  	/* Enable PCI bridge BAR0 memory & master access */
  	tmp = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
  	bcma_extpci_write_config(pc, 0, 0, PCI_COMMAND, &tmp, sizeof(tmp));
-@@ -576,7 +592,7 @@ int bcma_core_pci_plat_dev_init(struct p
+@@ -565,6 +581,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI
+ int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
+ {
+ 	struct bcma_drv_pci_host *pc_host;
++	int readrq;
+ 
+ 	if (dev->bus->ops->read != bcma_core_pci_hostmode_read_config) {
+ 		/* This is not a device on the PCI-core bridge. */
+@@ -576,9 +593,14 @@ int bcma_core_pci_plat_dev_init(struct p
  	pr_info("PCI: Fixing up device %s\n", pci_name(dev));
  
  	/* Fix up interrupt lines */
@@ -993,8 +1018,15 @@
 +	dev->irq = bcma_core_irq(pc_host->pdev->core);
  	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
  
++	readrq = pcie_get_readrq(dev);
++	if (readrq > 128) {
++		pr_info("change PCIe max read request size from %i to 128\n", readrq);
++		pcie_set_readrq(dev, 128);
++	}
  	return 0;
-@@ -595,6 +611,6 @@ int bcma_core_pci_pcibios_map_irq(const
+ }
+ EXPORT_SYMBOL(bcma_core_pci_plat_dev_init);
+@@ -595,6 +617,6 @@ int bcma_core_pci_pcibios_map_irq(const
  
  	pc_host = container_of(dev->bus->ops, struct bcma_drv_pci_host,
  			       pci_ops);
@@ -1078,9 +1110,37 @@
  #ifdef CONFIG_BCMA_SFLASH
  	if (bus->drv_cc.sflash.present) {
  		err = platform_device_register(&bcma_sflash_dev);
+@@ -205,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *b
+ 	err = bcma_bus_scan(bus);
+ 	if (err) {
+ 		bcma_err(bus, "Failed to scan: %d\n", err);
+-		return -1;
++		return err;
+ 	}
+ 
+ 	/* Early init CC core */
 --- a/drivers/bcma/scan.c
 +++ b/drivers/bcma/scan.c
-@@ -84,6 +84,8 @@ static const struct bcma_device_id_name
+@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
+ 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
+ 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
+ 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
++	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
++	{ BCMA_CORE_DMA, "DMA" },
++	{ BCMA_CORE_SDIO3, "SDIO3" },
++	{ BCMA_CORE_USB20, "USB 2.0" },
++	{ BCMA_CORE_USB30, "USB 3.0" },
++	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
++	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
++	{ BCMA_CORE_ROM, "ROM" },
++	{ BCMA_CORE_NAND, "NAND flash controller" },
++	{ BCMA_CORE_QSPI, "SPI flash controller" },
++	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
++	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
+ 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
+ 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
+ 	{ BCMA_CORE_INVALID, "Invalid" },
+@@ -84,6 +96,8 @@ static const struct bcma_device_id_name
  	{ BCMA_CORE_I2S, "I2S" },
  	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
  	{ BCMA_CORE_SHIM, "SHIM" },
@@ -1089,7 +1149,7 @@
  	{ BCMA_CORE_DEFAULT, "Default" },
  };
  
-@@ -137,19 +139,19 @@ static void bcma_scan_switch_core(struct
+@@ -137,19 +151,19 @@ static void bcma_scan_switch_core(struct
  				       addr);
  }
  
@@ -1112,7 +1172,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -159,14 +161,14 @@ static s32 bcma_erom_get_ci(struct bcma_
+@@ -159,14 +173,14 @@ static s32 bcma_erom_get_ci(struct bcma_
  	return ent;
  }
  
@@ -1129,7 +1189,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	bcma_erom_push_ent(eromptr);
-@@ -175,7 +177,7 @@ static bool bcma_erom_is_bridge(struct b
+@@ -175,7 +189,7 @@ static bool bcma_erom_is_bridge(struct b
  		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
  }
  
@@ -1138,7 +1198,7 @@
  {
  	u32 ent;
  	while (1) {
-@@ -189,7 +191,7 @@ static void bcma_erom_skip_component(str
+@@ -189,7 +203,7 @@ static void bcma_erom_skip_component(str
  	bcma_erom_push_ent(eromptr);
  }
  
@@ -1147,15 +1207,80 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -199,7 +201,7 @@ static s32 bcma_erom_get_mst_port(struct
+@@ -199,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
  	return ent;
  }
  
 -static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
-+static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
++static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
  				  u32 type, u8 port)
  {
  	u32 addrl, addrh, sizel, sizeh = 0;
+@@ -211,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
+ 	    ((ent & SCAN_ADDR_TYPE) != type) ||
+ 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
+ 		bcma_erom_push_ent(eromptr);
+-		return -EINVAL;
++		return (u32)-EINVAL;
+ 	}
+ 
+ 	addrl = ent & SCAN_ADDR_ADDR;
+@@ -255,11 +269,13 @@ static struct bcma_device *bcma_find_cor
+ 	return NULL;
+ }
+ 
++#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
++
+ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
+ 			      struct bcma_device_id *match, int core_num,
+ 			      struct bcma_device *core)
+ {
+-	s32 tmp;
++	u32 tmp;
+ 	u8 i, j;
+ 	s32 cia, cib;
+ 	u8 ports[2], wrappers[2];
+@@ -337,11 +353,11 @@ static int bcma_get_next_core(struct bcm
+ 	 * the main register space for the core
+ 	 */
+ 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
+-	if (tmp <= 0) {
++	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 		/* Try again to see if it is a bridge */
+ 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 					      SCAN_ADDR_TYPE_BRIDGE, 0);
+-		if (tmp <= 0) {
++		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 			return -EILSEQ;
+ 		} else {
+ 			bcma_info(bus, "Bridge found\n");
+@@ -355,7 +371,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SLAVE, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: slave port %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -372,7 +388,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_MWRAP, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -390,7 +406,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SWRAP, i + hack);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * has %d descriptors\n", i, j); */
 --- a/drivers/bcma/sprom.c
 +++ b/drivers/bcma/sprom.c
 @@ -72,12 +72,12 @@ fail:
@@ -1331,7 +1456,27 @@
  }
 --- a/include/linux/bcma/bcma.h
 +++ b/include/linux/bcma/bcma.h
-@@ -134,12 +134,17 @@ struct bcma_host_ops {
+@@ -72,7 +72,19 @@ struct bcma_host_ops {
+ /* Core-ID values. */
+ #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
+ #define BCMA_CORE_4706_CHIPCOMMON	0x500
++#define BCMA_CORE_PCIEG2		0x501
++#define BCMA_CORE_DMA			0x502
++#define BCMA_CORE_SDIO3			0x503
++#define BCMA_CORE_USB20			0x504
++#define BCMA_CORE_USB30			0x505
++#define BCMA_CORE_A9JTAG		0x506
++#define BCMA_CORE_DDR23			0x507
++#define BCMA_CORE_ROM			0x508
++#define BCMA_CORE_NAND			0x509
++#define BCMA_CORE_QSPI			0x50A
++#define BCMA_CORE_CHIPCOMMON_B		0x50B
+ #define BCMA_CORE_4706_SOC_RAM		0x50E
++#define BCMA_CORE_ARMCA9		0x510
+ #define BCMA_CORE_4706_MAC_GBIT		0x52D
+ #define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
+ #define BCMA_CORE_ALTA			0x534	/* I2S core */
+@@ -134,12 +146,17 @@ struct bcma_host_ops {
  #define BCMA_CORE_I2S			0x834
  #define BCMA_CORE_SDR_DDR1_MEM_CTL	0x835	/* SDR/DDR1 memory controller core */
  #define BCMA_CORE_SHIM			0x837	/* SHIM component in ubus/6362 */
@@ -1349,10 +1494,16 @@
  #define BCMA_CHIP_ID_BCM43224	43224
  #define  BCMA_PKG_ID_BCM43224_FAB_CSM	0x8
  #define  BCMA_PKG_ID_BCM43224_FAB_SMIC	0xa
-@@ -173,6 +178,60 @@ struct bcma_host_ops {
+@@ -172,6 +189,65 @@ struct bcma_host_ops {
+ #define  BCMA_PKG_ID_BCM5357	11
  #define BCMA_CHIP_ID_BCM53572	53572
  #define  BCMA_PKG_ID_BCM47188	9
- 
++#define BCMA_CHIP_ID_BCM4707	53010
++#define  BCMA_PKG_ID_BCM4707	1
++#define  BCMA_PKG_ID_BCM4708	2
++#define  BCMA_PKG_ID_BCM4709	0
++#define BCMA_CHIP_ID_BCM53018	53018
++
 +/* Board types (on PCI usually equals to the subsystem dev id) */
 +/* BCM4313 */
 +#define BCMA_BOARD_TYPE_BCM94313BU	0X050F
@@ -1406,10 +1557,9 @@
 +#define BCMA_BOARD_TYPE_BCM953572SDRNR2	0X0590
 +/* BCM43142 */
 +#define BCMA_BOARD_TYPE_BCM943142HM	0X05E0
-+
+ 
  struct bcma_device {
  	struct bcma_bus *bus;
- 	struct bcma_device_id id;
 --- a/include/linux/bcma/bcma_driver_chipcommon.h
 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
 @@ -27,7 +27,7 @@
@@ -1585,15 +1735,50 @@
  #endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
 --- a/include/linux/bcma/bcma_driver_pci.h
 +++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -179,6 +179,8 @@ struct pci_dev;
+@@ -179,10 +179,33 @@ struct pci_dev;
  #define BCMA_CORE_PCI_CFG_FUN_MASK		7	/* Function mask */
  #define BCMA_CORE_PCI_CFG_OFF_MASK		0xfff	/* Register mask */
  
 +#define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
++
++#define BCMA_CORE_PCI_
++
++/* MDIO devices (SERDES modules) */
++#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
++#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
++#define BCMA_CORE_PCI_MDIO_BLK0			0x800
++#define BCMA_CORE_PCI_MDIO_BLK1			0x801
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
++#define BCMA_CORE_PCI_MDIO_BLK2			0x802
++#define BCMA_CORE_PCI_MDIO_BLK3			0x803
++#define BCMA_CORE_PCI_MDIO_BLK4			0x804
++#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
++#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
++#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
++#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
 +
  /* PCIE Root Capability Register bits (Host mode only) */
  #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
  
+ struct bcma_drv_pci;
++struct bcma_bus;
+ 
+ #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
+ struct bcma_drv_pci_host {
+@@ -217,7 +240,8 @@ struct bcma_drv_pci {
+ extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
+ extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
+ 				 struct bcma_device *core, bool enable);
+-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
++extern void bcma_core_pci_up(struct bcma_bus *bus);
++extern void bcma_core_pci_down(struct bcma_bus *bus);
+ 
+ extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
+ extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
 --- a/include/linux/bcma/bcma_regs.h
 +++ b/include/linux/bcma/bcma_regs.h
 @@ -37,6 +37,7 @@
@@ -1604,3 +1789,193 @@
  
  /* BCMA PCI config space registers. */
  #define BCMA_PCI_PMCSR			0x44
+--- a/drivers/bcma/driver_pci.c
++++ b/drivers/bcma/driver_pci.c
+@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
+ 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
+ }
+ 
+-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
+ {
+ 	u32 v;
+ 	int i;
+@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
+ 	}
+ }
+ 
+-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
+ {
+ 	int max_retries = 10;
+ 	u16 ret = 0;
+@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
+ 	return ret;
+ }
+ 
+-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
+ 				u8 address, u16 data)
+ {
+ 	int max_retries = 10;
+@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
+ 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
+ }
+ 
++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
++				    u8 address, u16 data)
++{
++	bcma_pcie_mdio_write(pc, device, address, data);
++	return bcma_pcie_mdio_read(pc, device, address);
++}
++
+ /**************************************************
+  * Workarounds.
+  **************************************************/
+@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
+ 	}
+ }
+ 
++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
++{
++	u16 data;
++
++	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
++		data = up ? 0x74 : 0x7C;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
++		data = up ? 0x75 : 0x7D;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	}
++}
++
+ /**************************************************
+  * Init.
+  **************************************************/
+@@ -262,7 +288,7 @@ out:
+ }
+ EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
+ 
+-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
+ {
+ 	u32 w;
+ 
+@@ -274,4 +300,33 @@ void bcma_core_pci_extend_L1timer(struct
+ 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
+ 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
+ }
+-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
++
++void bcma_core_pci_up(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_power_save(pc, true);
++
++	bcma_core_pci_extend_L1timer(pc, true);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_up);
++
++void bcma_core_pci_down(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_extend_L1timer(pc, false);
++
++	bcma_core_pci_power_save(pc, false);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_down);
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
+@@ -685,27 +685,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en
+ 	return mode == BCMA_CLKMODE_FAST;
+ }
+ 
+-void ai_pci_up(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true);
+-}
+-
+-/* Unconfigure and/or apply various WARs when going down */
+-void ai_pci_down(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false);
+-}
+-
+ /* Enable BT-COEX & Ex-PA for 4313 */
+ void ai_epa_4313war(struct si_pub *sih)
+ {
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
+@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st
+ extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode);
+ extern bool ai_deviceremoved(struct si_pub *sih);
+ 
+-extern void ai_pci_down(struct si_pub *sih);
+-extern void ai_pci_up(struct si_pub *sih);
+-
+ /* Enable Ex-PA for 4313 */
+ extern void ai_epa_4313war(struct si_pub *sih);
+ 
+--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
+@@ -4648,7 +4648,7 @@ static int brcms_b_attach(struct brcms_c
+ 	brcms_c_coredisable(wlc_hw);
+ 
+ 	/* Match driver "down" state */
+-	ai_pci_down(wlc_hw->sih);
++	bcma_core_pci_down(wlc_hw->d11core->bus);
+ 
+ 	/* turn off pll and xtal to match driver "down" state */
+ 	brcms_b_xtal(wlc_hw, OFF);
+@@ -4991,12 +4991,12 @@ static int brcms_b_up_prep(struct brcms_
+ 	 */
+ 	if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
+ 		/* put SB PCI in down state again */
+-		ai_pci_down(wlc_hw->sih);
++		bcma_core_pci_down(wlc_hw->d11core->bus);
+ 		brcms_b_xtal(wlc_hw, OFF);
+ 		return -ENOMEDIUM;
+ 	}
+ 
+-	ai_pci_up(wlc_hw->sih);
++	bcma_core_pci_up(wlc_hw->d11core->bus);
+ 
+ 	/* reset the d11 core */
+ 	brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
+@@ -5193,7 +5193,7 @@ static int brcms_b_down_finish(struct br
+ 
+ 		/* turn off primary xtal and pll */
+ 		if (!wlc_hw->noreset) {
+-			ai_pci_down(wlc_hw->sih);
++			bcma_core_pci_down(wlc_hw->d11core->bus);
+ 			brcms_b_xtal(wlc_hw, OFF);
+ 		}
+ 	}

target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch

@@ -1,167 +0,0 @@
-bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
-called by b43 and brcmsmac
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
-
---- a/drivers/bcma/driver_pci.c
-+++ b/drivers/bcma/driver_pci.c
-@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
- 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
- }
- 
--static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
-+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
- {
- 	u32 v;
- 	int i;
-@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
- 	}
- }
- 
--static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
-+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
- {
- 	int max_retries = 10;
- 	u16 ret = 0;
-@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
- 	return ret;
- }
- 
--static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
-+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
- 				u8 address, u16 data)
- {
- 	int max_retries = 10;
-@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
- 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
- }
- 
-+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
-+				    u8 address, u16 data)
-+{
-+	bcma_pcie_mdio_write(pc, device, address, data);
-+	return bcma_pcie_mdio_read(pc, device, address);
-+}
-+
- /**************************************************
-  * Workarounds.
-  **************************************************/
-@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
- 	}
- }
- 
-+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
-+{
-+	u16 data;
-+
-+	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
-+		data = up ? 0x74 : 0x7C;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
-+		data = up ? 0x75 : 0x7D;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	}
-+}
-+
- /**************************************************
-  * Init.
-  **************************************************/
-@@ -262,7 +288,7 @@ out:
- }
- EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
- 
--void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
-+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
- {
- 	u32 w;
- 
-@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
- 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
- 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
- }
--EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
-+
-+void bcma_core_pci_up(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_power_save(pc, true);
-+
-+	bcma_core_pci_extend_L1timer(pc, true);
-+
-+	if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
-+	    bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
-+		pcie_set_readrq(bus->host_pci, 128);
-+	}
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
-+
-+void bcma_core_pci_down(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_extend_L1timer(pc, false);
-+
-+	bcma_core_pci_power_save(pc, false);
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
---- a/include/linux/bcma/bcma_driver_pci.h
-+++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -181,10 +181,31 @@ struct pci_dev;
- 
- #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
- 
-+#define BCMA_CORE_PCI_
-+
-+/* MDIO devices (SERDES modules) */
-+#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
-+#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
-+#define BCMA_CORE_PCI_MDIO_BLK0			0x800
-+#define BCMA_CORE_PCI_MDIO_BLK1			0x801
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
-+#define BCMA_CORE_PCI_MDIO_BLK2			0x802
-+#define BCMA_CORE_PCI_MDIO_BLK3			0x803
-+#define BCMA_CORE_PCI_MDIO_BLK4			0x804
-+#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
-+#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
-+#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
-+#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
-+
- /* PCIE Root Capability Register bits (Host mode only) */
- #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
- 
- struct bcma_drv_pci;
-+struct bcma_bus;
- 
- #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
- struct bcma_drv_pci_host {
-@@ -219,7 +240,8 @@ struct bcma_drv_pci {
- extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
- extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
- 				 struct bcma_device *core, bool enable);
--extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
-+extern void bcma_core_pci_up(struct bcma_bus *bus);
-+extern void bcma_core_pci_down(struct bcma_bus *bus);
- 
- extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
- extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);

target/linux/generic/patches-3.9/020-ssb_update.patch

@@ -1,6 +1,13 @@
 --- a/drivers/ssb/Kconfig
 +++ b/drivers/ssb/Kconfig
-@@ -144,7 +144,7 @@ config SSB_SFLASH
+@@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
+ 
+ config SSB_SFLASH
+ 	bool "SSB serial flash support"
+-	depends on SSB_DRIVER_MIPS && BROKEN
++	depends on SSB_DRIVER_MIPS
+ 	default y
+ 
  # Assumption: We are on embedded, if we compile the MIPS core.
  config SSB_EMBEDDED
  	bool
@@ -218,28 +225,32 @@
  	u32 id, id2;
  
  	switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
-@@ -131,9 +145,21 @@ int ssb_sflash_init(struct ssb_chipcommo
+@@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
  		return -ENOTSUPP;
  	}
  
+-	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
+-		e->name, e->blocksize, e->numblocks);
+-
+-	pr_err("Serial flash support is not implemented yet!\n");
 +	sflash->window = SSB_FLASH2;
 +	sflash->blocksize = e->blocksize;
 +	sflash->numblocks = e->numblocks;
 +	sflash->size = sflash->blocksize * sflash->numblocks;
 +	sflash->present = true;
 +
- 	pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
- 		e->name, e->blocksize, e->numblocks);
- 
++	pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
++		e->name, sflash->size / 1024, e->blocksize, e->numblocks);
++
 +	/* Prepare platform device, but don't register it yet. It's too early,
 +	 * malloc (required by device_private_init) is not available yet. */
 +	ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
 +					 sflash->size;
 +	ssb_sflash_dev.dev.platform_data = sflash;
-+
- 	pr_err("Serial flash support is not implemented yet!\n");
  
- 	return -ENOTSUPP;
+-	return -ENOTSUPP;
++	return 0;
+ }
 --- a/drivers/ssb/driver_mipscore.c
 +++ b/drivers/ssb/driver_mipscore.c
 @@ -167,21 +167,22 @@ static void set_irq(struct ssb_device *d

target/linux/generic/patches-3.9/025-bcma_backport.patch

@@ -8,6 +8,23 @@
  
  config BCMA_DRIVER_PCI_HOSTMODE
  	bool "Driver for PCI core working in hostmode"
+@@ -34,8 +35,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
+ 	  PCI core hostmode operation (external PCI bus).
+ 
+ config BCMA_HOST_SOC
+-	bool
+-	depends on BCMA_DRIVER_MIPS
++	bool "Support for BCMA in a SoC"
++	depends on BCMA
++	help
++	  Host interface for a Broadcom AIX bus directly mapped into
++	  the memory. This only works with the Broadcom SoCs from the
++	  BCM47XX line.
++
++	  If unsure, say N
+ 
+ config BCMA_DRIVER_MIPS
+ 	bool "BCMA Broadcom MIPS core driver"
 --- a/drivers/bcma/bcma_private.h
 +++ b/drivers/bcma/bcma_private.h
 @@ -22,6 +22,8 @@
@@ -460,9 +477,37 @@
  		core->dev.release = bcma_release_core_dev;
  		core->dev.bus = &bcma_bus_type;
  		dev_set_name(&core->dev, "bcma%d:%d", bus->num, dev_id);
+@@ -213,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *b
+ 	err = bcma_bus_scan(bus);
+ 	if (err) {
+ 		bcma_err(bus, "Failed to scan: %d\n", err);
+-		return -1;
++		return err;
+ 	}
+ 
+ 	/* Early init CC core */
 --- a/drivers/bcma/scan.c
 +++ b/drivers/bcma/scan.c
-@@ -84,6 +84,8 @@ static const struct bcma_device_id_name
+@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
+ 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
+ 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
+ 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
++	{ BCMA_CORE_PCIEG2, "PCIe Gen 2" },
++	{ BCMA_CORE_DMA, "DMA" },
++	{ BCMA_CORE_SDIO3, "SDIO3" },
++	{ BCMA_CORE_USB20, "USB 2.0" },
++	{ BCMA_CORE_USB30, "USB 3.0" },
++	{ BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
++	{ BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
++	{ BCMA_CORE_ROM, "ROM" },
++	{ BCMA_CORE_NAND, "NAND flash controller" },
++	{ BCMA_CORE_QSPI, "SPI flash controller" },
++	{ BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
++	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
+ 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
+ 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
+ 	{ BCMA_CORE_INVALID, "Invalid" },
+@@ -84,6 +96,8 @@ static const struct bcma_device_id_name
  	{ BCMA_CORE_I2S, "I2S" },
  	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
  	{ BCMA_CORE_SHIM, "SHIM" },
@@ -471,7 +516,7 @@
  	{ BCMA_CORE_DEFAULT, "Default" },
  };
  
-@@ -137,19 +139,19 @@ static void bcma_scan_switch_core(struct
+@@ -137,19 +151,19 @@ static void bcma_scan_switch_core(struct
  				       addr);
  }
  
@@ -494,7 +539,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -159,14 +161,14 @@ static s32 bcma_erom_get_ci(struct bcma_
+@@ -159,14 +173,14 @@ static s32 bcma_erom_get_ci(struct bcma_
  	return ent;
  }
  
@@ -511,7 +556,7 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	bcma_erom_push_ent(eromptr);
-@@ -175,7 +177,7 @@ static bool bcma_erom_is_bridge(struct b
+@@ -175,7 +189,7 @@ static bool bcma_erom_is_bridge(struct b
  		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
  }
  
@@ -520,7 +565,7 @@
  {
  	u32 ent;
  	while (1) {
-@@ -189,7 +191,7 @@ static void bcma_erom_skip_component(str
+@@ -189,7 +203,7 @@ static void bcma_erom_skip_component(str
  	bcma_erom_push_ent(eromptr);
  }
  
@@ -529,15 +574,80 @@
  {
  	u32 ent = bcma_erom_get_ent(bus, eromptr);
  	if (!(ent & SCAN_ER_VALID))
-@@ -199,7 +201,7 @@ static s32 bcma_erom_get_mst_port(struct
+@@ -199,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
  	return ent;
  }
  
 -static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
-+static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
++static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
  				  u32 type, u8 port)
  {
  	u32 addrl, addrh, sizel, sizeh = 0;
+@@ -211,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
+ 	    ((ent & SCAN_ADDR_TYPE) != type) ||
+ 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
+ 		bcma_erom_push_ent(eromptr);
+-		return -EINVAL;
++		return (u32)-EINVAL;
+ 	}
+ 
+ 	addrl = ent & SCAN_ADDR_ADDR;
+@@ -255,11 +269,13 @@ static struct bcma_device *bcma_find_cor
+ 	return NULL;
+ }
+ 
++#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
++
+ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
+ 			      struct bcma_device_id *match, int core_num,
+ 			      struct bcma_device *core)
+ {
+-	s32 tmp;
++	u32 tmp;
+ 	u8 i, j;
+ 	s32 cia, cib;
+ 	u8 ports[2], wrappers[2];
+@@ -337,11 +353,11 @@ static int bcma_get_next_core(struct bcm
+ 	 * the main register space for the core
+ 	 */
+ 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
+-	if (tmp <= 0) {
++	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 		/* Try again to see if it is a bridge */
+ 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 					      SCAN_ADDR_TYPE_BRIDGE, 0);
+-		if (tmp <= 0) {
++		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
+ 			return -EILSEQ;
+ 		} else {
+ 			bcma_info(bus, "Bridge found\n");
+@@ -355,7 +371,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SLAVE, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: slave port %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -372,7 +388,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_MWRAP, i);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * "has %d descriptors\n", i, j); */
+@@ -390,7 +406,7 @@ static int bcma_get_next_core(struct bcm
+ 		for (j = 0; ; j++) {
+ 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
+ 				SCAN_ADDR_TYPE_SWRAP, i + hack);
+-			if (tmp < 0) {
++			if (IS_ERR_VALUE_U32(tmp)) {
+ 				/* no more entries for port _i_ */
+ 				/* pr_debug("erom: master wrapper %d "
+ 				 * has %d descriptors\n", i, j); */
 --- a/drivers/bcma/sprom.c
 +++ b/drivers/bcma/sprom.c
 @@ -72,12 +72,12 @@ fail:
@@ -713,7 +823,27 @@
  }
 --- a/include/linux/bcma/bcma.h
 +++ b/include/linux/bcma/bcma.h
-@@ -134,12 +134,17 @@ struct bcma_host_ops {
+@@ -72,7 +72,19 @@ struct bcma_host_ops {
+ /* Core-ID values. */
+ #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
+ #define BCMA_CORE_4706_CHIPCOMMON	0x500
++#define BCMA_CORE_PCIEG2		0x501
++#define BCMA_CORE_DMA			0x502
++#define BCMA_CORE_SDIO3			0x503
++#define BCMA_CORE_USB20			0x504
++#define BCMA_CORE_USB30			0x505
++#define BCMA_CORE_A9JTAG		0x506
++#define BCMA_CORE_DDR23			0x507
++#define BCMA_CORE_ROM			0x508
++#define BCMA_CORE_NAND			0x509
++#define BCMA_CORE_QSPI			0x50A
++#define BCMA_CORE_CHIPCOMMON_B		0x50B
+ #define BCMA_CORE_4706_SOC_RAM		0x50E
++#define BCMA_CORE_ARMCA9		0x510
+ #define BCMA_CORE_4706_MAC_GBIT		0x52D
+ #define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
+ #define BCMA_CORE_ALTA			0x534	/* I2S core */
+@@ -134,12 +146,17 @@ struct bcma_host_ops {
  #define BCMA_CORE_I2S			0x834
  #define BCMA_CORE_SDR_DDR1_MEM_CTL	0x835	/* SDR/DDR1 memory controller core */
  #define BCMA_CORE_SHIM			0x837	/* SHIM component in ubus/6362 */
@@ -731,10 +861,16 @@
  #define BCMA_CHIP_ID_BCM43224	43224
  #define  BCMA_PKG_ID_BCM43224_FAB_CSM	0x8
  #define  BCMA_PKG_ID_BCM43224_FAB_SMIC	0xa
-@@ -173,6 +178,60 @@ struct bcma_host_ops {
+@@ -172,6 +189,65 @@ struct bcma_host_ops {
+ #define  BCMA_PKG_ID_BCM5357	11
  #define BCMA_CHIP_ID_BCM53572	53572
  #define  BCMA_PKG_ID_BCM47188	9
- 
++#define BCMA_CHIP_ID_BCM4707	53010
++#define  BCMA_PKG_ID_BCM4707	1
++#define  BCMA_PKG_ID_BCM4708	2
++#define  BCMA_PKG_ID_BCM4709	0
++#define BCMA_CHIP_ID_BCM53018	53018
++
 +/* Board types (on PCI usually equals to the subsystem dev id) */
 +/* BCM4313 */
 +#define BCMA_BOARD_TYPE_BCM94313BU	0X050F
@@ -788,10 +924,9 @@
 +#define BCMA_BOARD_TYPE_BCM953572SDRNR2	0X0590
 +/* BCM43142 */
 +#define BCMA_BOARD_TYPE_BCM943142HM	0X05E0
-+
+ 
  struct bcma_device {
  	struct bcma_bus *bus;
- 	struct bcma_device_id id;
 --- a/include/linux/bcma/bcma_driver_chipcommon.h
 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
 @@ -104,6 +104,7 @@
@@ -914,3 +1049,259 @@
  
  /* BCMA PCI config space registers. */
  #define BCMA_PCI_PMCSR			0x44
+--- a/drivers/bcma/driver_pci.c
++++ b/drivers/bcma/driver_pci.c
+@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
+ 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
+ }
+ 
+-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
+ {
+ 	u32 v;
+ 	int i;
+@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
+ 	}
+ }
+ 
+-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
+ {
+ 	int max_retries = 10;
+ 	u16 ret = 0;
+@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
+ 	return ret;
+ }
+ 
+-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
+ 				u8 address, u16 data)
+ {
+ 	int max_retries = 10;
+@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
+ 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
+ }
+ 
++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
++				    u8 address, u16 data)
++{
++	bcma_pcie_mdio_write(pc, device, address, data);
++	return bcma_pcie_mdio_read(pc, device, address);
++}
++
+ /**************************************************
+  * Workarounds.
+  **************************************************/
+@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
+ 	}
+ }
+ 
++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
++{
++	u16 data;
++
++	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
++		data = up ? 0x74 : 0x7C;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
++		data = up ? 0x75 : 0x7D;
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
++		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
++					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
++	}
++}
++
+ /**************************************************
+  * Init.
+  **************************************************/
+@@ -262,7 +288,7 @@ out:
+ }
+ EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
+ 
+-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
+ {
+ 	u32 w;
+ 
+@@ -274,4 +300,33 @@ void bcma_core_pci_extend_L1timer(struct
+ 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
+ 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
+ }
+-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
++
++void bcma_core_pci_up(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_power_save(pc, true);
++
++	bcma_core_pci_extend_L1timer(pc, true);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_up);
++
++void bcma_core_pci_down(struct bcma_bus *bus)
++{
++	struct bcma_drv_pci *pc;
++
++	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
++		return;
++
++	pc = &bus->drv_pci[0];
++
++	bcma_core_pci_extend_L1timer(pc, false);
++
++	bcma_core_pci_power_save(pc, false);
++}
++EXPORT_SYMBOL_GPL(bcma_core_pci_down);
+--- a/drivers/bcma/driver_pci_host.c
++++ b/drivers/bcma/driver_pci_host.c
+@@ -581,6 +581,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI
+ int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
+ {
+ 	struct bcma_drv_pci_host *pc_host;
++	int readrq;
+ 
+ 	if (dev->bus->ops->read != bcma_core_pci_hostmode_read_config) {
+ 		/* This is not a device on the PCI-core bridge. */
+@@ -595,6 +596,11 @@ int bcma_core_pci_plat_dev_init(struct p
+ 	dev->irq = bcma_core_irq(pc_host->pdev->core);
+ 	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+ 
++	readrq = pcie_get_readrq(dev);
++	if (readrq > 128) {
++		pr_info("change PCIe max read request size from %i to 128\n", readrq);
++		pcie_set_readrq(dev, 128);
++	}
+ 	return 0;
+ }
+ EXPORT_SYMBOL(bcma_core_pci_plat_dev_init);
+--- a/include/linux/bcma/bcma_driver_pci.h
++++ b/include/linux/bcma/bcma_driver_pci.h
+@@ -181,10 +181,31 @@ struct pci_dev;
+ 
+ #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
+ 
++#define BCMA_CORE_PCI_
++
++/* MDIO devices (SERDES modules) */
++#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
++#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
++#define BCMA_CORE_PCI_MDIO_BLK0			0x800
++#define BCMA_CORE_PCI_MDIO_BLK1			0x801
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
++#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
++#define BCMA_CORE_PCI_MDIO_BLK2			0x802
++#define BCMA_CORE_PCI_MDIO_BLK3			0x803
++#define BCMA_CORE_PCI_MDIO_BLK4			0x804
++#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
++#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
++#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
++#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
++
+ /* PCIE Root Capability Register bits (Host mode only) */
+ #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
+ 
+ struct bcma_drv_pci;
++struct bcma_bus;
+ 
+ #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
+ struct bcma_drv_pci_host {
+@@ -219,7 +240,8 @@ struct bcma_drv_pci {
+ extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
+ extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
+ 				 struct bcma_device *core, bool enable);
+-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
++extern void bcma_core_pci_up(struct bcma_bus *bus);
++extern void bcma_core_pci_down(struct bcma_bus *bus);
+ 
+ extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
+ extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
+@@ -685,27 +685,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en
+ 	return mode == BCMA_CLKMODE_FAST;
+ }
+ 
+-void ai_pci_up(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true);
+-}
+-
+-/* Unconfigure and/or apply various WARs when going down */
+-void ai_pci_down(struct si_pub *sih)
+-{
+-	struct si_info *sii;
+-
+-	sii = container_of(sih, struct si_info, pub);
+-
+-	if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
+-		bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false);
+-}
+-
+ /* Enable BT-COEX & Ex-PA for 4313 */
+ void ai_epa_4313war(struct si_pub *sih)
+ {
+--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
+@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st
+ extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode);
+ extern bool ai_deviceremoved(struct si_pub *sih);
+ 
+-extern void ai_pci_down(struct si_pub *sih);
+-extern void ai_pci_up(struct si_pub *sih);
+-
+ /* Enable Ex-PA for 4313 */
+ extern void ai_epa_4313war(struct si_pub *sih);
+ 
+--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
++++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
+@@ -4644,7 +4644,7 @@ static int brcms_b_attach(struct brcms_c
+ 	brcms_c_coredisable(wlc_hw);
+ 
+ 	/* Match driver "down" state */
+-	ai_pci_down(wlc_hw->sih);
++	bcma_core_pci_down(wlc_hw->d11core->bus);
+ 
+ 	/* turn off pll and xtal to match driver "down" state */
+ 	brcms_b_xtal(wlc_hw, OFF);
+@@ -4987,12 +4987,12 @@ static int brcms_b_up_prep(struct brcms_
+ 	 */
+ 	if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
+ 		/* put SB PCI in down state again */
+-		ai_pci_down(wlc_hw->sih);
++		bcma_core_pci_down(wlc_hw->d11core->bus);
+ 		brcms_b_xtal(wlc_hw, OFF);
+ 		return -ENOMEDIUM;
+ 	}
+ 
+-	ai_pci_up(wlc_hw->sih);
++	bcma_core_pci_up(wlc_hw->d11core->bus);
+ 
+ 	/* reset the d11 core */
+ 	brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
+@@ -5189,7 +5189,7 @@ static int brcms_b_down_finish(struct br
+ 
+ 		/* turn off primary xtal and pll */
+ 		if (!wlc_hw->noreset) {
+-			ai_pci_down(wlc_hw->sih);
++			bcma_core_pci_down(wlc_hw->d11core->bus);
+ 			brcms_b_xtal(wlc_hw, OFF);
+ 		}
+ 	}

target/linux/generic/patches-3.9/026-bcma_pcie_up_down.patch

@@ -1,167 +0,0 @@
-bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
-called by b43 and brcmsmac
-
-Signed-off-by: Hauke Mehrtens <[email protected]>
-
---- a/drivers/bcma/driver_pci.c
-+++ b/drivers/bcma/driver_pci.c
-@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
- 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
- }
- 
--static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
-+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
- {
- 	u32 v;
- 	int i;
-@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
- 	}
- }
- 
--static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
-+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
- {
- 	int max_retries = 10;
- 	u16 ret = 0;
-@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
- 	return ret;
- }
- 
--static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
-+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
- 				u8 address, u16 data)
- {
- 	int max_retries = 10;
-@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
- 	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
- }
- 
-+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
-+				    u8 address, u16 data)
-+{
-+	bcma_pcie_mdio_write(pc, device, address, data);
-+	return bcma_pcie_mdio_read(pc, device, address);
-+}
-+
- /**************************************************
-  * Workarounds.
-  **************************************************/
-@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
- 	}
- }
- 
-+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
-+{
-+	u16 data;
-+
-+	if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
-+		data = up ? 0x74 : 0x7C;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	} else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
-+		data = up ? 0x75 : 0x7D;
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
-+		bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
-+					 BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
-+	}
-+}
-+
- /**************************************************
-  * Init.
-  **************************************************/
-@@ -262,7 +288,7 @@ out:
- }
- EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
- 
--void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
-+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
- {
- 	u32 w;
- 
-@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
- 	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
- 	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
- }
--EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
-+
-+void bcma_core_pci_up(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_power_save(pc, true);
-+
-+	bcma_core_pci_extend_L1timer(pc, true);
-+
-+	if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
-+	    bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
-+		pcie_set_readrq(bus->host_pci, 128);
-+	}
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
-+
-+void bcma_core_pci_down(struct bcma_bus *bus)
-+{
-+	struct bcma_drv_pci *pc;
-+
-+	if (bus->hosttype != BCMA_HOSTTYPE_PCI)
-+		return;
-+
-+	pc = &bus->drv_pci[0];
-+
-+	bcma_core_pci_extend_L1timer(pc, false);
-+
-+	bcma_core_pci_power_save(pc, false);
-+}
-+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
---- a/include/linux/bcma/bcma_driver_pci.h
-+++ b/include/linux/bcma/bcma_driver_pci.h
-@@ -181,10 +181,31 @@ struct pci_dev;
- 
- #define BCMA_CORE_PCI_CFG_DEVCTRL		0xd8
- 
-+#define BCMA_CORE_PCI_
-+
-+/* MDIO devices (SERDES modules) */
-+#define BCMA_CORE_PCI_MDIO_IEEE0		0x000
-+#define BCMA_CORE_PCI_MDIO_IEEE1		0x001
-+#define BCMA_CORE_PCI_MDIO_BLK0			0x800
-+#define BCMA_CORE_PCI_MDIO_BLK1			0x801
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT0		0x16
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT1		0x17
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT2		0x18
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT3		0x19
-+#define  BCMA_CORE_PCI_MDIO_BLK1_MGMT4		0x1A
-+#define BCMA_CORE_PCI_MDIO_BLK2			0x802
-+#define BCMA_CORE_PCI_MDIO_BLK3			0x803
-+#define BCMA_CORE_PCI_MDIO_BLK4			0x804
-+#define BCMA_CORE_PCI_MDIO_TXPLL		0x808	/* TXPLL register block idx */
-+#define BCMA_CORE_PCI_MDIO_TXCTRL0		0x820
-+#define BCMA_CORE_PCI_MDIO_SERDESID		0x831
-+#define BCMA_CORE_PCI_MDIO_RXCTRL0		0x840
-+
- /* PCIE Root Capability Register bits (Host mode only) */
- #define BCMA_CORE_PCI_RC_CRS_VISIBILITY		0x0001
- 
- struct bcma_drv_pci;
-+struct bcma_bus;
- 
- #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
- struct bcma_drv_pci_host {
-@@ -219,7 +240,8 @@ struct bcma_drv_pci {
- extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
- extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
- 				 struct bcma_device *core, bool enable);
--extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
-+extern void bcma_core_pci_up(struct bcma_bus *bus);
-+extern void bcma_core_pci_down(struct bcma_bus *bus);
- 
- extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
- extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);